From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by mx.groups.io with SMTP id smtpd.web09.6909.1643469237861286824 for ; Sat, 29 Jan 2022 07:13:58 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=IAfmTjkj; spf=pass (domain: kernel.org, ip: 145.40.68.75, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 5F000B827CC; Sat, 29 Jan 2022 15:13:55 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DEB76C340E5; Sat, 29 Jan 2022 15:13:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1643469234; bh=0j9uKd/oTaOh/r+0lqOEInmqeDJ29SbbgC9diA850d4=; h=From:To:Cc:Subject:Date:From; b=IAfmTjkjn+ckvbnYXf+Fga3EGy/++oOPE5qUsin9/HiuugGdT64S9JxV0FgDgzmR4 661HJSrqK0+2JFoKuQym4sxPf9BDy6bqDqBTMBl38VxWelkCJtyQUvipj0t9RuaTsH WM+E1xQbAkiGJv/N9I7VG+gDgI3prnisMH1/l30dI/Fe9w98G4ycAvHeroFxOFBaqi ntfEOM2yPg++UIboejio0lAVmQ/nKPglrDcYbcI4bIv5Hu6doSCEH8IBGc9bCGddYn AcVMzvs8f0GSfw/fWaG8Jw729VFTPxsRjonW1F7myuYWOu/lL8Las/8EN/jzAb7tuN PmQGKNYxmmMeA== From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: leif@nuviainc.com, sami.mujawar@arm.com, Ard Biesheuvel , Alexander Graf Subject: [PATCH] ArmVirtPkg/ArmVirtMemoryInitPeiLib: avoid redundant cache invalidation Date: Sat, 29 Jan 2022 16:13:46 +0100 Message-Id: <20220129151346.4120964-1-ardb@kernel.org> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Alex reports that the cache invalidation performed by ArmVirtMemoryInitPeiLib takes a non-negligible amount of time at boot. This cache invalidation used to be necessary to avoid inconsistencies between the CPU's cached and uncached views of the permanent PEI memory region, given that the PEI phase is where the MMU gets enabled. The only allocations done from permanent PEI memory with the MMU off are pages used for page tables, and since commit 748fea6279ef ("ArmPkg/ArmMmuLib AARCH64: invalidate page tables before populating them"), each of those is invalidated in the caches explicitly, for reasons described in the patch's commit log. All other allocations done in PEI are either from temporary PEI memory, which includes the stack, or from permanent PEI memory but after the MMU has been enabled. This means that the cache invalidation in ArmVirtMemoryInitPeiLib is no longer necessary, and can simply be dropped. Cc: Alexander Graf Signed-off-by: Ard Biesheuvel --- .../ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPe= iLib.c b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib= .c index 022e13e762b6..98d90ad4200d 100644 --- a/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c +++ b/ArmVirtPkg/Library/ArmVirtMemoryInitPeiLib/ArmVirtMemoryInitPeiLib.c @@ -91,15 +91,6 @@ MemoryPeim ( );=0D }=0D =0D - //=0D - // When running under virtualization, the PI/UEFI memory region may be=0D - // clean but not invalidated in system caches or in lower level caches=0D - // on other CPUs. So invalidate the region by virtual address, to ensure= =0D - // that the contents we put there with the caches and MMU off will still= =0D - // be visible after turning them on.=0D - //=0D - InvalidateDataCacheRange ((VOID *)(UINTN)UefiMemoryBase, UefiMemorySize)= ;=0D -=0D // Build Memory Allocation Hob=0D InitMmu ();=0D =0D --=20 2.30.2