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* [staging/LoongArch RESEND PATCH v1 06/33] MdePkg/Include: Add LOONGARCH related definitions EDK2 CI.
@ 2022-02-09  6:53 Chao Li
  2022-04-07  2:53 ` [edk2-devel] " Abner Chang
  0 siblings, 1 reply; 2+ messages in thread
From: Chao Li @ 2022-02-09  6:53 UTC (permalink / raw)
  To: devel; +Cc: Michael D Kinney, Liming Gao, Zhiguang Liu

HTTP/PXE boot LOONGARCH64 related definitions for EDK2 CI.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Signed-off-by: Chao Li <lichao@loongson.cn>
---
 MdePkg/Include/IndustryStandard/Dhcp.h | 41 +++++++++++++++-----------
 1 file changed, 23 insertions(+), 18 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/Dhcp.h b/MdePkg/Include/IndustryStandard/Dhcp.h
index f209f1b2eb..086d24422d 100644
--- a/MdePkg/Include/IndustryStandard/Dhcp.h
+++ b/MdePkg/Include/IndustryStandard/Dhcp.h
@@ -4,6 +4,7 @@
 
   Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
   Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
@@ -259,24 +260,28 @@ typedef enum {
 /// These identifiers are defined by IETF:
 /// http://www.ietf.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml
 ///
-#define PXE_CLIENT_ARCH_X86_BIOS  0x0000           /// x86 BIOS for PXE
-#define PXE_CLIENT_ARCH_IPF       0x0002           /// Itanium for PXE
-#define PXE_CLIENT_ARCH_IA32      0x0006           /// x86 uefi for PXE
-#define PXE_CLIENT_ARCH_X64       0x0007           /// x64 uefi for PXE
-#define PXE_CLIENT_ARCH_EBC       0x0009           /// EBC for PXE
-#define PXE_CLIENT_ARCH_ARM       0x000A           /// Arm uefi 32 for PXE
-#define PXE_CLIENT_ARCH_AARCH64   0x000B           /// Arm uefi 64 for PXE
-#define PXE_CLIENT_ARCH_RISCV32   0x0019           /// RISC-V uefi 32 for PXE
-#define PXE_CLIENT_ARCH_RISCV64   0x001B           /// RISC-V uefi 64 for PXE
-#define PXE_CLIENT_ARCH_RISCV128  0x001D           /// RISC-V uefi 128 for PXE
+#define PXE_CLIENT_ARCH_X86_BIOS      0x0000          /// x86 BIOS for PXE
+#define PXE_CLIENT_ARCH_IPF           0x0002          /// Itanium for PXE
+#define PXE_CLIENT_ARCH_IA32          0x0006          /// x86 uefi for PXE
+#define PXE_CLIENT_ARCH_X64           0x0007          /// x64 uefi for PXE
+#define PXE_CLIENT_ARCH_EBC           0x0009          /// EBC for PXE
+#define PXE_CLIENT_ARCH_ARM           0x000A          /// Arm uefi 32 for PXE
+#define PXE_CLIENT_ARCH_AARCH64       0x000B          /// Arm uefi 64 for PXE
+#define PXE_CLIENT_ARCH_RISCV32       0x0019          /// RISC-V uefi 32 for PXE
+#define PXE_CLIENT_ARCH_RISCV64       0x001B          /// RISC-V uefi 64 for PXE
+#define PXE_CLIENT_ARCH_RISCV128      0x001D          /// RISC-V uefi 128 for PXE
+#define PXE_CLIENT_ARCH_LOONGARCH32   0x0025          /// LOONGARCH uefi 32 for PXE
+#define PXE_CLIENT_ARCH_LOONGARCH64   0x0027          /// LOONGARCH uefi 64 for PXE
 
-#define HTTP_CLIENT_ARCH_IA32      0x000F          /// x86 uefi boot from http
-#define HTTP_CLIENT_ARCH_X64       0x0010          /// x64 uefi boot from http
-#define HTTP_CLIENT_ARCH_EBC       0x0011          /// EBC boot from http
-#define HTTP_CLIENT_ARCH_ARM       0x0012          /// Arm uefi 32 boot from http
-#define HTTP_CLIENT_ARCH_AARCH64   0x0013          /// Arm uefi 64 boot from http
-#define HTTP_CLIENT_ARCH_RISCV32   0x001A          /// RISC-V uefi 32 boot from http
-#define HTTP_CLIENT_ARCH_RISCV64   0x001C          /// RISC-V uefi 64 boot from http
-#define HTTP_CLIENT_ARCH_RISCV128  0x001E          /// RISC-V uefi 128 boot from http
+#define HTTP_CLIENT_ARCH_IA32         0x000F          /// x86 uefi boot from http
+#define HTTP_CLIENT_ARCH_X64          0x0010          /// x64 uefi boot from http
+#define HTTP_CLIENT_ARCH_EBC          0x0011          /// EBC boot from http
+#define HTTP_CLIENT_ARCH_ARM          0x0012          /// Arm uefi 32 boot from http
+#define HTTP_CLIENT_ARCH_AARCH64      0x0013          /// Arm uefi 64 boot from http
+#define HTTP_CLIENT_ARCH_RISCV32      0x001A          /// RISC-V uefi 32 boot from http
+#define HTTP_CLIENT_ARCH_RISCV64      0x001C          /// RISC-V uefi 64 boot from http
+#define HTTP_CLIENT_ARCH_RISCV128     0x001E          /// RISC-V uefi 128 boot from http
+#define HTTP_CLIENT_ARCH_LOONGARCH32  0x0026          /// LOONGARCH uefi 32 boot from http
+#define HTTP_CLIENT_ARCH_LOONGARCH64  0x0028          /// LOONGARCH uefi 64 boot from http
 
 #endif
-- 
2.27.0


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [edk2-devel] [staging/LoongArch RESEND PATCH v1 06/33] MdePkg/Include: Add LOONGARCH related definitions EDK2 CI.
  2022-02-09  6:53 [staging/LoongArch RESEND PATCH v1 06/33] MdePkg/Include: Add LOONGARCH related definitions EDK2 CI Chao Li
@ 2022-04-07  2:53 ` Abner Chang
  0 siblings, 0 replies; 2+ messages in thread
From: Abner Chang @ 2022-04-07  2:53 UTC (permalink / raw)
  To: devel@edk2.groups.io, lichao@loongson.cn
  Cc: Michael D Kinney, Liming Gao, Zhiguang Liu


> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chao Li
> Sent: Wednesday, February 9, 2022 2:53 PM
> To: devel@edk2.groups.io
> Cc: Michael D Kinney <michael.d.kinney@intel.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Zhiguang Liu <zhiguang.liu@intel.com>
> Subject: [edk2-devel] [staging/LoongArch RESEND PATCH v1 06/33]
> MdePkg/Include: Add LOONGARCH related definitions EDK2 CI.
> 
> HTTP/PXE boot LOONGARCH64 related definitions for EDK2 CI.
> 
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> 
> Signed-off-by: Chao Li <lichao@loongson.cn>
> ---
>  MdePkg/Include/IndustryStandard/Dhcp.h | 41 +++++++++++++++----------
> -
>  1 file changed, 23 insertions(+), 18 deletions(-)
> 
> diff --git a/MdePkg/Include/IndustryStandard/Dhcp.h
> b/MdePkg/Include/IndustryStandard/Dhcp.h
> index f209f1b2eb..086d24422d 100644
> --- a/MdePkg/Include/IndustryStandard/Dhcp.h
> +++ b/MdePkg/Include/IndustryStandard/Dhcp.h
> @@ -4,6 +4,7 @@
> 
>    Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>    Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.<BR>
> +  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> reserved.<BR>
>    SPDX-License-Identifier: BSD-2-Clause-Patent
>  **/
> 
> @@ -259,24 +260,28 @@ typedef enum {
>  /// These identifiers are defined by IETF:
>  ///
> INVALID URI REMOVED
> parameters/dhcpv6-
> parameters.xml__;!!NpxR!0va5dmepVxLVdaIQNLVUzW3iUkyqR_DNS1s_0Hz
> MksU2GzARlun433ILnBSn8MM$

The original link (http://www.ietf.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml) to DHCP parameter seems no longer exist? I can now see these architecture in below link,
https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtml

Could you please confirm this? We can also update the link if necessary.

Acked-by: Abner Chang <abner.chang@hpe.com>

Thanks
Abner

>  ///
> -#define PXE_CLIENT_ARCH_X86_BIOS  0x0000           /// x86 BIOS for PXE
> -#define PXE_CLIENT_ARCH_IPF       0x0002           /// Itanium for PXE
> -#define PXE_CLIENT_ARCH_IA32      0x0006           /// x86 uefi for PXE
> -#define PXE_CLIENT_ARCH_X64       0x0007           /// x64 uefi for PXE
> -#define PXE_CLIENT_ARCH_EBC       0x0009           /// EBC for PXE
> -#define PXE_CLIENT_ARCH_ARM       0x000A           /// Arm uefi 32 for PXE
> -#define PXE_CLIENT_ARCH_AARCH64   0x000B           /// Arm uefi 64 for PXE
> -#define PXE_CLIENT_ARCH_RISCV32   0x0019           /// RISC-V uefi 32 for PXE
> -#define PXE_CLIENT_ARCH_RISCV64   0x001B           /// RISC-V uefi 64 for PXE
> -#define PXE_CLIENT_ARCH_RISCV128  0x001D           /// RISC-V uefi 128 for
> PXE
> +#define PXE_CLIENT_ARCH_X86_BIOS      0x0000          /// x86 BIOS for PXE
> +#define PXE_CLIENT_ARCH_IPF           0x0002          /// Itanium for PXE
> +#define PXE_CLIENT_ARCH_IA32          0x0006          /// x86 uefi for PXE
> +#define PXE_CLIENT_ARCH_X64           0x0007          /// x64 uefi for PXE
> +#define PXE_CLIENT_ARCH_EBC           0x0009          /// EBC for PXE
> +#define PXE_CLIENT_ARCH_ARM           0x000A          /// Arm uefi 32 for PXE
> +#define PXE_CLIENT_ARCH_AARCH64       0x000B          /// Arm uefi 64 for
> PXE
> +#define PXE_CLIENT_ARCH_RISCV32       0x0019          /// RISC-V uefi 32 for
> PXE
> +#define PXE_CLIENT_ARCH_RISCV64       0x001B          /// RISC-V uefi 64 for
> PXE
> +#define PXE_CLIENT_ARCH_RISCV128      0x001D          /// RISC-V uefi 128 for
> PXE
> +#define PXE_CLIENT_ARCH_LOONGARCH32   0x0025          /// LOONGARCH
> uefi 32 for PXE
> +#define PXE_CLIENT_ARCH_LOONGARCH64   0x0027          /// LOONGARCH
> uefi 64 for PXE
> 
> -#define HTTP_CLIENT_ARCH_IA32      0x000F          /// x86 uefi boot from http
> -#define HTTP_CLIENT_ARCH_X64       0x0010          /// x64 uefi boot from http
> -#define HTTP_CLIENT_ARCH_EBC       0x0011          /// EBC boot from http
> -#define HTTP_CLIENT_ARCH_ARM       0x0012          /// Arm uefi 32 boot from
> http
> -#define HTTP_CLIENT_ARCH_AARCH64   0x0013          /// Arm uefi 64 boot
> from http
> -#define HTTP_CLIENT_ARCH_RISCV32   0x001A          /// RISC-V uefi 32 boot
> from http
> -#define HTTP_CLIENT_ARCH_RISCV64   0x001C          /// RISC-V uefi 64 boot
> from http
> -#define HTTP_CLIENT_ARCH_RISCV128  0x001E          /// RISC-V uefi 128 boot
> from http
> +#define HTTP_CLIENT_ARCH_IA32         0x000F          /// x86 uefi boot from
> http
> +#define HTTP_CLIENT_ARCH_X64          0x0010          /// x64 uefi boot from
> http
> +#define HTTP_CLIENT_ARCH_EBC          0x0011          /// EBC boot from http
> +#define HTTP_CLIENT_ARCH_ARM          0x0012          /// Arm uefi 32 boot
> from http
> +#define HTTP_CLIENT_ARCH_AARCH64      0x0013          /// Arm uefi 64 boot
> from http
> +#define HTTP_CLIENT_ARCH_RISCV32      0x001A          /// RISC-V uefi 32 boot
> from http
> +#define HTTP_CLIENT_ARCH_RISCV64      0x001C          /// RISC-V uefi 64 boot
> from http
> +#define HTTP_CLIENT_ARCH_RISCV128     0x001E          /// RISC-V uefi 128
> boot from http
> +#define HTTP_CLIENT_ARCH_LOONGARCH32  0x0026          /// LOONGARCH
> uefi 32 boot from http
> +#define HTTP_CLIENT_ARCH_LOONGARCH64  0x0028          /// LOONGARCH
> uefi 64 boot from http
> 
>  #endif
> --
> 2.27.0
> 
> 
> 
> 
> 


^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2022-04-07  2:53 UTC | newest]

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2022-02-09  6:53 [staging/LoongArch RESEND PATCH v1 06/33] MdePkg/Include: Add LOONGARCH related definitions EDK2 CI Chao Li
2022-04-07  2:53 ` [edk2-devel] " Abner Chang

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