From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web10.23399.1644389733755642102 for ; Tue, 08 Feb 2022 22:55:34 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from code-server.gen (unknown [10.2.9.245]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9AxmuBjZQNiw4sIAA--.24412S2; Wed, 09 Feb 2022 14:55:31 +0800 (CST) From: "Chao Li" To: devel@edk2.groups.io Cc: Michael D Kinney , Liming Gao , Zhiguang Liu , Baoqi Zhang , Dongyan Qian Subject: [staging/LoongArch RESEND PATCH v1 19/33] MdePkg: Add LoongArch LOONGARCH64 binding Date: Wed, 9 Feb 2022 14:55:31 +0800 Message-Id: <20220209065531.2986186-1-lichao@loongson.cn> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-CM-TRANSID: AQAAf9AxmuBjZQNiw4sIAA--.24412S2 X-Coremail-Antispam: 1UD129KBjvJXoW3JFykCrWrXF1xtr1xZry8uFg_yoW7ZryDpa n2kF4fGw48Gr4xKFy3JFW5Jr13tws5ArWUGrs09rW7uFWDXa4v934qgF45tFW0yrn0va48 XF1agw1j9ayxArJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUvK14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26F1j6w1UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4U JVWxJr1l84ACjcxK6I8E87Iv67AKxVWxJr0_GcWl84ACjcxK6I8E87Iv6xkF7I0E14v26r xl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj 6xIIjxv20xvE14v26r1q6rW5McIj6xkF7I0En7xvr7AKxVWUJVW8JwAv7VC2z280aVAFwI 0_Gr0_Cr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CE Vc8vx2IErcIFxwCY02Avz4vE-syl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr 0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY 17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Gr0_Xr1lIxAIcV C0I7IYx2IY6xkF7I0E14v26F4j6r4UJwCI42IY6xAIw20EY4v20xvaj40_JFI_Gr1lIxAI cVC2z280aVAFwI0_Gr0_Cr1lIxAIcVC2z280aVCY1x0267AKxVW8Jr0_Cr1UYxBIdaVFxh VjvjDU0xZFpf9x0JUrsqAUUUUU= X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAMCF3QvO0LrgAHs7 Content-Transfer-Encoding: quoted-printable Add LOONGARCH64 sections in MdePkg.dec and LOONGARCH64 ProcessorBind.h Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Signed-off-by: Chao Li Co-authored-by: Baoqi Zhang Co-authored-by: Dongyan Qian --- MdePkg/Include/LoongArch64/ProcessorBind.h | 121 +++++++++++++++++++++ MdePkg/MdePkg.dec | 4 + MdePkg/MdePkg.dsc | 3 +- 3 files changed, 127 insertions(+), 1 deletion(-) create mode 100644 MdePkg/Include/LoongArch64/ProcessorBind.h diff --git a/MdePkg/Include/LoongArch64/ProcessorBind.h b/MdePkg/Include/Lo= ongArch64/ProcessorBind.h new file mode 100644 index 0000000000..a10481e285 --- /dev/null +++ b/MdePkg/Include/LoongArch64/ProcessorBind.h @@ -0,0 +1,121 @@ +/** @file=0D + Processor or Compiler specific defines and types for LoongArch=0D +=0D + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights r= eserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#ifndef __PROCESSOR_BIND_H__=0D +#define __PROCESSOR_BIND_H__=0D +=0D +//=0D +// Define the processor type so other code can make processor based choice= s=0D +//=0D +#define MDE_CPU_LOONGARCH64=0D +=0D +#define EFIAPI=0D +=0D +//=0D +// Make sure we are using the correct packing rules per EFI specification= =0D +//=0D +#ifndef __GNUC__=0D +#pragma pack()=0D +#endif=0D +=0D +//=0D +// Assume standard LoongArch 64-bit alignment.=0D +// Need to check portability of long long=0D +//=0D +typedef unsigned long UINT64;=0D +typedef long INT64;=0D +typedef unsigned int UINT32;=0D +typedef int INT32;=0D +typedef unsigned short UINT16;=0D +typedef unsigned short CHAR16;=0D +typedef short INT16;=0D +typedef unsigned char BOOLEAN;=0D +typedef unsigned char UINT8;=0D +typedef char CHAR8;=0D +typedef char INT8;=0D +=0D +//=0D +// Unsigned value of native width. (4 bytes on supported 32-bit processor= instructions,=0D +// 8 bytes on supported 64-bit processor instructions)=0D +//=0D +=0D +typedef UINT64 UINTN;=0D +=0D +//=0D +// Signed value of native width. (4 bytes on supported 32-bit processor i= nstructions,=0D +// 8 bytes on supported 64-bit processor instructions)=0D +//=0D +typedef INT64 INTN;=0D +=0D +//=0D +// Processor specific defines=0D +//=0D +=0D +//=0D +// A value of native width with the highest bit set.=0D +//=0D +#define MAX_BIT 0x8000000000000000ULL=0D +//=0D +// A value of native width with the two highest bits set.=0D +//=0D +#define MAX_2_BITS 0xC000000000000000ULL=0D +=0D +//=0D +// Maximum legal LoongArch 64-bit address=0D +//=0D +#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL=0D +=0D +//=0D +// Maximum usable address at boot time (48 bits using 4KB pages)=0D +//=0D +#define MAX_ALLOC_ADDRESS 0xFFFFFFFFFFFFULL=0D +=0D +=0D +//=0D +// Maximum legal LoongArch 64-bit INTN and UINTN values.=0D +//=0D +#define MAX_INTN ((INTN)0x7FFFFFFFFFFFFFFFULL)=0D +#define MAX_UINTN ((UINTN)0xFFFFFFFFFFFFFFFFULL)=0D +=0D +//=0D +// Page allocation granularity for LoongArch=0D +//=0D +#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)=0D +#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x10000)=0D +=0D +#if defined(__GNUC__)=0D + //=0D + // For GNU assembly code, .global or .globl can declare global symbols.= =0D + // Define this macro to unify the usage.=0D + //=0D + #define ASM_GLOBAL .globl=0D +#endif=0D +=0D +//=0D +// The stack alignment required for LoongArch=0D +//=0D +#define CPU_STACK_ALIGNMENT 16=0D +=0D +/**=0D + Return the pointer to the first instruction of a function given a functi= on pointer.=0D + On LOONGARCH CPU architectures, these two pointer values are the same,=0D + so the implementation of this macro is very simple.=0D +=0D + @param FunctionPointer A pointer to a function.=0D +=0D + @return The pointer to the first instruction of a function given a funct= ion pointer.=0D +=0D +**/=0D +#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPoin= ter)=0D +=0D +#ifndef __USER_LABEL_PREFIX__=0D +#define __USER_LABEL_PREFIX__=0D +#endif=0D +=0D +#endif=0D diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index 59b405928b..18d42047e9 100644 --- a/MdePkg/MdePkg.dec +++ b/MdePkg/MdePkg.dec @@ -7,6 +7,7 @@ # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
=0D # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= =0D # (C) Copyright 2016 - 2021 Hewlett Packard Enterprise Development LP
= =0D +# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights r= eserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -43,6 +44,9 @@ [Includes.RISCV64]=0D Include/RiscV64=0D =0D +[Includes.LOONGARCH64]=0D + Include/LoongArch64=0D +=0D [LibraryClasses]=0D ## @libraryclass Provides most usb APIs to support the Hid requests de= fined in Usb Hid 1.1 spec=0D # and the standard requests defined in Usb 1.1 spec.=0D diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc index a94959169b..1c83726b86 100644 --- a/MdePkg/MdePkg.dsc +++ b/MdePkg/MdePkg.dsc @@ -4,6 +4,7 @@ # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
=0D # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= =0D # (C) Copyright 2020 Hewlett Packard Enterprise Development LP
=0D +# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights r= eserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -15,7 +16,7 @@ PLATFORM_VERSION =3D 1.08=0D DSC_SPECIFICATION =3D 0x00010005=0D OUTPUT_DIRECTORY =3D Build/Mde=0D - SUPPORTED_ARCHITECTURES =3D IA32|X64|EBC|ARM|AARCH64|RISCV64=0D + SUPPORTED_ARCHITECTURES =3D IA32|X64|EBC|ARM|AARCH64|RISCV64|LOON= GARCH64=0D BUILD_TARGETS =3D DEBUG|RELEASE|NOOPT=0D SKUID_IDENTIFIER =3D DEFAULT=0D =0D --=20 2.27.0