From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web11.23739.1644393730982738285 for ; Wed, 09 Feb 2022 00:02:12 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from code-server.gen (unknown [10.2.9.245]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9DxH0MAdQNiTpIIAA--.6977S2; Wed, 09 Feb 2022 16:02:08 +0800 (CST) From: "Chao Li" To: devel@edk2.groups.io Cc: Liming Gao , Guomin Jiang , Baoqi Zhang Subject: [staging/LoongArch RESEND PATCH v1 30/33] MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementation. Date: Wed, 9 Feb 2022 16:02:08 +0800 Message-Id: <20220209080208.3087457-1-lichao@loongson.cn> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-CM-TRANSID: AQAAf9DxH0MAdQNiTpIIAA--.6977S2 X-Coremail-Antispam: 1UD129KBjvJXoWxAF15Zr1rWw4xGFWrJF4rAFb_yoW5Kw4Upw nYk3yfGr18G34F9rZ8Ja1UXw13Ja95KryUGF4Fvw1F9rWDJF95Wwn0yrWfWFWxA34Ut3yr Wr1F9rykWa47XaDanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkFb7Iv0xC_Cr1lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIE14v26F4UJVW0owA2z4x0Y4 vEx4A2jsIEc7CjxVAFwI0_GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xv F2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jrv_JF1lYx0Ex4A2jsIE14v26r4j6F 4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCY02Avz4vE-syl42xK82IY c2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s 026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF 0xvE2Ix0cI8IcVAFwI0_Gr0_Xr1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0x vE42xK8VAvwI8IcIk0rVWUCVW8JwCI42IY6I8E87Iv67AKxVWxJVW8Jr1lIxAIcVC2z280 aVCY1x0267AKxVW8Jr0_Cr1UYxBIdaVFxhVjvjDU0xZFpf9x07jrb18UUUUU= X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAMCF3QvO0NlwAFsG Content-Transfer-Encoding: quoted-printable Implement LoongArch DxeIPL instance. Cc: Liming Gao Cc: Guomin Jiang Signed-off-by: Chao Li Co-authored-by: Baoqi Zhang --- MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 6 +- .../Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c | 61 +++++++++++++++++++ 2 files changed, 66 insertions(+), 1 deletion(-) create mode 100644 MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf b/MdeModulePkg/Core/Dx= eIplPeim/DxeIpl.inf index 19b8a4c8ae..052ea0ec1a 100644 --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf @@ -8,6 +8,7 @@ # Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
= =0D # Copyright (c) 2017, AMD Incorporated. All rights reserved.
=0D # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights= reserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -26,7 +27,7 @@ #=0D # The following information is for reference only and not required by the = build tools.=0D #=0D -# VALID_ARCHITECTURES =3D IA32 X64 EBC (EBC is for build only) = AARCH64 RISCV64=0D +# VALID_ARCHITECTURES =3D IA32 X64 EBC (EBC is for build only) = AARCH64 RISCV64 LOONGARCH64=0D #=0D =0D [Sources]=0D @@ -53,6 +54,9 @@ [Sources.RISCV64]=0D RiscV64/DxeLoadFunc.c=0D =0D +[Sources.LOONGARCH64]=0D + LoongArch64/DxeLoadFunc.c=0D +=0D [Packages]=0D MdePkg/MdePkg.dec=0D MdeModulePkg/MdeModulePkg.dec=0D diff --git a/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c b/MdeMo= dulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c new file mode 100644 index 0000000000..27ffc072d0 --- /dev/null +++ b/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c @@ -0,0 +1,61 @@ +/** @file=0D + LoongArch specifc functionality for DxeLoad.=0D +=0D + Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#include "DxeIpl.h"=0D +=0D +/**=0D + Transfers control to DxeCore.=0D +=0D + This function performs a CPU architecture specific operations to execut= e=0D + the entry point of DxeCore with the parameters of HobList.=0D + It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.=0D +=0D + @param DxeCoreEntryPoint The entry point of DxeCore.=0D + @param HobList The start of HobList passed to DxeCore= .=0D +=0D +**/=0D +VOID=0D +HandOffToDxeCore (=0D + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,=0D + IN EFI_PEI_HOB_POINTERS HobList=0D + )=0D +{=0D + VOID *BaseOfStack;=0D + VOID *TopOfStack;=0D + EFI_STATUS Status;=0D +=0D + //=0D + // Allocate 128KB for the Stack=0D + //=0D + BaseOfStack =3D AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));=0D + ASSERT (BaseOfStack !=3D NULL);=0D + //=0D + // Compute the top of the stack we were allocated. Pre-allocate a UINTN= =0D + // for safety.=0D + //=0D + TopOfStack =3D (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_= SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);=0D + TopOfStack =3D ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);=0D + //=0D + // End of PEI phase singal=0D + //=0D + Status =3D PeiServicesInstallPpi (&gEndOfPeiSignalPpi);=0D + ASSERT_EFI_ERROR (Status);=0D +=0D + //=0D + // Update the contents of BSP stack HOB to reflect the real stack info p= assed to DxeCore.=0D + //=0D + UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);= =0D +=0D + SwitchStack (=0D + (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,=0D + HobList.Raw,=0D + NULL,=0D + TopOfStack=0D + );=0D +}=0D --=20 2.27.0