From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by mx.groups.io with SMTP id smtpd.web10.10194.1645709378574990544 for ; Thu, 24 Feb 2022 05:29:38 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=oPCf3x9n; spf=pass (domain: quicinc.com, ip: 129.46.98.28, mailfrom: quic_tpilar@quicinc.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1645709379; x=1677245379; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=RB2LSuJItWMK9vT65b/7gJAWWr9zVUzaQJBxX7XOOiE=; b=oPCf3x9n/v94u0lwSu2IOF3uxZP/ymrk0/UfginUiFduG6Lbz+lLU3UT HrGODUAiqby4hkER1aRToO1I+7H8S47X/nkkh1/pTgxWcC+gmjBz+L4y2 1Sfp+Uj7nj3hZDpdv3eh7bSw27UZuJVJPMplPSZIUmY+pYqioe7cDNKuX E=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 24 Feb 2022 05:29:38 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Feb 2022 05:29:38 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Thu, 24 Feb 2022 05:29:38 -0800 Received: from krabica.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Thu, 24 Feb 2022 05:29:36 -0800 From: "Tomas Pilar (tpilar)" To: CC: Ray Ni , Ard Biesheuvel , Leif Lindholm Subject: [PATCH v3] MdeModulePkg: Correct high-memory use in NvmExpressDxe Date: Thu, 24 Feb 2022 13:29:29 +0000 Message-ID: <20220224132929.2052626-1-quic_tpilar@quicinc.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Return-Path: quic_tpilar@quicinc.com X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Content-Transfer-Encoding: 8bit Content-Type: text/plain Move the logic that stores starting PCI attributes and sets the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute to DriverBindingStart() before the memory that backs the DMA engine is allocated. This ensures that the DMA-backing memory is not forcibly allocated below 4G in system address map. Otherwise the allocation fails on platforms that do not have any memory below the 4G mark and the drive initialisation fails. Leave the PCI device enabling attribute logic in NvmeControllerInit() to ensure that the device is re-enabled on reset in case it was disabled via PCI attributes. Cc: Ray Ni Cc: Ard Biesheuvel Cc: Leif Lindholm Signed-off-by: Tomas Pilar --- .../Bus/Pci/NvmExpressDxe/NvmExpress.c | 27 +++++++++++++++++++ .../Bus/Pci/NvmExpressDxe/NvmExpressHci.c | 26 +----------------- 2 files changed, 28 insertions(+), 25 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c index 9d40f67e8e..b70499e3be 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpress.c @@ -959,6 +959,33 @@ NvmExpressDriverBindingStart ( goto Exit; } + // + // Save original PCI attributes + // + Status = PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationGet, + 0, + &Private->PciAttributes + ); + + if (EFI_ERROR (Status)) { + return Status; + } + + // + // Enable 64-bit DMA support in the PCI layer. + // + Status = PciIo->Attributes ( + PciIo, + EfiPciIoAttributeOperationEnable, + EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE, + NULL + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_WARN, "NvmeControllerInit: failed to enable 64-bit DMA (%r)\n", Status)); + } + // // 6 x 4kB aligned buffers will be carved out of this buffer. // 1st 4kB boundary is the start of the admin submission queue. diff --git a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c index ac77afe113..d87212ffb2 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressHci.c @@ -728,20 +728,9 @@ NvmeControllerInit ( UINT8 Mn[41]; // - // Save original PCI attributes and enable this controller. + // Enable this controller. // PciIo = Private->PciIo; - Status = PciIo->Attributes ( - PciIo, - EfiPciIoAttributeOperationGet, - 0, - &Private->PciAttributes - ); - - if (EFI_ERROR (Status)) { - return Status; - } - Status = PciIo->Attributes ( PciIo, EfiPciIoAttributeOperationSupported, @@ -764,19 +753,6 @@ NvmeControllerInit ( return Status; } - // - // Enable 64-bit DMA support in the PCI layer. - // - Status = PciIo->Attributes ( - PciIo, - EfiPciIoAttributeOperationEnable, - EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE, - NULL - ); - if (EFI_ERROR (Status)) { - DEBUG ((DEBUG_WARN, "NvmeControllerInit: failed to enable 64-bit DMA (%r)\n", Status)); - } - // // Read the Controller Capabilities register and verify that the NVM command set is supported // -- 2.30.2