From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web08.5314.1646210697980169129 for ; Wed, 02 Mar 2022 00:45:10 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lixianglai@loongson.cn) Received: from localhost.localdomain (unknown [10.2.5.185]) by mail.loongson.cn (Coremail) with SMTP id AQAAf9Dxn89_Lh9i7TkBAA--.6283S10; Wed, 02 Mar 2022 16:44:52 +0800 (CST) From: "xianglai" To: devel@edk2.groups.io Subject: [edk2-platforms][PATCH V1 08/15] Platform/Loongson: Support PEI phase. Date: Wed, 2 Mar 2022 03:44:40 -0500 Message-Id: <20220302084447.2991355-9-lixianglai@loongson.cn> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220302084447.2991355-1-lixianglai@loongson.cn> References: <20220302084447.2991355-1-lixianglai@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf9Dxn89_Lh9i7TkBAA--.6283S10 X-Coremail-Antispam: 1UD129KBjvAXoWfAw1ktFy7Kw17JFWkXrWfGrg_yoW5Xr1kto W8JFyIkw4UGr1rXw1UG3ZrtrWIvF1Yva1Yqr1rZayUAFs0yr13tF98J3srGw15AFn8Awn8 G3yfGaykJFW2q3s5n29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjDUYxBIdaVFxhVjvjDU0xZFpf9x0zRUUUUUUUUU= X-CM-SenderInfo: 5ol0xt5qjotxo6or00hjvr0hdfq/ Content-Transfer-Encoding: quoted-printable Platform PEI module for LoongArch platform initialization. Signed-off-by: xianglai li --- .../Loongson/LoongArchQemuPkg/Loongson.dec | 22 ++ .../Loongson/LoongArchQemuPkg/Loongson.dsc | 66 ++++- .../Loongson/LoongArchQemuPkg/Loongson.fdf | 51 ++++ .../LoongArchQemuPkg/PlatformPei/Fv.c | 61 ++++ .../LoongArchQemuPkg/PlatformPei/MemDetect.c | 116 ++++++++ .../LoongArchQemuPkg/PlatformPei/Platform.c | 264 ++++++++++++++++++ .../LoongArchQemuPkg/PlatformPei/Platform.h | 87 ++++++ .../PlatformPei/PlatformPei.inf | 72 +++++ 8 files changed, 738 insertions(+), 1 deletion(-) create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Fv.c create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/MemDetec= t.c create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform= .c create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform= .h create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform= Pei.inf diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec b/Platform/Loo= ngson/LoongArchQemuPkg/Loongson.dec index 248b668fd1..aca53583f1 100644 --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec @@ -30,9 +30,31 @@ [PcdsFixedAtBuild, PcdsDynamic]=0D gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x00000003= =0D gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x00000004= =0D + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvBase|0x0|UINT64|0x00000008= =0D + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvSize|0x0|UINT32|0x00000009= =0D gLoongArchQemuPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0|UINT3= 2|0x00000016=0D gLoongArchQemuPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|0|UI= NT32|0x00000017=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase|0x0|UINT64|0x00000018= =0D + gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreePadding|256|UINT32|0x000000= 19=0D +=0D gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase|0|UINT64|0x0000001c= =0D gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize|0|UINT32|0x0000001d= =0D + gLoongArchQemuPkgTokenSpaceGuid.PcdUefiRamTop|0x0|UINT64|0x0000001e=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdRamRegionsBottom|0x0|UINT64|0x0000002= 2=0D gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvBase|0x0|UINT64|0x00000028= =0D gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvSize|0x0|UINT32|0x00000029= =0D +=0D +[PcdsFixedAtBuild.LOONGARCH64]=0D + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32|UINT8|0x00000010=0D + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0|UINT8|0x00000011=0D +=0D +[PcdsDynamic]=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdRamSize|0x40000000|UINT64|0x00000041= =0D + gLoongArchQemuPkgTokenSpaceGuid.PcdFwCfgSelectorAddress|0x0|UINT64|0x000= 00042=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdFwCfgDataAddress|0x0|UINT64|0x0000004= 3=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdSwapPageDir|0x0|UINT64|0x00000044=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPgd|0x0|UINT64|0x00000045=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPud|0x0|UINT64|0x00000046=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPmd|0x0|UINT64|0x00000047=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPte|0x0|UINT64|0x00000048=0D +=0D diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc b/Platform/Loo= ngson/LoongArchQemuPkg/Loongson.dsc index f23fed77e6..09b324c3f7 100644 --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc @@ -57,22 +57,58 @@ =0D [LibraryClasses.common]=0D PcdLib | MdePkg/Library/BasePcdLibNull/BasePcd= LibNull.inf=0D + TimerLib | Platform/Loongson/LoongArchQemuPkg/Li= brary/StableTimerLib/TimerLib.inf=0D PrintLib | MdePkg/Library/BasePrintLib/BasePrint= Lib.inf=0D BaseMemoryLib | MdePkg/Library/BaseMemoryLib/BaseMemo= ryLib.inf=0D =0D =0D BaseLib | MdePkg/Library/BaseLib/BaseLib.inf=0D + PerformanceLib | MdePkg/Library/BasePerformanceLibNull= /BasePerformanceLibNull.inf=0D PeCoffLib | MdePkg/Library/BasePeCoffLib/BasePeCo= ffLib.inf=0D + CacheMaintenanceLib | MdePkg/Library/BaseCacheMaintenanceLi= b/BaseCacheMaintenanceLib.inf=0D + UefiDecompressLib | MdePkg/Library/BaseUefiDecompressLib/= BaseUefiDecompressLib.inf=0D PeCoffGetEntryPointLib | MdePkg/Library/BasePeCoffGetEntryPoin= tLib/BasePeCoffGetEntryPointLib.inf=0D IoLib | MdePkg/Library/BaseIoLibIntrinsic/Bas= eIoLibIntrinsic.inf=0D SerialPortLib | Platform/Loongson/LoongArchQemuPkg/Li= brary/SerialPortLib/SerialPortLib.inf=0D DebugPrintErrorLevelLib | MdePkg/Library/BaseDebugPrintErrorLev= elLib/BaseDebugPrintErrorLevelLib.inf=0D + FdtLib | EmbeddedPkg/Library/FdtLib/FdtLib.inf= =0D PeCoffExtraActionLib | MdePkg/Library/BasePeCoffExtraActionL= ibNull/BasePeCoffExtraActionLibNull.inf=0D DebugAgentLib | MdeModulePkg/Library/DebugAgentLibNul= l/DebugAgentLibNull.inf=0D =0D DebugLib | MdePkg/Library/BaseDebugLibSerialPort= /BaseDebugLibSerialPort.inf=0D =0D + PeiServicesLib | MdePkg/Library/PeiServicesLib/PeiServ= icesLib.inf=0D +[LibraryClasses.common.SEC]=0D + ReportStatusCodeLib | MdeModulePkg/Library/PeiReportStatusC= odeLib/PeiReportStatusCodeLib.inf=0D + HobLib | MdePkg/Library/PeiHobLib/PeiHobLib.in= f=0D + MemoryAllocationLib | MdePkg/Library/PeiMemoryAllocationLib= /PeiMemoryAllocationLib.inf=0D +=0D +[LibraryClasses.common.PEI_CORE]=0D + HobLib | MdePkg/Library/PeiHobLib/PeiHobLib.in= f=0D + PeiServicesTablePointerLib | Platform/Loongson/LoongArchQemuPkg/Li= brary/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf=0D + MemoryAllocationLib | MdePkg/Library/PeiMemoryAllocationLib= /PeiMemoryAllocationLib.inf=0D + PeiCoreEntryPoint | MdePkg/Library/PeiCoreEntryPoint/PeiC= oreEntryPoint.inf=0D + ReportStatusCodeLib | MdeModulePkg/Library/PeiReportStatusC= odeLib/PeiReportStatusCodeLib.inf=0D + OemHookStatusCodeLib | MdeModulePkg/Library/OemHookStatusCod= eLibNull/OemHookStatusCodeLibNull.inf=0D + PeCoffGetEntryPointLib | MdePkg/Library/BasePeCoffGetEntryPoin= tLib/BasePeCoffGetEntryPointLib.inf=0D + QemuFwCfgLib | Platform/Loongson/LoongArchQemuPkg/Li= brary/QemuFwCfgLib/QemuFwCfgLib.inf=0D + MmuLib | Platform/Loongson/LoongArchQemuPkg/Li= brary/MmuLib/MmuBaseLibPei.inf=0D +=0D +[LibraryClasses.common.PEIM]=0D + HobLib | MdePkg/Library/PeiHobLib/PeiHobLib.in= f=0D + PeiServicesTablePointerLib | Platform/Loongson/LoongArchQemuPkg/Li= brary/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf=0D + MemoryAllocationLib | MdePkg/Library/PeiMemoryAllocationLib= /PeiMemoryAllocationLib.inf=0D + PeimEntryPoint | MdePkg/Library/PeimEntryPoint/PeimEnt= ryPoint.inf=0D + ReportStatusCodeLib | MdeModulePkg/Library/PeiReportStatusC= odeLib/PeiReportStatusCodeLib.inf=0D + OemHookStatusCodeLib | MdeModulePkg/Library/OemHookStatusCod= eLibNull/OemHookStatusCodeLibNull.inf=0D + PeCoffGetEntryPointLib | MdePkg/Library/BasePeCoffGetEntryPoin= tLib/BasePeCoffGetEntryPointLib.inf=0D + PeiResourcePublicationLib | MdePkg/Library/PeiResourcePublication= Lib/PeiResourcePublicationLib.inf=0D + ExtractGuidedSectionLib | MdePkg/Library/PeiExtractGuidedSectio= nLib/PeiExtractGuidedSectionLib.inf=0D + PcdLib | MdePkg/Library/PeiPcdLib/PeiPcdLib.in= f=0D + QemuFwCfgS3Lib | OvmfPkg/Library/QemuFwCfgS3Lib/PeiQem= uFwCfgS3LibFwCfg.inf=0D + QemuFwCfgLib | Platform/Loongson/LoongArchQemuPkg/Li= brary/QemuFwCfgLib/QemuFwCfgLib.inf=0D =0D + MmuLib | Platform/Loongson/LoongArchQemuPkg/Librar= y/MmuLib/MmuBaseLibPei.inf=0D =0D =0D ##########################################################################= ######=0D @@ -119,11 +155,19 @@ # ASSERT_BREAKPOINT_ENABLED 0x10=0D # ASSERT_DEADLOOP_ENABLED 0x20=0D =0D +##########################################################################= #############=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdRamRegionsBottom | 0= x90000000=0D gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress | 0= x90000000=0D gLoongArchQemuPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize | 0= x10000=0D gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase | 0= x90010000=0D gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize | 0= x10000=0D -=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase | 0= x1c400000=0D + #=0D + # minimal memory for uefi bios should be 512M=0D + # 0x00000000 - 0x10000000=0D + # 0x90000000 - 0xA0000000=0D + #=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdUefiRamTop | 0= xA0000000=0D =0D [Components]=0D =0D @@ -131,3 +175,23 @@ # SEC Phase modules=0D #=0D Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.inf=0D +=0D + #=0D + # PEI Phase modules=0D + #=0D + MdeModulePkg/Core/Pei/PeiMain.inf=0D + MdeModulePkg/Universal/PCD/Pei/Pcd.inf {=0D + =0D + PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf=0D + }=0D + MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf= =0D + MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {=0D + =0D + NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompre= ssLib.inf=0D + }=0D +=0D + Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf {=0D + =0D + PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf=0D + }=0D +=0D diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf b/Platform/Loo= ngson/LoongArchQemuPkg/Loongson.fdf index 128b3843db..f964304fdc 100644 --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf @@ -45,9 +45,60 @@ READ_LOCK_STATUS =3D TRUE =0D INF Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.inf=0D =0D +##########################################################################= ###########################=0D +[FV.PEIFV]=0D +FvNameGuid =3D 6f856a84-de7d-4af9-93a3-342b4ecb46eb=0D +BlockSize =3D $(BLOCK_SIZE)=0D +FvAlignment =3D 16=0D +ERASE_POLARITY =3D 1=0D +MEMORY_MAPPED =3D TRUE=0D +STICKY_WRITE =3D TRUE=0D +LOCK_CAP =3D TRUE=0D +LOCK_STATUS =3D TRUE=0D +READ_DISABLED_CAP =3D TRUE=0D +READ_ENABLED_CAP =3D TRUE=0D +READ_STATUS =3D TRUE=0D +READ_LOCK_CAP =3D TRUE=0D +READ_LOCK_STATUS =3D TRUE=0D +WRITE_DISABLED_CAP =3D TRUE=0D +WRITE_ENABLED_CAP =3D TRUE=0D +WRITE_STATUS =3D TRUE=0D +WRITE_LOCK_CAP =3D TRUE=0D +WRITE_LOCK_STATUS =3D TRUE=0D +=0D +APRIORI PEI {=0D + INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf=0D +}=0D +=0D +#=0D +# PEI Phase modules=0D +#=0D +=0D +INF MdeModulePkg/Core/Pei/PeiMain.inf=0D +INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf=0D +INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf=0D +INF Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf=0D +=0D ##########################################################################= ###########################=0D [Rule.Common.SEC]=0D FILE SEC =3D $(NAMED_GUID) {=0D TE TE Align =3D Auto $(INF_OUTPUT)/$(MODULE_NAME).efi=0D UI STRING =3D"$(MODULE_NAME)" Optional=0D }=0D +=0D +##########################################################################= ###########################=0D +[Rule.Common.PEI_CORE]=0D + FILE PEI_CORE =3D $(NAMED_GUID) {=0D + TE TE Align=3DAuto $(INF_OUTPUT)/$(MODULE_NAME).efi=0D + UI STRING =3D"$(MODULE_NAME)" Optional=0D + }=0D +=0D +##########################################################################= ###########################=0D +[Rule.Common.PEIM]=0D + FILE PEIM =3D $(NAMED_GUID) {=0D + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depe= x=0D + PE32 PE32 Align=3DAuto $(INF_OUTPUT)/$(MODULE_NAME).ef= i=0D + UI STRING=3D"$(MODULE_NAME)" Optional=0D + }=0D +=0D +##########################################################################= ###########################=0D diff --git a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Fv.c b/Platform= /Loongson/LoongArchQemuPkg/PlatformPei/Fv.c new file mode 100644 index 0000000000..f79d4506b1 --- /dev/null +++ b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Fv.c @@ -0,0 +1,61 @@ +/** @file=0D + Build FV related hobs for platform.=0D +=0D + Copyright (c) 2021 Loongson Technology Corporation Limited. All rights r= eserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +=0D +#include "PiPei.h"=0D +#include "Platform.h"=0D +#include =0D +#include =0D +#include =0D +#include =0D +=0D +=0D +/**=0D + Publish PEI & DXE (Decompressed) Memory based FVs to let PEI=0D + and DXE know about them.=0D +=0D + @retval EFI_SUCCESS Platform PEI FVs were initialized successfully.=0D +=0D +**/=0D +EFI_STATUS=0D +PeiFvInitialization (=0D + VOID=0D + )=0D +{=0D + DEBUG ((DEBUG_INFO, "Platform PEI Firmware Volume Initialization\n"));=0D +=0D + //=0D + // Create a memory allocation HOB for the PEI FV.=0D + //=0D + BuildMemoryAllocationHob (=0D + PcdGet64 (PcdSecPeiTempRamBase),=0D + PcdGet32 (PcdSecPeiTempRamSize),=0D + EfiBootServicesData=0D + );=0D +=0D + //=0D + // Let DXE know about the DXE FV=0D + //=0D + BuildFvHob (PcdGet64 (PcdFlashDxeFvBase), PcdGet32 (PcdFlashDxeFvSize));= =0D +=0D + //=0D + // Let PEI know about the DXE FV so it can find the DXE Core=0D + //=0D + DEBUG ((DEBUG_INFO, "DXEFV base:%p size:%x\n", (VOID *) (UINTN)PcdGet64 = (PcdFlashDxeFvBase),=0D + PcdGet32 (PcdFlashDxeFvSize)));=0D + PeiServicesInstallFvInfoPpi (=0D + NULL,=0D + (VOID *) (UINTN)PcdGet64 (PcdFlashDxeFvBase),=0D + PcdGet32 (PcdFlashDxeFvSize),=0D + NULL,=0D + NULL=0D + );=0D +=0D + return EFI_SUCCESS;=0D +}=0D diff --git a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/MemDetect.c b/P= latform/Loongson/LoongArchQemuPkg/PlatformPei/MemDetect.c new file mode 100644 index 0000000000..c40d7d5c71 --- /dev/null +++ b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/MemDetect.c @@ -0,0 +1,116 @@ +/** @file=0D + Memory Detection for Virtual Machines.=0D +=0D + Copyright (c) 2021 Loongson Technology Corporation Limited. All rights r= eserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +=0D +//=0D +// The package level header files this module uses=0D +//=0D +#include =0D +=0D +//=0D +// The Library classes this module consumes=0D +//=0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +=0D +#include "Platform.h"=0D +=0D +/**=0D + Publish PEI core memory=0D +=0D + @return EFI_SUCCESS The PEIM initialized successfully.=0D +=0D +**/=0D +EFI_STATUS=0D +PublishPeiMemory (=0D + VOID=0D + )=0D +{=0D + EFI_STATUS Status;=0D + UINT64 Base;=0D + UINT64 Size;=0D + UINT64 RamTop;=0D +=0D + //=0D + // Determine the range of memory to use during PEI=0D + //=0D + Base =3D PcdGet64 (PcdSecPeiTempRamBase) + PcdGet32 (PcdSecPeiTempRamSiz= e);=0D + RamTop =3D PcdGet64 (PcdUefiRamTop);=0D + Size =3D RamTop - Base;=0D +=0D +=0D + //=0D + // Publish this memory to the PEI Core=0D + //=0D + Status =3D PublishSystemMemory (Base, Size);=0D + ASSERT_EFI_ERROR (Status);=0D +=0D + DEBUG ((DEBUG_INFO, "Publish Memory Initialize done.\n"));=0D + return Status;=0D +}=0D +=0D +/**=0D + Peform Memory Detection=0D + Publish system RAM and reserve memory regions=0D +**/=0D +VOID=0D +InitializeRamRegions (=0D + VOID=0D + )=0D +{=0D + UINT64 Base;=0D + UINT64 End;=0D +=0D +=0D + //=0D + // DDR memory space address range=0D + // 0x00000000 - 0x10000000 lower 256M memory space=0D + // 0x90000000 - BASE_4GB if there is=0D + // BASE_4GB -=0D + Base =3D PcdGet64 (PcdRamRegionsBottom);=0D + End =3D Base + PcdGet64 (PcdRamSize) - 0x10000000;=0D +=0D + //=0D + // Create memory HOBs.=0D + // Put memory below 4G address space at the first memory HOB=0D + //=0D + DEBUG ((DEBUG_INFO, "%a: MemoryBase=3D%llx, MemoryEnd=3D%llx\n", __FUNCT= ION__, Base, End));=0D +=0D + if (End > BASE_4GB) {=0D + AddMemoryRangeHob (Base, BASE_4GB);=0D + AddMemoryRangeHob (BASE_4GB, End);=0D + } else {=0D +=0D + AddMemoryRangeHob (Base, End);=0D + }=0D + AddMemoryRangeHob (0x0, 0x10000000);=0D +=0D + //=0D + // Lock the scope of the cache.=0D + //=0D + BuildMemoryAllocationHob (=0D + PcdGet64 (PcdSecPeiTempRamBase),=0D + PcdGet32 (PcdSecPeiTempRamSize),=0D + EfiACPIMemoryNVS=0D + );=0D +=0D + //=0D + // SEC stores its table of GUIDed section handlers here.=0D + //=0D + BuildMemoryAllocationHob (=0D + PcdGet64 (PcdGuidedExtractHandlerTableAddress),=0D + PcdGet32 (PcdGuidedExtractHandlerTableSize),=0D + EfiACPIMemoryNVS=0D + );=0D +}=0D diff --git a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c b/Pl= atform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c new file mode 100644 index 0000000000..6f6c53fcab --- /dev/null +++ b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c @@ -0,0 +1,264 @@ +/** @file=0D + Platform PEI driver=0D +=0D + Copyright (c) 2021 Loongson Technology Corporation Limited. All rights r= eserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D + @par Glossary:=0D + - Mem - Memory=0D +**/=0D +=0D +=0D +//=0D +// The package level header files this module uses=0D +//=0D +#include =0D +//=0D +// The Library classes this module consumes=0D +//=0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +=0D +#include "Platform.h"=0D +=0D +/* TODO */=0D +EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] =3D {=0D + { EfiReservedMemoryType, 0x004 },=0D + { EfiRuntimeServicesData, 0x024 },=0D + { EfiRuntimeServicesCode, 0x030 },=0D + { EfiBootServicesCode, 0x180 },=0D + { EfiBootServicesData, 0xF00 },=0D + { EfiMaxMemoryType, 0x000 }=0D +};=0D +=0D +//=0D +// Module globals=0D +//=0D +CONST EFI_PEI_PPI_DESCRIPTOR mPpiListBootMode =3D {=0D + (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),=0D + &gEfiPeiMasterBootModePpiGuid,=0D + NULL=0D +};=0D +=0D +/**=0D + Create Reserved type memory range hand off block.=0D +=0D + @param MemoryBase memory base address.=0D + @param MemoryLimit memory length.=0D +=0D + @return VOID=0D +**/=0D +VOID=0D +AddReservedMemoryBaseSizeHob (=0D + EFI_PHYSICAL_ADDRESS MemoryBase,=0D + UINT64 MemorySize=0D + )=0D +{=0D + BuildResourceDescriptorHob (=0D + EFI_RESOURCE_MEMORY_RESERVED,=0D + EFI_RESOURCE_ATTRIBUTE_PRESENT |=0D + EFI_RESOURCE_ATTRIBUTE_INITIALIZED |=0D + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |=0D + EFI_RESOURCE_ATTRIBUTE_TESTED,=0D + MemoryBase,=0D + MemorySize=0D + );=0D +}=0D +/**=0D + Create system type memory range hand off block.=0D +=0D + @param MemoryBase memory base address.=0D + @param MemoryLimit memory length.=0D +=0D + @return VOID=0D +**/=0D +VOID=0D +AddMemoryBaseSizeHob (=0D + EFI_PHYSICAL_ADDRESS MemoryBase,=0D + UINT64 MemorySize=0D + )=0D +{=0D + BuildResourceDescriptorHob (=0D + EFI_RESOURCE_SYSTEM_MEMORY,=0D + EFI_RESOURCE_ATTRIBUTE_PRESENT |=0D + EFI_RESOURCE_ATTRIBUTE_INITIALIZED |=0D + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |=0D + EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |=0D + EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |=0D + EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |=0D + EFI_RESOURCE_ATTRIBUTE_TESTED,=0D + MemoryBase,=0D + MemorySize=0D + );=0D +}=0D +=0D +/**=0D + Create memory range hand off block.=0D +=0D + @param MemoryBase memory base address.=0D + @param MemoryLimit memory length.=0D +=0D + @return VOID=0D +**/=0D +VOID=0D +AddMemoryRangeHob (=0D + EFI_PHYSICAL_ADDRESS MemoryBase,=0D + EFI_PHYSICAL_ADDRESS MemoryLimit=0D + )=0D +{=0D + AddMemoryBaseSizeHob (MemoryBase, (UINT64) (MemoryLimit - MemoryBase));= =0D +}=0D +/**=0D + Create memory type information hand off block.=0D +=0D + @param VOID=0D +=0D + @return VOID=0D +**/=0D +VOID=0D +MemMapInitialization (=0D + VOID=0D + )=0D +{=0D + DEBUG ((DEBUG_INFO, "=3D=3D%a=3D=3D\n", __func__));=0D + //=0D + // Create Memory Type Information HOB=0D + //=0D + BuildGuidDataHob (=0D + &gEfiMemoryTypeInformationGuid,=0D + mDefaultMemoryTypeInformation,=0D + sizeof (mDefaultMemoryTypeInformation)=0D + );=0D +}=0D +=0D +/**=0D + Misc Initialization.=0D +=0D + @param VOID=0D +=0D + @return VOID=0D +**/=0D +VOID=0D +MiscInitialization (=0D + VOID=0D + )=0D +{=0D + DEBUG ((DEBUG_INFO, "=3D=3D%a=3D=3D\n", __func__));=0D + //=0D + // Creat CPU HOBs.=0D + //=0D + BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize= ));=0D +}=0D +/**=0D + add fdt hand off block.=0D +=0D + @param VOID=0D +=0D + @return VOID=0D +**/=0D +VOID=0D +AddFdtHob (VOID)=0D +{=0D + VOID *Base;=0D + VOID *NewBase;=0D + UINTN FdtSize;=0D + UINTN FdtPages;=0D + UINT64 *FdtHobData;=0D +=0D + Base =3D (VOID*)(UINTN)PcdGet64 (PcdDeviceTreeBase);=0D + ASSERT (Base !=3D NULL);=0D +=0D + FdtSize =3D fdt_totalsize (Base) + PcdGet32 (PcdDeviceTreePadding);=0D + FdtPages =3D EFI_SIZE_TO_PAGES (FdtSize);=0D + NewBase =3D AllocatePages (FdtPages);=0D + ASSERT (NewBase !=3D NULL);=0D + fdt_open_into (Base, NewBase, EFI_PAGES_TO_SIZE (FdtPages));=0D +=0D + FdtHobData =3D BuildGuidHob (&gFdtHobGuid, sizeof *FdtHobData);=0D + ASSERT (FdtHobData !=3D NULL);=0D + *FdtHobData =3D (UINTN)NewBase;=0D +=0D +}=0D +=0D +/**=0D + Fetch the size of system memory from QEMU.=0D +=0D + @param VOID=0D +=0D + @return VOID=0D +**/=0D +VOID=0D +SystemMemorySizeInitialization (=0D + VOID=0D + )=0D +{=0D + UINT64 RamSize;=0D + RETURN_STATUS PcdStatus;=0D +=0D + QemuFwCfgSelectItem (QemuFwCfgItemRamSize);=0D + RamSize=3D QemuFwCfgRead64 ();=0D + DEBUG ((DEBUG_INFO, "%a: QEMU reports %dM system memory\n", __FUNCTION__= ,=0D + RamSize/1024/1024));=0D +=0D + //=0D + // If the fw_cfg key or fw_cfg entirely is unavailable, no change to PCD= .=0D + //=0D + if (RamSize =3D=3D 0) {=0D + return;=0D + }=0D +=0D + //=0D + // Otherwise, set RamSize to PCD.=0D + //=0D + PcdStatus =3D PcdSet64S (PcdRamSize, RamSize);=0D + ASSERT_RETURN_ERROR (PcdStatus);=0D +}=0D +=0D +/**=0D + Perform Platform PEI initialization.=0D +=0D + @param FileHandle Handle of the file being invoked.=0D + @param PeiServices Describes the list of possible PEI Services.=0D +=0D + @return EFI_SUCCESS The PEIM initialized successfully.=0D +=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +InitializePlatform (=0D + IN EFI_PEI_FILE_HANDLE FileHandle,=0D + IN CONST EFI_PEI_SERVICES **PeiServices=0D + )=0D +{=0D + EFI_STATUS Status;=0D +=0D + DEBUG ((DEBUG_INFO, "Platform PEIM Loaded\n"));=0D +=0D + Status =3D PeiServicesInstallPpi (&mPpiListBootMode);=0D + ASSERT_EFI_ERROR (Status);=0D +=0D + SystemMemorySizeInitialization ();=0D + PublishPeiMemory ();=0D + PeiFvInitialization ();=0D + InitializeRamRegions ();=0D + MemMapInitialization ();=0D + MiscInitialization ();=0D + AddFdtHob ();=0D + ConfigureMmu ();=0D +=0D + return EFI_SUCCESS;=0D +}=0D diff --git a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.h b/Pl= atform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.h new file mode 100644 index 0000000000..bc44f233e7 --- /dev/null +++ b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.h @@ -0,0 +1,87 @@ +/** @file=0D + Platform PEI module include file.=0D +=0D + Copyright (c) 2021 Loongson Technology Corporation Limited. All rights r= eserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#ifndef PLATFORM_H_=0D +#define PLATFORM_H_=0D +=0D +#include =0D +=0D +/**=0D + Create system type memory range hand off block.=0D +=0D + @param MemoryBase memory base address.=0D + @param MemoryLimit memory length.=0D +=0D + @return VOID=0D +**/=0D +VOID=0D +AddMemoryBaseSizeHob (=0D + EFI_PHYSICAL_ADDRESS MemoryBase,=0D + UINT64 MemorySize=0D + );=0D +=0D +/**=0D + Create memory range hand off block.=0D +=0D + @param MemoryBase memory base address.=0D + @param MemoryLimit memory length.=0D +=0D + @return VOID=0D +**/=0D +VOID=0D +AddMemoryRangeHob (=0D + EFI_PHYSICAL_ADDRESS MemoryBase,=0D + EFI_PHYSICAL_ADDRESS MemoryLimit=0D + );=0D +=0D +/**=0D + Create Reserved type memory range hand off block.=0D +=0D + @param MemoryBase memory base address.=0D + @param MemoryLimit memory length.=0D +=0D + @return VOID=0D +**/=0D +VOID=0D +AddReservedMemoryBaseSizeHob (=0D + EFI_PHYSICAL_ADDRESS MemoryBase,=0D + UINT64 MemorySize=0D + );=0D +/**=0D + Publish PEI core memory=0D +=0D + @return EFI_SUCCESS The PEIM initialized successfully.=0D +=0D +**/=0D +EFI_STATUS=0D +PublishPeiMemory (=0D + VOID=0D + );=0D +/**=0D + Publish system RAM and reserve memory regions=0D +=0D +**/=0D +VOID=0D +InitializeRamRegions (=0D + VOID=0D + );=0D +=0D +/**=0D + Publish PEI & DXE (Decompressed) Memory based FVs to let PEI=0D + and DXE know about them.=0D +=0D + @retval EFI_SUCCESS Platform PEI FVs were initialized successfully.=0D +=0D +**/=0D +EFI_STATUS=0D +PeiFvInitialization (=0D + VOID=0D + );=0D +=0D +#endif // _PLATFORM_PEI_H_INCLUDED_=0D diff --git a/Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf= b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf new file mode 100644 index 0000000000..e8d3ed0008 --- /dev/null +++ b/Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf @@ -0,0 +1,72 @@ +=0D +## @file=0D +# Platform PEI driver=0D +#=0D +# Copyright (c) 2021 Loongson Technology Corporation Limited. All rights = reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +[Defines]=0D + INF_VERSION =3D 0x00010005=0D + BASE_NAME =3D PlatformPei=0D + FILE_GUID =3D 4c0e81e5-e8e3-4eef-b24b-19b686e9ab53= =0D + MODULE_TYPE =3D PEIM=0D + VERSION_STRING =3D 1.0=0D + ENTRY_POINT =3D InitializePlatform=0D +=0D +[Sources]=0D + Fv.c=0D + MemDetect.c=0D + Platform.c=0D +=0D +=0D +[Packages]=0D + ArmVirtPkg/ArmVirtPkg.dec=0D + MdePkg/MdePkg.dec=0D + MdeModulePkg/MdeModulePkg.dec=0D + EmbeddedPkg/EmbeddedPkg.dec=0D + Platform/Loongson/LoongArchQemuPkg/Loongson.dec=0D + OvmfPkg/OvmfPkg.dec=0D +=0D +[Ppis]=0D + gEfiPeiMasterBootModePpiGuid=0D +=0D +[Guids]=0D + gEfiMemoryTypeInformationGuid=0D + gFdtHobGuid=0D +=0D +[LibraryClasses]=0D + DebugLib=0D + BaseMemoryLib=0D + HobLib=0D + IoLib=0D + PeiResourcePublicationLib=0D + PeiServicesLib=0D + PeiServicesTablePointerLib=0D + PeimEntryPoint=0D + QemuFwCfgLib=0D + PcdLib=0D + TimerLib=0D + MmuLib=0D +=0D +[Pcd]=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdRamSize=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreePadding=0D +=0D +[FixedPcd]=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvBase=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvSize=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdRamRegionsBottom=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdUefiRamTop=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize=0D + gLoongArchQemuPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize=0D + gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress=0D + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize=0D + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize=0D +=0D +[Depex]=0D + TRUE=0D --=20 2.27.0