From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out2-smtp.messagingengine.com (out2-smtp.messagingengine.com [66.111.4.26]) by mx.groups.io with SMTP id smtpd.web11.2779.1646454002131933246 for ; Fri, 04 Mar 2022 20:20:02 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@bsdio.com header.s=fm2 header.b=UZNhmrWl; spf=pass (domain: bsdio.com, ip: 66.111.4.26, mailfrom: rebecca@bsdio.com) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 5A9D85C01F0; Fri, 4 Mar 2022 23:20:01 -0500 (EST) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Fri, 04 Mar 2022 23:20:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bsdio.com; h=cc :cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm2; bh=j2hbmp3uuFW83ia3NtxuPTbwedMbtl LjSjo5B9x5CAo=; b=UZNhmrWljhCvBwsZGxNSQ+jEG4/eP0iEpDNNt7QsidwAdl ojSZ2EYzoJhGRzfUyMArFaEgL1XDMwzsDm2jWd5pc7q8n5mdq13aOwTS3NTDdVwT Jq4US1vfmNZPD+oLQNIa/gKoSG29rKhQIy8g//FUdAOEgwD+kGUN2zSfDQzpyCCf bGNYvCk/NsoOBrwJSmq1nBRt1osSwCxu+MzKeF/FPqgQVM6ES82LEFhymIux/0nj LghzzoQtYfYnvBtCh/LJzX2BplWpsbB8X2m9TSuaYpzAr9lLaU9ykRJC//GRcZAd Bj27J6baYi1Su7Muo7D966PG2XLNtAZprieI7cyQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm2; bh=j2hbmp 3uuFW83ia3NtxuPTbwedMbtlLjSjo5B9x5CAo=; b=aSxzFeS0dr8x49IGfldcjJ +BQ5v3/ig5GHG3ep1tqSSkaadYUbyfxoND2/6NYlGKdl2o1MpKvSwazjIFasbZO8 FfUPgE5j6khkfXsR4abKMqCr9iUtvJitkIyAIDN0YYnFOBI2XVwBMKc9eGODmXgS f+3BQpDP2oxgGkK5dGuak8YeoC/eNkexh65uLB6w5qAAahzKD24WuH0qxWhZUnAY XEHoRe9Lazj8tE5Jm+mBRGYgnaCZQYyBXDMosp8rDqZaDInFZrUVSm0w3phT2EmM t0C6IIi110hpr5tQFgJrcPh5MO2TPRstKXC8HLWDJAnf3csKTRBniF8hUmw/qvJg == X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvvddruddtledgieehucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpeftvggsvggt tggrucevrhgrnhcuoehrvggsvggttggrsegsshguihhordgtohhmqeenucggtffrrghtth gvrhhnpeejjeehfffhieelleeffffhvefgkeeuhfegvdfhleeufffhkedtffegkeeugfel feenucffohhmrghinhepuggvvhhitggvrdiivghrohenucevlhhushhtvghrufhiiigvpe dtnecurfgrrhgrmhepmhgrihhlfhhrohhmpehrvggsvggttggrsegsshguihhordgtohhm X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Fri, 4 Mar 2022 23:20:00 -0500 (EST) From: "Rebecca Cran" To: devel@edk2.groups.io, Ard Biesheuvel , Thomas Abraham , Sami Mujawar Cc: Rebecca Cran Subject: [PATCH edk2-platforms 1/3] Platform/ARM/JunoPkg: Convert AcpiSsdtRootPci.asl from tabs to spaces Date: Fri, 4 Mar 2022 21:19:53 -0700 Message-Id: <20220305041955.20918-2-rebecca@bsdio.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220305041955.20918-1-rebecca@bsdio.com> References: <20220305041955.20918-1-rebecca@bsdio.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Other .asl files in Platform/ARM/JunoPkg/AcpiTables use spaces, while AcpiSsdtRootPci.asl uses tabs. To be consistent, convert it to spaces. Signed-off-by: Rebecca Cran --- Platform/ARM/JunoPkg/AcpiTables/AcpiSsdtRootPci.asl | 288 ++++++++++---------- 1 file changed, 144 insertions(+), 144 deletions(-) diff --git a/Platform/ARM/JunoPkg/AcpiTables/AcpiSsdtRootPci.asl b/Platform/ARM/JunoPkg/AcpiTables/AcpiSsdtRootPci.asl index ba41a9586555..317b621e013e 100644 --- a/Platform/ARM/JunoPkg/AcpiTables/AcpiSsdtRootPci.asl +++ b/Platform/ARM/JunoPkg/AcpiTables/AcpiSsdtRootPci.asl @@ -28,24 +28,24 @@ interrupt type as PCI defaults (Level Triggered, Active Low) are not compatible with GICv2. */ -#define LNK_DEVICE(Unique_Id, Link_Name, irq) \ - Device(Link_Name) { \ - Name(_HID, EISAID("PNP0C0F")) \ - Name(_UID, Unique_Id) \ - Name(_PRS, ResourceTemplate() { \ - Interrupt(ResourceProducer, Level, ActiveHigh, Exclusive) { irq } \ - }) \ - Method (_CRS, 0) { Return (_PRS) } \ - Method (_SRS, 1) { } \ - Method (_DIS) { } \ - } +#define LNK_DEVICE(Unique_Id, Link_Name, irq) \ + Device(Link_Name) { \ + Name(_HID, EISAID("PNP0C0F")) \ + Name(_UID, Unique_Id) \ + Name(_PRS, ResourceTemplate() { \ + Interrupt(ResourceProducer, Level, ActiveHigh, Exclusive) { irq } \ + }) \ + Method (_CRS, 0) { Return (_PRS) } \ + Method (_SRS, 1) { } \ + Method (_DIS) { } \ + } -#define PRT_ENTRY(Address, Pin, Link) \ +#define PRT_ENTRY(Address, Pin, Link) \ Package (4) { \ Address, /* uses the same format as _ADR */ \ Pin, /* The PCI pin number of the device (0-INTA, 1-INTB, 2-INTC, 3-INTD). */ \ - Link, /* Interrupt allocated via Link device. */ \ - Zero /* global system interrupt number (no used) */ \ + Link, /* Interrupt allocated via Link device. */ \ + Zero /* global system interrupt number (no used) */ \ } /* @@ -59,155 +59,155 @@ DefinitionBlock("SsdtPci.aml", "SSDT", 1, "ARMLTD", "ARM-JUNO", EFI_ACPI_ARM_OEM_REVISION) { Scope(_SB) { - // - // PCI Root Complex - // - LNK_DEVICE(1, LNKA, 168) - LNK_DEVICE(2, LNKB, 169) - LNK_DEVICE(3, LNKC, 170) - LNK_DEVICE(4, LNKD, 171) + // + // PCI Root Complex + // + LNK_DEVICE(1, LNKA, 168) + LNK_DEVICE(2, LNKB, 169) + LNK_DEVICE(3, LNKC, 170) + LNK_DEVICE(4, LNKD, 171) - Device(PCI0) + Device(PCI0) { - Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge - Name(_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge - Name(_SEG, Zero) // PCI Segment Group number - Name(_BBN, Zero) // PCI Base Bus Number - Name(_CCA, 1) // Initially mark the PCI coherent (for JunoR1) + Name(_HID, EISAID("PNP0A08")) // PCI Express Root Bridge + Name(_CID, EISAID("PNP0A03")) // Compatible PCI Root Bridge + Name(_SEG, Zero) // PCI Segment Group number + Name(_BBN, Zero) // PCI Base Bus Number + Name(_CCA, 1) // Initially mark the PCI coherent (for JunoR1) - // Root Complex 0 - Device (RP0) { - Name(_ADR, 0xF0000000) // Dev 0, Func 0 - } + // Root Complex 0 + Device (RP0) { + Name(_ADR, 0xF0000000) // Dev 0, Func 0 + } - // PCI Routing Table - Name(_PRT, Package() { - ROOT_PRT_ENTRY(0, LNKA), // INTA - ROOT_PRT_ENTRY(1, LNKB), // INTB - ROOT_PRT_ENTRY(2, LNKC), // INTC - ROOT_PRT_ENTRY(3, LNKD), // INTD - }) - // Root complex resources - Method (_CRS, 0, Serialized) { - Name (RBUF, ResourceTemplate () { - WordBusNumber ( // Bus numbers assigned to this root - ResourceProducer, - MinFixed, MaxFixed, PosDecode, - 0, // AddressGranularity - 0, // AddressMinimum - Minimum Bus Number - 255, // AddressMaximum - Maximum Bus Number - 0, // AddressTranslation - Set to 0 - 256 // RangeLength - Number of Busses - ) + // PCI Routing Table + Name(_PRT, Package() { + ROOT_PRT_ENTRY(0, LNKA), // INTA + ROOT_PRT_ENTRY(1, LNKB), // INTB + ROOT_PRT_ENTRY(2, LNKC), // INTC + ROOT_PRT_ENTRY(3, LNKD), // INTD + }) + // Root complex resources + Method (_CRS, 0, Serialized) { + Name (RBUF, ResourceTemplate () { + WordBusNumber ( // Bus numbers assigned to this root + ResourceProducer, + MinFixed, MaxFixed, PosDecode, + 0, // AddressGranularity + 0, // AddressMinimum - Minimum Bus Number + 255, // AddressMaximum - Maximum Bus Number + 0, // AddressTranslation - Set to 0 + 256 // RangeLength - Number of Busses + ) - DWordMemory ( // 32-bit BAR Windows - ResourceProducer, PosDecode, - MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, // Granularity - 0x50000000, // Min Base Address - 0x57FFFFFF, // Max Base Address - 0x00000000, // Translate - 0x08000000 // Length - ) + DWordMemory ( // 32-bit BAR Windows + ResourceProducer, PosDecode, + MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x50000000, // Min Base Address + 0x57FFFFFF, // Max Base Address + 0x00000000, // Translate + 0x08000000 // Length + ) - QWordMemory ( // 64-bit BAR Windows - ResourceProducer, PosDecode, - MinFixed, MaxFixed, - Cacheable, ReadWrite, - 0x00000000, // Granularity - 0x4000000000, // Min Base Address - 0x40FFFFFFFF, // Max Base Address - 0x00000000, // Translate - 0x100000000 // Length - ) + QWordMemory ( // 64-bit BAR Windows + ResourceProducer, PosDecode, + MinFixed, MaxFixed, + Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x4000000000, // Min Base Address + 0x40FFFFFFFF, // Max Base Address + 0x00000000, // Translate + 0x100000000 // Length + ) - DWordIo ( // IO window - ResourceProducer, - MinFixed, - MaxFixed, - PosDecode, - EntireRange, - 0x00000000, // Granularity - 0x00000000, // Min Base Address - 0x007fffff, // Max Base Address - 0x5f800000, // Translate - 0x00800000, // Length - ,,,TypeTranslation - ) - }) // Name(RBUF) + DWordIo ( // IO window + ResourceProducer, + MinFixed, + MaxFixed, + PosDecode, + EntireRange, + 0x00000000, // Granularity + 0x00000000, // Min Base Address + 0x007fffff, // Max Base Address + 0x5f800000, // Translate + 0x00800000, // Length + ,,,TypeTranslation + ) + }) // Name(RBUF) - Return (RBUF) - } // Method(_CRS) + Return (RBUF) + } // Method(_CRS) - // - // OS Control Handoff - // - Name(SUPP, Zero) // PCI _OSC Support Field value - Name(CTRL, Zero) // PCI _OSC Control Field value + // + // OS Control Handoff + // + Name(SUPP, Zero) // PCI _OSC Support Field value + Name(CTRL, Zero) // PCI _OSC Control Field value - /* - See [1] 6.2.10, [2] 4.5 - */ - Method(_OSC,4) { - // Check for proper UUID - If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { - // Create DWord-adressable fields from the Capabilities Buffer - CreateDWordField(Arg3,0,CDW1) - CreateDWordField(Arg3,4,CDW2) - CreateDWordField(Arg3,8,CDW3) + /* + See [1] 6.2.10, [2] 4.5 + */ + Method(_OSC,4) { + // Check for proper UUID + If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { + // Create DWord-adressable fields from the Capabilities Buffer + CreateDWordField(Arg3,0,CDW1) + CreateDWordField(Arg3,4,CDW2) + CreateDWordField(Arg3,8,CDW3) - // Save Capabilities DWord2 & 3 - Store(CDW2,SUPP) - Store(CDW3,CTRL) + // Save Capabilities DWord2 & 3 + Store(CDW2,SUPP) + Store(CDW3,CTRL) - // Only allow native hot plug control if OS supports: - // * ASPM - // * Clock PM - // * MSI/MSI-X - If(LNotEqual(And(SUPP, 0x16), 0x16)) { - And(CTRL,0x1E,CTRL) // Mask bit 0 (and undefined bits) - } + // Only allow native hot plug control if OS supports: + // * ASPM + // * Clock PM + // * MSI/MSI-X + If(LNotEqual(And(SUPP, 0x16), 0x16)) { + And(CTRL,0x1E,CTRL) // Mask bit 0 (and undefined bits) + } - // Always allow native PME, AER (no dependencies) + // Always allow native PME, AER (no dependencies) - // Never allow SHPC (no SHPC controller in this system) - And(CTRL,0x1D,CTRL) + // Never allow SHPC (no SHPC controller in this system) + And(CTRL,0x1D,CTRL) #if 0 - If(LNot(And(CDW1,1))) { // Query flag clear? - // Disable GPEs for features granted native control. - If(And(CTRL,0x01)) { // Hot plug control granted? - Store(0,HPCE) // clear the hot plug SCI enable bit - Store(1,HPCS) // clear the hot plug SCI status bit - } - If(And(CTRL,0x04)) { // PME control granted? - Store(0,PMCE) // clear the PME SCI enable bit - Store(1,PMCS) // clear the PME SCI status bit - } - If(And(CTRL,0x10)) { // OS restoring PCIe cap structure? - // Set status to not restore PCIe cap structure - // upon resume from S3 - Store(1,S3CR) - } - } + If(LNot(And(CDW1,1))) { // Query flag clear? + // Disable GPEs for features granted native control. + If(And(CTRL,0x01)) { // Hot plug control granted? + Store(0,HPCE) // clear the hot plug SCI enable bit + Store(1,HPCS) // clear the hot plug SCI status bit + } + If(And(CTRL,0x04)) { // PME control granted? + Store(0,PMCE) // clear the PME SCI enable bit + Store(1,PMCS) // clear the PME SCI status bit + } + If(And(CTRL,0x10)) { // OS restoring PCIe cap structure? + // Set status to not restore PCIe cap structure + // upon resume from S3 + Store(1,S3CR) + } + } #endif - If(LNotEqual(Arg1,One)) { // Unknown revision - Or(CDW1,0x08,CDW1) - } + If(LNotEqual(Arg1,One)) { // Unknown revision + Or(CDW1,0x08,CDW1) + } - If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked - Or(CDW1,0x10,CDW1) - } - // Update DWORD3 in the buffer - Store(CTRL,CDW3) - Return(Arg3) - } Else { - Or(CDW1,4,CDW1) // Unrecognized UUID - Return(Arg3) - } - } // End _OSC + If(LNotEqual(CDW3,CTRL)) { // Capabilities bits were masked + Or(CDW1,0x10,CDW1) + } + // Update DWORD3 in the buffer + Store(CTRL,CDW3) + Return(Arg3) + } Else { + Or(CDW1,4,CDW1) // Unrecognized UUID + Return(Arg3) + } + } // End _OSC } // PCI0 } } -- 2.25.1