[PATCH 0/6] [RFC] Rework UefiCpuPkg

["Abner Chang" <abner.chang@hpe.com>]

https://bugzilla.tianocore.org/show_bug.cgi?id=3860

This is the project having rework on UefiCpuPkg in order to support a variety
of processor architectures. Some modules under UefiCpuPkg are required to be
abstract for the different archs.

The first step is to classify UefiCpuPkg modules to IA32 and X64 sections in
DSC file (Patch 1/6). Move the module to Common section later if more than one
archs can leverage the same module (such as Patch 3/6 for BaseUefiCpuLib).

Abner Chang (6):
  [RFC] UefiCpuPkg: Classify IA32/X64 modules in DSC file
  [RFC] UefiCpuPkg/Include: Add header files of RISC-V processor
    architecture
  [RFC] UefiCpuPkg/BaseUefiCpuLib: Add RISC-V RISCV64 instace
  [RFC] UefiCpuPkg/RiscVOpensbLib: Add opensbi submodule
  [RFC] UefiCpuPkg/Library: Add RiscVOpensbiLib
  [RFC] UefiCpuPkg: Update YAML file for RISC-V arch

 UefiCpuPkg/UefiCpuPkg.dec                     |  12 +-
 UefiCpuPkg/UefiCpuPkg.dsc                     |  45 +++--
 .../Library/BaseUefiCpuLib/BaseUefiCpuLib.inf |   8 +-
 .../RiscVOpensbiLib/RiscVOpensbiLib.inf       |  89 ++++++++++
 .../Include/IndustryStandard/RISC-V/RiscV.h   | 162 ++++++++++++++++++
 .../IndustryStandard/RISC-V/RiscVOpensbi.h    |  62 +++++++
 .../Include/Library/RISC-V/RiscVCpuLib.h      | 118 +++++++++++++
 UefiCpuPkg/Include/RISC-V/OpensbiTypes.h      |  82 +++++++++
 UefiCpuPkg/Include/RISC-V/RiscVImpl.h         |  87 ++++++++++
 .gitmodules                                   |  45 ++---
 BaseTools/Conf/tools_def.template             |   2 +-
 .../Library/BaseUefiCpuLib/BaseUefiCpuLib.uni |   5 +-
 .../Library/BaseUefiCpuLib/RISCV64/Cpu.S      | 143 ++++++++++++++++
 .../Library/RISC-V/RiscVOpensbiLib/opensbi    |   1 +
 UefiCpuPkg/UefiCpuPkg.ci.yaml                 |  61 ++++++-
 15 files changed, 877 insertions(+), 45 deletions(-)
 create mode 100644 UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
 create mode 100644 UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscV.h
 create mode 100644 UefiCpuPkg/Include/IndustryStandard/RISC-V/RiscVOpensbi.h
 create mode 100644 UefiCpuPkg/Include/Library/RISC-V/RiscVCpuLib.h
 create mode 100644 UefiCpuPkg/Include/RISC-V/OpensbiTypes.h
 create mode 100644 UefiCpuPkg/Include/RISC-V/RiscVImpl.h
 create mode 100644 UefiCpuPkg/Library/BaseUefiCpuLib/RISCV64/Cpu.S
 create mode 160000 UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi

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2.31.1