From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mx.groups.io with SMTP id smtpd.web12.4829.1648080697438249429 for ; Wed, 23 Mar 2022 17:11:39 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=VMai16kx; spf=pass (domain: intel.com, ip: 192.55.52.120, mailfrom: min.m.xu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648080699; x=1679616699; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3qLyubNr/Rl0707/l6yA3D0MB3zjP1Rs8wyKgyuSRjw=; b=VMai16kxc03zZiH7nkd090SXOEL2fJ2xCtBaEeOnI+zXShDSUrhq3Amj z2WdEdOCHYSX9dHAovLMUptgIlJD3bjbd2tpuMz9ZJIEhD4QTKbUyNOfv AeJ/0z4Byux3eS1zyVEi9EVAyBaHCUoO2BRr8+e9vr8coG3/qIbi/G7Ox zqNR1n9N6CIVz1+2qJOBNHDV0dR89Z8psA8R0zV/16695URBIxbkGKbtf KInxrWf9KigY4KwS73LeOWDUpENjVIA7QdNfC1hP7ztv/lw1LJaQoB3O1 JMjVXLaORUw9GpVrYzcRXg9w9ubQZq6Dw7lFxFlaVFZiSR8qSB8qIzCp6 w==; X-IronPort-AV: E=McAfee;i="6200,9189,10295"; a="257080317" X-IronPort-AV: E=Sophos;i="5.90,205,1643702400"; d="scan'208";a="257080317" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2022 17:11:14 -0700 X-IronPort-AV: E=Sophos;i="5.90,205,1643702400"; d="scan'208";a="649651005" Received: from mxu9-mobl1.ccr.corp.intel.com ([10.255.31.90]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2022 17:11:10 -0700 From: "Min Xu" To: devel@edk2.groups.io Cc: Min Xu , Michael D Kinney , Liming Gao , Zhiguang Liu , Brijesh Singh , Erdem Aktas , James Bottomley , Jiewen Yao , Tom Lendacky , Gerd Hoffmann Subject: [PATCH V10 09/47] MdePkg: Support mmio for Tdx guest in BaseIoLibIntrinsic Date: Thu, 24 Mar 2022 08:09:55 +0800 Message-Id: <20220324001033.1169-10-min.m.xu@intel.com> X-Mailer: git-send-email 2.29.2.windows.2 In-Reply-To: <20220324001033.1169-1-min.m.xu@intel.com> References: <20220324001033.1169-1-min.m.xu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 TDVF access MMIO with TDG.VP.VMCALL to invoke VMM provided emulation functions. If the access to MMIO fails, it fall backs to the direct access. BaseIoLibIntrinsic.inf is the IoLib used by other packages. It will not support I/O in Td guest. But some files are shared between BaseIoLibIntrinsic and BaseIoLibIntrinsicSev (IoLib.c is the example). So IoLibInternalTdxNull.c (which holds the null stub of the Td I/O routines) is included in BaseIoLibIntrinsic.inf. BaseIoLibIntrinsic.inf doesn't import TdxLib so that the Pkgs which include BaseIoLibIntrinsic.inf need not include TdxLib. Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Cc: Brijesh Singh Cc: Erdem Aktas Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Cc: Gerd Hoffmann Acked-by: Gerd Hoffmann Reviewed-by: Liming Gao Signed-off-by: Min Xu --- .../BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf | 2 + .../BaseIoLibIntrinsicSev.inf | 3 + MdePkg/Library/BaseIoLibIntrinsic/IoLib.c | 81 +++++++++++++++++-- 3 files changed, 78 insertions(+), 8 deletions(-) diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf index 97eeada0656e..27b15d9ae256 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf @@ -34,6 +34,8 @@ IoLibMmioBuffer.c BaseIoLibIntrinsicInternal.h IoHighLevel.c + IoLibInternalTdxNull.c + IoLibTdx.h [Sources.IA32] IoLibGcc.c | GCC diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf index 336d79736d9a..a74e54bee8b5 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf +++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsicSev.inf @@ -30,17 +30,20 @@ IoLibMmioBuffer.c BaseIoLibIntrinsicInternal.h IoHighLevel.c + IoLibTdx.h [Sources.IA32] IoLibGcc.c | GCC IoLibMsc.c | MSFT IoLib.c + IoLibInternalTdxNull.c Ia32/IoFifoSev.nasm [Sources.X64] IoLibGcc.c | GCC IoLibMsc.c | MSFT IoLib.c + IoLibInternalTdx.c X64/IoFifoSev.nasm [Packages] diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c index 9d42e21a691c..5bd02b56a1fa 100644 --- a/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c +++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c @@ -7,6 +7,7 @@ **/ #include "BaseIoLibIntrinsicInternal.h" +#include "IoLibTdx.h" /** Reads a 64-bit I/O port. @@ -69,6 +70,8 @@ IoWrite64 ( If 8-bit MMIO register operations are not supported, then ASSERT(). + For Td guest TDVMCALL_MMIO is invoked to read MMIO registers. + @param Address The MMIO register to read. @return The value read. @@ -86,7 +89,13 @@ MmioRead8 ( Flag = FilterBeforeMmIoRead (FilterWidth8, Address, &Value); if (Flag) { MemoryFence (); - Value = *(volatile UINT8 *)Address; + + if (IsTdxGuest ()) { + Value = TdMmioRead8 (Address); + } else { + Value = *(volatile UINT8 *)Address; + } + MemoryFence (); } @@ -104,6 +113,8 @@ MmioRead8 ( If 8-bit MMIO register operations are not supported, then ASSERT(). + For Td guest TDVMCALL_MMIO is invoked to write MMIO registers. + @param Address The MMIO register to write. @param Value The value to write to the MMIO register. @@ -122,7 +133,13 @@ MmioWrite8 ( Flag = FilterBeforeMmIoWrite (FilterWidth8, Address, &Value); if (Flag) { MemoryFence (); - *(volatile UINT8 *)Address = Value; + + if (IsTdxGuest ()) { + TdMmioWrite8 (Address, Value); + } else { + *(volatile UINT8 *)Address = Value; + } + MemoryFence (); } @@ -141,6 +158,8 @@ MmioWrite8 ( If 16-bit MMIO register operations are not supported, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). + For Td guest TDVMCALL_MMIO is invoked to read MMIO registers. + @param Address The MMIO register to read. @return The value read. @@ -159,7 +178,13 @@ MmioRead16 ( Flag = FilterBeforeMmIoRead (FilterWidth16, Address, &Value); if (Flag) { MemoryFence (); - Value = *(volatile UINT16 *)Address; + + if (IsTdxGuest ()) { + Value = TdMmioRead16 (Address); + } else { + Value = *(volatile UINT16 *)Address; + } + MemoryFence (); } @@ -178,6 +203,8 @@ MmioRead16 ( If 16-bit MMIO register operations are not supported, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). + For Td guest TDVMCALL_MMIO is invoked to write MMIO registers. + @param Address The MMIO register to write. @param Value The value to write to the MMIO register. @@ -198,7 +225,13 @@ MmioWrite16 ( Flag = FilterBeforeMmIoWrite (FilterWidth16, Address, &Value); if (Flag) { MemoryFence (); - *(volatile UINT16 *)Address = Value; + + if (IsTdxGuest ()) { + TdMmioWrite16 (Address, Value); + } else { + *(volatile UINT16 *)Address = Value; + } + MemoryFence (); } @@ -217,6 +250,8 @@ MmioWrite16 ( If 32-bit MMIO register operations are not supported, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). + For Td guest TDVMCALL_MMIO is invoked to read MMIO registers. + @param Address The MMIO register to read. @return The value read. @@ -236,7 +271,13 @@ MmioRead32 ( Flag = FilterBeforeMmIoRead (FilterWidth32, Address, &Value); if (Flag) { MemoryFence (); - Value = *(volatile UINT32 *)Address; + + if (IsTdxGuest ()) { + Value = TdMmioRead32 (Address); + } else { + Value = *(volatile UINT32 *)Address; + } + MemoryFence (); } @@ -255,6 +296,8 @@ MmioRead32 ( If 32-bit MMIO register operations are not supported, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). + For Td guest TDVMCALL_MMIO is invoked to write MMIO registers. + @param Address The MMIO register to write. @param Value The value to write to the MMIO register. @@ -275,7 +318,13 @@ MmioWrite32 ( Flag = FilterBeforeMmIoWrite (FilterWidth32, Address, &Value); if (Flag) { MemoryFence (); - *(volatile UINT32 *)Address = Value; + + if (IsTdxGuest ()) { + TdMmioWrite32 (Address, Value); + } else { + *(volatile UINT32 *)Address = Value; + } + MemoryFence (); } @@ -294,6 +343,8 @@ MmioWrite32 ( If 64-bit MMIO register operations are not supported, then ASSERT(). If Address is not aligned on a 64-bit boundary, then ASSERT(). + For Td guest TDVMCALL_MMIO is invoked to read MMIO registers. + @param Address The MMIO register to read. @return The value read. @@ -313,7 +364,13 @@ MmioRead64 ( Flag = FilterBeforeMmIoRead (FilterWidth64, Address, &Value); if (Flag) { MemoryFence (); - Value = *(volatile UINT64 *)Address; + + if (IsTdxGuest ()) { + Value = TdMmioRead64 (Address); + } else { + Value = *(volatile UINT64 *)Address; + } + MemoryFence (); } @@ -332,6 +389,8 @@ MmioRead64 ( If 64-bit MMIO register operations are not supported, then ASSERT(). If Address is not aligned on a 64-bit boundary, then ASSERT(). + For Td guest TDVMCALL_MMIO is invoked to write MMIO registers. + @param Address The MMIO register to write. @param Value The value to write to the MMIO register. @@ -350,7 +409,13 @@ MmioWrite64 ( Flag = FilterBeforeMmIoWrite (FilterWidth64, Address, &Value); if (Flag) { MemoryFence (); - *(volatile UINT64 *)Address = Value; + + if (IsTdxGuest ()) { + TdMmioWrite64 (Address, Value); + } else { + *(volatile UINT64 *)Address = Value; + } + MemoryFence (); } -- 2.29.2.windows.2