From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mx.groups.io with SMTP id smtpd.web09.4779.1648080680578717265 for ; Wed, 23 Mar 2022 17:12:03 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=n5cuhzGJ; spf=pass (domain: intel.com, ip: 134.134.136.65, mailfrom: min.m.xu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648080723; x=1679616723; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ixazbVenfyTPIDPv7tGrIwFD6d1I227/jADlDKi+YsA=; b=n5cuhzGJP9Q5z2Nhf+loghQE+dDoOgfN7+1VJD2+axEQ8KlgI4JXbKj8 GXTdXYD2IUIUnMGonybivJr0JfhTioSk61CgmZsElwMUh7m9rqHL2nWeQ Ghyaxi/dQcHiwqZ43sLkzIZT/3l0DlK9VJumBFoUaYDLlFz2/Nzo/if1H VN6Q7B4PNFDTlabaoxyc68ct1pz+2qwM01NRr5HB4C17AsIU8It/xMEzQ QF50C1VhRNnmQyTyE1uSjMqEPotkAUle0XRFNDgck468ltYfK1xx++7oV vYqg6UyC61BlTw+WEdUPvnZCK7+2FC7lRlvyZrjt2soYsiBqySiwhz6fI g==; X-IronPort-AV: E=McAfee;i="6200,9189,10295"; a="258207513" X-IronPort-AV: E=Sophos;i="5.90,205,1643702400"; d="scan'208";a="258207513" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2022 17:12:03 -0700 X-IronPort-AV: E=Sophos;i="5.90,205,1643702400"; d="scan'208";a="649651306" Received: from mxu9-mobl1.ccr.corp.intel.com ([10.255.31.90]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Mar 2022 17:12:00 -0700 From: "Min Xu" To: devel@edk2.groups.io Cc: Min Xu , Ard Biesheuvel , Jordan Justen , Brijesh Singh , Erdem Aktas , James Bottomley , Jiewen Yao , Tom Lendacky , Gerd Hoffmann , Sebastien Boeuf Subject: [PATCH V10 25/47] OvmfPkg/PlatformPei: Refactor InitializeRamRegions Date: Thu, 24 Mar 2022 08:10:11 +0800 Message-Id: <20220324001033.1169-26-min.m.xu@intel.com> X-Mailer: git-send-email 2.29.2.windows.2 In-Reply-To: <20220324001033.1169-1-min.m.xu@intel.com> References: <20220324001033.1169-1-min.m.xu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3863 InitializeRamRegions is refactored into 3 calls: - PlatformQemuInitializeRam - SevInitializeRam - PlatformQemuInitializeRamForS3 SevInitializeRam is not in PlatformInitLib. Because in the first stage PlatformInitLib only support the basic platform featues. PlatformQemuInitializeRamForS3 wraps the code which was previously in InitializeRamRegions (many code in 2 if-checks). Cc: Ard Biesheuvel Cc: Jordan Justen Cc: Brijesh Singh Cc: Erdem Aktas Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Cc: Gerd Hoffmann Cc: Sebastien Boeuf Acked-by: Gerd Hoffmann Signed-off-by: Min Xu --- OvmfPkg/PlatformPei/MemDetect.c | 40 ++++++++++++++++++++------------- OvmfPkg/PlatformPei/Platform.c | 2 +- OvmfPkg/PlatformPei/Platform.h | 3 ++- 3 files changed, 28 insertions(+), 17 deletions(-) diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c index 45f7eba65d04..23a583ed3386 100644 --- a/OvmfPkg/PlatformPei/MemDetect.c +++ b/OvmfPkg/PlatformPei/MemDetect.c @@ -161,7 +161,7 @@ PlatformQemuUc32BaseInitialization ( // variable MTRR suffices by truncating the size to a whole power of two, // while keeping the end affixed to 4GB. This will round the base up. // - LowerMemorySize = GetSystemMemorySizeBelow4gb (PlatformInfoHob); + LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); PlatformInfoHob->Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - LowerMemorySize)); PlatformInfoHob->Uc32Base = (UINT32)(SIZE_4GB - PlatformInfoHob->Uc32Size); // @@ -372,7 +372,8 @@ GetHighestSystemMemoryAddressFromPvhMemmap ( } UINT32 -GetSystemMemorySizeBelow4gb ( +EFIAPI +PlatformGetSystemMemorySizeBelow4gb ( IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob ) { @@ -761,7 +762,7 @@ PublishPeiMemory ( UINT32 S3AcpiReservedMemoryBase; UINT32 S3AcpiReservedMemorySize; - LowerMemorySize = GetSystemMemorySizeBelow4gb (&mPlatformInfoHob); + LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (&mPlatformInfoHob); if (mPlatformInfoHob.SmmSmramRequire) { // // TSEG is chipped from the end of low RAM @@ -871,7 +872,7 @@ QemuInitializeRamBelow1gb ( **/ STATIC VOID -QemuInitializeRam ( +PlatformQemuInitializeRam ( IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob ) { @@ -885,7 +886,7 @@ QemuInitializeRam ( // // Determine total memory size available // - LowerMemorySize = GetSystemMemorySizeBelow4gb (PlatformInfoHob); + LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); if (PlatformInfoHob->BootMode == BOOT_ON_S3_RESUME) { // @@ -995,19 +996,12 @@ QemuInitializeRam ( } } -/** - Publish system RAM and reserve memory regions - -**/ +STATIC VOID -InitializeRamRegions ( +PlatformQemuInitializeRamForS3 ( IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob ) { - QemuInitializeRam (PlatformInfoHob); - - SevInitializeRam (); - if (PlatformInfoHob->S3Supported && (PlatformInfoHob->BootMode != BOOT_ON_S3_RESUME)) { // // This is the memory range that will be used for PEI on S3 resume @@ -1113,7 +1107,7 @@ InitializeRamRegions ( // TsegSize = PlatformInfoHob->Q35TsegMbytes * SIZE_1MB; BuildMemoryAllocationHob ( - GetSystemMemorySizeBelow4gb (PlatformInfoHob) - TsegSize, + PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob) - TsegSize, TsegSize, EfiReservedMemoryType ); @@ -1152,3 +1146,19 @@ InitializeRamRegions ( #endif } } + +/** + Publish system RAM and reserve memory regions + +**/ +VOID +InitializeRamRegions ( + IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob + ) +{ + PlatformQemuInitializeRam (PlatformInfoHob); + + SevInitializeRam (); + + PlatformQemuInitializeRamForS3 (PlatformInfoHob); +} diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index 1275c9187e86..f89d14493ecf 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -79,7 +79,7 @@ MemMapInitialization ( return; } - TopOfLowRam = GetSystemMemorySizeBelow4gb (PlatformInfoHob); + TopOfLowRam = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob); PciExBarBase = 0; if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) { // diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h index 038a806a1e1b..635d58379a24 100644 --- a/OvmfPkg/PlatformPei/Platform.h +++ b/OvmfPkg/PlatformPei/Platform.h @@ -35,7 +35,8 @@ PublishPeiMemory ( ); UINT32 -GetSystemMemorySizeBelow4gb ( +EFIAPI +PlatformGetSystemMemorySizeBelow4gb ( IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob ); -- 2.29.2.windows.2