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From: "Abner Chang" <abner.chang@hpe.com>
To: devel@edk2.groups.io
Cc: abner.chang@hpe.com, Daniel Schaefer <daniel.schaefer@hpe.com>,
	Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
	Rahul Kumar <rahul1.kumar@intel.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	Leif Lindholm <quic_llindhol@quicinc.com>,
	Michael D Kinney <michael.d.kinney@intel.com>,
	Chao Li <lichao@loongson.cn>
Subject: [PATCH V2 7/8] [RFC] UefiCpuPkg/Library: Add RiscVOpensbiLib
Date: Fri, 25 Mar 2022 14:12:48 +0800	[thread overview]
Message-ID: <20220325061249.30626-8-abner.chang@hpe.com> (raw)
In-Reply-To: <20220325061249.30626-1-abner.chang@hpe.com>

https://bugzilla.tianocore.org/show_bug.cgi?id=3860
(This is migrated from edk2-platforms:Silicon/RISC-V)

EDK2 RISC-V OpenSBI library which pull in external source files under
UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/opensbi to the build process.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Daniel Schaefer <daniel.schaefer@hpe.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Chao Li <lichao@loongson.cn>
---
 UefiCpuPkg/UefiCpuPkg.dec                     |  9 +-
 UefiCpuPkg/UefiCpuPkg.dsc                     |  6 ++
 .../RiscVOpensbiLib/RiscVOpensbiLib.inf       | 89 +++++++++++++++++++
 3 files changed, 103 insertions(+), 1 deletion(-)
 create mode 100644 UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 613881368b..f7e7142882 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -15,9 +15,16 @@
   PACKAGE_GUID                   = 2171df9b-0d39-45aa-ac37-2de190010d23
   PACKAGE_VERSION                = 0.90
 
-[Includes]
+[Includes.common]
   Include
 
+[Includes.RISCV64]
+  Include/Library
+  Library/RISC-V/RiscVOpensbiLib/opensbi         # OpenSBI header file reference ("include/sbi/...")
+  Library/RISC-V/RiscVOpensbiLib/opensbi/include # Header file reference from opensbi files, ("sbi/...")
+  Library/RISC-V/RiscVOpensbiLib/opensbi/platform/generic/include # Header file reference from opensbi files, ("sbi/...")
+
+
 [LibraryClasses]
   ##  @libraryclass  Defines some routines that are used to register/manage/program
   ##                 CPU features.
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 50c9fc294c..374e951f29 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -66,6 +66,9 @@
   MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
   SmmCpuRendezvousLib|UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
 
+[LibraryClasses.RISCV64]
+  RiscVOpensbiLib|UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
+
 [LibraryClasses.common.SEC]
   HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
   MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
@@ -185,5 +188,8 @@
   UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
   UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
 
+[Components.RISCV64]
+  UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
+
 [BuildOptions]
   *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
diff --git a/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf b/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
new file mode 100644
index 0000000000..54eed050d4
--- /dev/null
+++ b/UefiCpuPkg/Library/RISC-V/RiscVOpensbiLib/RiscVOpensbiLib.inf
@@ -0,0 +1,89 @@
+## @file
+# RISC-V Opensbi Library Instance.
+#
+#  Copyright (c) 2022, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION    = 0x0001001b
+  BASE_NAME      = RiscVOpensbiLib
+  FILE_GUID      = 6EF0C812-66F6-11E9-93CE-3F5D5F0DF0A7
+  MODULE_TYPE    = BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = RiscVOpensbiLib
+
+[Sources]
+  opensbi/lib/sbi/riscv_asm.c
+  opensbi/lib/sbi/riscv_atomic.c
+  opensbi/lib/sbi/riscv_hardfp.S
+  opensbi/lib/sbi/riscv_locks.c
+  opensbi/lib/sbi/sbi_bitmap.c
+  opensbi/lib/sbi/sbi_bitops.c
+  opensbi/lib/sbi/sbi_console.c
+  opensbi/lib/sbi/sbi_domain.c
+  opensbi/lib/sbi/sbi_ecall.c
+  opensbi/lib/sbi/sbi_ecall_base.c
+  opensbi/lib/sbi/sbi_ecall_hsm.c
+  opensbi/lib/sbi/sbi_ecall_legacy.c
+  opensbi/lib/sbi/sbi_ecall_replace.c
+  opensbi/lib/sbi/sbi_ecall_vendor.c
+  opensbi/lib/sbi/sbi_emulate_csr.c
+  opensbi/lib/sbi/sbi_fifo.c
+  opensbi/lib/sbi/sbi_hart.c
+  opensbi/lib/sbi/sbi_math.c
+  opensbi/lib/sbi/sbi_hfence.S
+  opensbi/lib/sbi/sbi_hsm.c
+  opensbi/lib/sbi/sbi_illegal_insn.c
+  opensbi/lib/sbi/sbi_init.c
+  opensbi/lib/sbi/sbi_ipi.c
+  opensbi/lib/sbi/sbi_misaligned_ldst.c
+  opensbi/lib/sbi/sbi_platform.c
+  opensbi/lib/sbi/sbi_scratch.c
+  opensbi/lib/sbi/sbi_string.c
+  opensbi/lib/sbi/sbi_system.c
+  opensbi/lib/sbi/sbi_timer.c
+  opensbi/lib/sbi/sbi_tlb.c
+  opensbi/lib/sbi/sbi_trap.c
+  opensbi/lib/sbi/sbi_unpriv.c
+  opensbi/lib/sbi/sbi_expected_trap.S
+
+  opensbi/lib/utils/fdt/fdt_helper.c
+  opensbi/lib/utils/fdt/fdt_fixup.c
+  opensbi/lib/utils/fdt/fdt_domain.c
+  opensbi/lib/utils/ipi/fdt_ipi.c
+  opensbi/lib/utils/ipi/aclint_mswi.c
+  opensbi/lib/utils/ipi/fdt_ipi_mswi.c
+  opensbi/lib/utils/irqchip/fdt_irqchip.c
+  opensbi/lib/utils/irqchip/fdt_irqchip_plic.c
+  opensbi/lib/utils/irqchip/plic.c
+  opensbi/lib/utils/reset/fdt_reset.c
+  opensbi/lib/utils/reset/fdt_reset_htif.c
+  opensbi/lib/utils/reset/fdt_reset_sifive.c
+  opensbi/lib/utils/reset/fdt_reset_thead.c
+  opensbi/lib/utils/reset/fdt_reset_thead_asm.S
+  opensbi/lib/utils/serial/fdt_serial.c
+  opensbi/lib/utils/serial/fdt_serial_htif.c
+  opensbi/lib/utils/serial/fdt_serial_shakti.c
+  opensbi/lib/utils/serial/fdt_serial_sifive.c
+  opensbi/lib/utils/serial/fdt_serial_uart8250.c
+  opensbi/lib/utils/serial/fdt_serial_gaisler.c
+  opensbi/lib/utils/serial/gaisler-uart.c
+  opensbi/lib/utils/serial/shakti-uart.c
+  opensbi/lib/utils/serial/sifive-uart.c
+  opensbi/lib/utils/serial/uart8250.c
+  opensbi/lib/utils/sys/htif.c
+  opensbi/lib/utils/sys/sifive_test.c
+  opensbi/lib/utils/timer/fdt_timer.c
+  opensbi/lib/utils/timer/aclint_mtimer.c
+  opensbi/lib/utils/timer/fdt_timer_mtimer.c
+
+[Packages]
+  EmbeddedPkg/EmbeddedPkg.dec   # For libfdt.
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[BuildOptions]
+  GCC:*_*_*_PP_FLAGS = -D__ASSEMBLY__
-- 
2.31.1


  parent reply	other threads:[~2022-03-25  7:16 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-25  6:12 [PATCH V2 0/8] Rework UefiCpuPkg Abner Chang
2022-03-25  6:12 ` [PATCH V2 1/8] [RFC] UefiCpuPkg: Classify IA32/X64 modules in DSC file Abner Chang
2022-03-25  6:12 ` [PATCH V2 2/8] [RFC] UefiCpuPkg/Include: Add header files of RISC-V processor architecture Abner Chang
2022-03-25  6:12 ` [PATCH V2 3/8] [RFC] UefiCpuPkg/BaseUefiCpuLib: Add RISC-V RISCV64 instace Abner Chang
2022-03-25  6:12 ` [PATCH V2 4/8] [RFC] UefiCpuPkg/RiscVOpensbLib: Add opensbi submodule Abner Chang
2022-03-25  6:12 ` [PATCH V2 5/8] [RFC] MdePkg/Include: Add RISC-V OpenSBI header files Abner Chang
2022-03-25  6:12 ` [PATCH V2 6/8] [RFC] BaseTools/Conf: Relocate RiscVOpensbiTypes.h Abner Chang
2022-03-25  6:12 ` Abner Chang [this message]
2022-03-25  6:12 ` [PATCH V2 8/8] [RFC] UefiCpuPkg: Update YAML file for RISC-V arch Abner Chang

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