* [PATCH v3 0/5] MpInitLib code refactoring
@ 2022-05-16 7:14 Ni, Ray
2022-05-16 7:14 ` [PATCH v3 1/5] MpInitLib: Allocate code buffer for PEI phase Ni, Ray
` (5 more replies)
0 siblings, 6 replies; 8+ messages in thread
From: Ni, Ray @ 2022-05-16 7:14 UTC (permalink / raw)
To: devel
v2:
Updated 3/5: "Put SEV logic in separate file" patch.
Added 5/5: "Move the Above1Mb vector allocation to MpInitLibInitialize" patch.
v3:
v2 was sent to wrong mailing list "edk2-devel@lists.01.org".
v3 is created to send to correct mailing list.
All code changes are in https://github.com/niruiyu/edk2/tree/refactormp3.
Ray Ni (5):
MpInitLib: Allocate code buffer for PEI phase
MpInitLib: remove unneeded global ASM_PFX
MpInitLib: Put SEV logic in separate file
MpInitLib: Only allocate below 1MB memory for 16bit code
MpInitLib: Move the Above1Mb vector allocation to MpInitLibInitialize
UefiCpuPkg/Library/MpInitLib/AmdSev.c | 6 +-
UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 2 +-
.../Library/MpInitLib/Ia32/MpFuncs.nasm | 13 +-
UefiCpuPkg/Library/MpInitLib/MpEqu.inc | 6 +-
UefiCpuPkg/Library/MpInitLib/MpLib.c | 124 ++++++-------
UefiCpuPkg/Library/MpInitLib/MpLib.h | 6 +-
UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 15 +-
UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm | 148 +++++++++++++++
UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 169 +-----------------
9 files changed, 233 insertions(+), 256 deletions(-)
--
2.35.1.windows.2
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v3 1/5] MpInitLib: Allocate code buffer for PEI phase
2022-05-16 7:14 [PATCH v3 0/5] MpInitLib code refactoring Ni, Ray
@ 2022-05-16 7:14 ` Ni, Ray
2022-05-16 7:14 ` [PATCH v3 2/5] MpInitLib: remove unneeded global ASM_PFX Ni, Ray
` (4 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Ni, Ray @ 2022-05-16 7:14 UTC (permalink / raw)
To: devel; +Cc: Eric Dong
Today's implementation assumes PEI phase runs at 32bit so
the execution-disable feature is not applicable.
It's not always TRUE.
The patch allocates 32bit&64bit code buffer for PEI phase as well.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
---
UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 2 +-
UefiCpuPkg/Library/MpInitLib/MpLib.c | 2 +-
UefiCpuPkg/Library/MpInitLib/MpLib.h | 2 +-
UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 15 ++++++++++-----
4 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
index 60d14a5a0e..78cc3e2b93 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
@@ -162,7 +162,7 @@ GetWakeupBuffer (
@retval 0 Cannot find free memory below 4GB.
**/
UINTN
-GetModeTransitionBuffer (
+AllocateCodeBuffer (
IN UINTN BufferSize
)
{
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 4a73787ee4..d761bdc487 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -1056,7 +1056,7 @@ AllocateResetVector (
(CpuMpData->WakeupBuffer +
CpuMpData->AddressMap.RendezvousFunnelSize +
CpuMpData->AddressMap.SwitchToRealSize);
- CpuMpData->WakeupBufferHigh = GetModeTransitionBuffer (
+ CpuMpData->WakeupBufferHigh = AllocateCodeBuffer (
CpuMpData->AddressMap.RendezvousFunnelSize +
CpuMpData->AddressMap.SwitchToRealSize -
CpuMpData->AddressMap.ModeTransitionOffset
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index f8c52426dd..59ab960897 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -442,7 +442,7 @@ GetWakeupBuffer (
@retval 0 Cannot find free memory below 4GB.
**/
UINTN
-GetModeTransitionBuffer (
+AllocateCodeBuffer (
IN UINTN BufferSize
);
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
index efce574727..65400b95a2 100644
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
@@ -299,14 +299,19 @@ GetWakeupBuffer (
@retval 0 Cannot find free memory below 4GB.
**/
UINTN
-GetModeTransitionBuffer (
+AllocateCodeBuffer (
IN UINTN BufferSize
)
{
- //
- // PEI phase doesn't need to do such transition. So simply return 0.
- //
- return 0;
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS Address;
+
+ Status = PeiServicesAllocatePages (EfiBootServicesCode, EFI_SIZE_TO_PAGES (BufferSize), &Address);
+ if (EFI_ERROR (Status)) {
+ Address = 0;
+ }
+
+ return (UINTN)Address;
}
/**
--
2.35.1.windows.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v3 2/5] MpInitLib: remove unneeded global ASM_PFX
2022-05-16 7:14 [PATCH v3 0/5] MpInitLib code refactoring Ni, Ray
2022-05-16 7:14 ` [PATCH v3 1/5] MpInitLib: Allocate code buffer for PEI phase Ni, Ray
@ 2022-05-16 7:14 ` Ni, Ray
2022-05-16 7:14 ` [PATCH v3 3/5] MpInitLib: Put SEV logic in separate file Ni, Ray
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Ni, Ray @ 2022-05-16 7:14 UTC (permalink / raw)
To: devel
global in NASM file is used for symbols that are
referenced in C files.
Remove unneeded global keyword in NASM file.
Signed-off-by: Ray Ni <ray.ni@intel.com>
---
UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm | 8 +-------
UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 10 ++--------
2 files changed, 3 insertions(+), 15 deletions(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
index 7bd2415670..8981c32722 100644
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
@@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ;
-; Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@@ -24,8 +24,6 @@ SECTION .text
;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
;IS IN MACHINE CODE.
;-------------------------------------------------------------------------------------
-global ASM_PFX(RendezvousFunnelProc)
-ASM_PFX(RendezvousFunnelProc):
RendezvousFunnelProcStart:
; At this point CS = 0x(vv00) and ip= 0x0.
BITS 16
@@ -207,8 +205,6 @@ RendezvousFunnelProcEnd:
;SwitchToRealProc procedure follows.
;NOT USED IN 32 BIT MODE.
;-------------------------------------------------------------------------------------
-global ASM_PFX(SwitchToRealProc)
-ASM_PFX(SwitchToRealProc):
SwitchToRealProcStart:
jmp $ ; Never reach here
SwitchToRealProcEnd:
@@ -219,8 +215,6 @@ SwitchToRealProcEnd:
; The last three parameters (Pm16CodeSegment, SevEsAPJumpTable and WakeupBuffer) are
; specific to SEV-ES support and are not applicable on IA32.
;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmRelocateApLoop)
-ASM_PFX(AsmRelocateApLoop):
AsmRelocateApLoopStart:
mov eax, esp
mov esp, [eax + 16] ; TopOfApStack
diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
index f1422fd30a..d7e0e1fabd 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
@@ -35,8 +35,6 @@ SECTION .text
;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
;IS IN MACHINE CODE.
;-------------------------------------------------------------------------------------
-global ASM_PFX(RendezvousFunnelProc)
-ASM_PFX(RendezvousFunnelProc):
RendezvousFunnelProcStart:
; At this point CS = 0x(vv00) and ip= 0x0.
; Save BIST information to ebp firstly
@@ -279,8 +277,6 @@ RendezvousFunnelProcEnd:
; r8 - Code32 Selector Offset
; r9 - Stack Start
;-------------------------------------------------------------------------------------
-global ASM_PFX(SwitchToRealProc)
-ASM_PFX(SwitchToRealProc):
SwitchToRealProcStart:
BITS 64
cli
@@ -421,8 +417,6 @@ SwitchToRealProcEnd:
;-------------------------------------------------------------------------------------
; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer);
;-------------------------------------------------------------------------------------
-global ASM_PFX(AsmRelocateApLoop)
-ASM_PFX(AsmRelocateApLoop):
AsmRelocateApLoopStart:
BITS 64
cmp qword [rsp + 56], 0 ; SevEsAPJumpTable
@@ -594,11 +588,11 @@ AsmRelocateApLoopEnd:
;-------------------------------------------------------------------------------------
global ASM_PFX(AsmGetAddressMap)
ASM_PFX(AsmGetAddressMap):
- lea rax, [ASM_PFX(RendezvousFunnelProc)]
+ lea rax, [RendezvousFunnelProcStart]
mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RendezvousFunnelAddress], rax
mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.ModeEntryOffset], LongModeStart - RendezvousFunnelProcStart
mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RendezvousFunnelSize], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
- lea rax, [ASM_PFX(AsmRelocateApLoop)]
+ lea rax, [AsmRelocateApLoopStart]
mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddress], rax
mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize], AsmRelocateApLoopEnd - AsmRelocateApLoopStart
mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.ModeTransitionOffset], Flat32Start - RendezvousFunnelProcStart
--
2.35.1.windows.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v3 3/5] MpInitLib: Put SEV logic in separate file
2022-05-16 7:14 [PATCH v3 0/5] MpInitLib code refactoring Ni, Ray
2022-05-16 7:14 ` [PATCH v3 1/5] MpInitLib: Allocate code buffer for PEI phase Ni, Ray
2022-05-16 7:14 ` [PATCH v3 2/5] MpInitLib: remove unneeded global ASM_PFX Ni, Ray
@ 2022-05-16 7:14 ` Ni, Ray
2022-05-16 13:41 ` Lendacky, Thomas
2022-05-16 7:14 ` [PATCH v3 4/5] MpInitLib: Only allocate below 1MB memory for 16bit code Ni, Ray
` (2 subsequent siblings)
5 siblings, 1 reply; 8+ messages in thread
From: Ni, Ray @ 2022-05-16 7:14 UTC (permalink / raw)
To: devel
Cc: Eric Dong, Rahul Kumar, Michael Roth, James Bottomley, Min Xu,
Jiewen Yao, Tom Lendacky, Jordan Justen, Ard Biesheuvel,
Erdem Aktas, Gerd Hoffmann
The patch does several simplifications:
1. Treat SwitchToRealProc as part of RendezvousFunnelProc.
So the common logic in MpLib.c doesn't need to be aware of
SwitchToRealProc.
As a result, SwitchToRealSize/Offset are removed from
MP_ASSEMBLY_ADDRESS_MAP.
2. Move SwitchToRealProc to AmdSev.nasm.
All other assembly code in AmdSev.nasm is called through
OneTimeCall.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
---
.../Library/MpInitLib/Ia32/MpFuncs.nasm | 5 +-
UefiCpuPkg/Library/MpInitLib/MpEqu.inc | 4 +-
UefiCpuPkg/Library/MpInitLib/MpLib.c | 13 +-
UefiCpuPkg/Library/MpInitLib/MpLib.h | 4 +-
UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm | 148 ++++++++++++++++
UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 159 +-----------------
6 files changed, 161 insertions(+), 172 deletions(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
index 8981c32722..28301bb8f0 100644
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
@@ -199,7 +199,6 @@ CProcedureInvoke:
call eax ; Invoke C function
jmp $ ; Never reach here
-RendezvousFunnelProcEnd:
;-------------------------------------------------------------------------------------
;SwitchToRealProc procedure follows.
@@ -209,6 +208,8 @@ SwitchToRealProcStart:
jmp $ ; Never reach here
SwitchToRealProcEnd:
+RendezvousFunnelProcEnd:
+
;-------------------------------------------------------------------------------------
; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer);
;
@@ -258,8 +259,6 @@ ASM_PFX(AsmGetAddressMap):
mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddress], AsmRelocateApLoopStart
mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize], AsmRelocateApLoopEnd - AsmRelocateApLoopStart
mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.ModeTransitionOffset], Flat32Start - RendezvousFunnelProcStart
- mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealSize], SwitchToRealProcEnd - SwitchToRealProcStart
- mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealOffset], SwitchToRealProcStart - RendezvousFunnelProcStart
mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealNoNxOffset], SwitchToRealProcStart - Flat32Start
mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeOffset], 0
mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeSize], 0
diff --git a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
index aba53f5720..1cc071cf7b 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
+++ b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
@@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ;
-; Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
@@ -27,8 +27,6 @@ struc MP_ASSEMBLY_ADDRESS_MAP
.RelocateApLoopFuncAddress CTYPE_UINTN 1
.RelocateApLoopFuncSize CTYPE_UINTN 1
.ModeTransitionOffset CTYPE_UINTN 1
- .SwitchToRealSize CTYPE_UINTN 1
- .SwitchToRealOffset CTYPE_UINTN 1
.SwitchToRealNoNxOffset CTYPE_UINTN 1
.SwitchToRealPM16ModeOffset CTYPE_UINTN 1
.SwitchToRealPM16ModeSize CTYPE_UINTN 1
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index d761bdc487..aa0eb9a70b 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -936,8 +936,7 @@ FillExchangeInfoData (
// EfiBootServicesCode to avoid page fault if NX memory protection is enabled.
//
if (CpuMpData->WakeupBufferHigh != 0) {
- Size = CpuMpData->AddressMap.RendezvousFunnelSize +
- CpuMpData->AddressMap.SwitchToRealSize -
+ Size = CpuMpData->AddressMap.RendezvousFunnelSize -
CpuMpData->AddressMap.ModeTransitionOffset;
CopyMem (
(VOID *)CpuMpData->WakeupBufferHigh,
@@ -991,8 +990,7 @@ BackupAndPrepareWakeupBuffer (
CopyMem (
(VOID *)CpuMpData->WakeupBuffer,
(VOID *)CpuMpData->AddressMap.RendezvousFunnelAddress,
- CpuMpData->AddressMap.RendezvousFunnelSize +
- CpuMpData->AddressMap.SwitchToRealSize
+ CpuMpData->AddressMap.RendezvousFunnelSize
);
}
@@ -1029,7 +1027,6 @@ GetApResetVectorSize (
UINTN Size;
Size = AddressMap->RendezvousFunnelSize +
- AddressMap->SwitchToRealSize +
sizeof (MP_CPU_EXCHANGE_INFO);
return Size;
@@ -1054,11 +1051,9 @@ AllocateResetVector (
CpuMpData->WakeupBuffer = GetWakeupBuffer (ApResetVectorSize);
CpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *)(UINTN)
(CpuMpData->WakeupBuffer +
- CpuMpData->AddressMap.RendezvousFunnelSize +
- CpuMpData->AddressMap.SwitchToRealSize);
+ CpuMpData->AddressMap.RendezvousFunnelSize);
CpuMpData->WakeupBufferHigh = AllocateCodeBuffer (
- CpuMpData->AddressMap.RendezvousFunnelSize +
- CpuMpData->AddressMap.SwitchToRealSize -
+ CpuMpData->AddressMap.RendezvousFunnelSize -
CpuMpData->AddressMap.ModeTransitionOffset
);
//
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 59ab960897..974fb76019 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -1,7 +1,7 @@
/** @file
Common header file for MP Initialize Library.
- Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2020, AMD Inc. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -181,8 +181,6 @@ typedef struct {
UINT8 *RelocateApLoopFuncAddress;
UINTN RelocateApLoopFuncSize;
UINTN ModeTransitionOffset;
- UINTN SwitchToRealSize;
- UINTN SwitchToRealOffset;
UINTN SwitchToRealNoNxOffset;
UINTN SwitchToRealPM16ModeOffset;
UINTN SwitchToRealPM16ModeSize;
diff --git a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm
index 8bb1161fa0..7c2469f9c5 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm
@@ -198,3 +198,151 @@ RestoreGhcb:
SevEsGetApicIdExit:
OneTimeCallRet SevEsGetApicId
+
+
+;-------------------------------------------------------------------------------------
+;SwitchToRealProc procedure follows.
+;ALSO THIS PROCEDURE IS EXECUTED BY APs TRANSITIONING TO 16 BIT MODE. HENCE THIS PROC
+;IS IN MACHINE CODE.
+; SwitchToRealProc (UINTN BufferStart, UINT16 Code16, UINT16 Code32, UINTN StackStart)
+; rcx - Buffer Start
+; rdx - Code16 Selector Offset
+; r8 - Code32 Selector Offset
+; r9 - Stack Start
+;-------------------------------------------------------------------------------------
+SwitchToRealProcStart:
+BITS 64
+ cli
+
+ ;
+ ; Get RDX reset value before changing stacks since the
+ ; new stack won't be able to accomodate a #VC exception.
+ ;
+ push rax
+ push rbx
+ push rcx
+ push rdx
+
+ mov rax, 1
+ cpuid
+ mov rsi, rax ; Save off the reset value for RDX
+
+ pop rdx
+ pop rcx
+ pop rbx
+ pop rax
+
+ ;
+ ; Establish stack below 1MB
+ ;
+ mov rsp, r9
+
+ ;
+ ; Push ultimate Reset Vector onto the stack
+ ;
+ mov rax, rcx
+ shr rax, 4
+ push word 0x0002 ; RFLAGS
+ push ax ; CS
+ push word 0x0000 ; RIP
+ push word 0x0000 ; For alignment, will be discarded
+
+ ;
+ ; Get address of "16-bit operand size" label
+ ;
+ lea rbx, [PM16Mode]
+
+ ;
+ ; Push addresses used to change to compatibility mode
+ ;
+ lea rax, [CompatMode]
+ push r8
+ push rax
+
+ ;
+ ; Clear R8 - R15, for reset, before going into 32-bit mode
+ ;
+ xor r8, r8
+ xor r9, r9
+ xor r10, r10
+ xor r11, r11
+ xor r12, r12
+ xor r13, r13
+ xor r14, r14
+ xor r15, r15
+
+ ;
+ ; Far return into 32-bit mode
+ ;
+ retfq
+
+BITS 32
+CompatMode:
+ ;
+ ; Set up stack to prepare for exiting protected mode
+ ;
+ push edx ; Code16 CS
+ push ebx ; PM16Mode label address
+
+ ;
+ ; Disable paging
+ ;
+ mov eax, cr0 ; Read CR0
+ btr eax, 31 ; Set PG=0
+ mov cr0, eax ; Write CR0
+
+ ;
+ ; Disable long mode
+ ;
+ mov ecx, 0c0000080h ; EFER MSR number
+ rdmsr ; Read EFER
+ btr eax, 8 ; Set LME=0
+ wrmsr ; Write EFER
+
+ ;
+ ; Disable PAE
+ ;
+ mov eax, cr4 ; Read CR4
+ btr eax, 5 ; Set PAE=0
+ mov cr4, eax ; Write CR4
+
+ mov edx, esi ; Restore RDX reset value
+
+ ;
+ ; Switch to 16-bit operand size
+ ;
+ retf
+
+BITS 16
+ ;
+ ; At entry to this label
+ ; - RDX will have its reset value
+ ; - On the top of the stack
+ ; - Alignment data (two bytes) to be discarded
+ ; - IP for Real Mode (two bytes)
+ ; - CS for Real Mode (two bytes)
+ ;
+ ; This label is also used with AsmRelocateApLoop. During MP finalization,
+ ; the code from PM16Mode to SwitchToRealProcEnd is copied to the start of
+ ; the WakeupBuffer, allowing a parked AP to be booted by an OS.
+ ;
+PM16Mode:
+ mov eax, cr0 ; Read CR0
+ btr eax, 0 ; Set PE=0
+ mov cr0, eax ; Write CR0
+
+ pop ax ; Discard alignment data
+
+ ;
+ ; Clear registers (except RDX and RSP) before going into 16-bit mode
+ ;
+ xor eax, eax
+ xor ebx, ebx
+ xor ecx, ecx
+ xor esi, esi
+ xor edi, edi
+ xor ebp, ebp
+
+ iret
+
+SwitchToRealProcEnd:
diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
index d7e0e1fabd..1daaa72b1e 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
@@ -152,11 +152,6 @@ SkipEnable5LevelPaging:
BITS 64
-;
-; Required for the AMD SEV helper functions
-;
-%include "AmdSev.nasm"
-
LongModeStart:
mov esi, ebx
lea edi, [esi + MP_CPU_EXCHANGE_INFO_FIELD (InitFlag)]
@@ -265,154 +260,12 @@ CProcedureInvoke:
add rsp, 20h
jmp $ ; Should never reach here
-RendezvousFunnelProcEnd:
-
-;-------------------------------------------------------------------------------------
-;SwitchToRealProc procedure follows.
-;ALSO THIS PROCEDURE IS EXECUTED BY APs TRANSITIONING TO 16 BIT MODE. HENCE THIS PROC
-;IS IN MACHINE CODE.
-; SwitchToRealProc (UINTN BufferStart, UINT16 Code16, UINT16 Code32, UINTN StackStart)
-; rcx - Buffer Start
-; rdx - Code16 Selector Offset
-; r8 - Code32 Selector Offset
-; r9 - Stack Start
-;-------------------------------------------------------------------------------------
-SwitchToRealProcStart:
-BITS 64
- cli
-
- ;
- ; Get RDX reset value before changing stacks since the
- ; new stack won't be able to accomodate a #VC exception.
- ;
- push rax
- push rbx
- push rcx
- push rdx
-
- mov rax, 1
- cpuid
- mov rsi, rax ; Save off the reset value for RDX
-
- pop rdx
- pop rcx
- pop rbx
- pop rax
-
- ;
- ; Establish stack below 1MB
- ;
- mov rsp, r9
-
- ;
- ; Push ultimate Reset Vector onto the stack
- ;
- mov rax, rcx
- shr rax, 4
- push word 0x0002 ; RFLAGS
- push ax ; CS
- push word 0x0000 ; RIP
- push word 0x0000 ; For alignment, will be discarded
-
- ;
- ; Get address of "16-bit operand size" label
- ;
- lea rbx, [PM16Mode]
-
- ;
- ; Push addresses used to change to compatibility mode
- ;
- lea rax, [CompatMode]
- push r8
- push rax
-
- ;
- ; Clear R8 - R15, for reset, before going into 32-bit mode
- ;
- xor r8, r8
- xor r9, r9
- xor r10, r10
- xor r11, r11
- xor r12, r12
- xor r13, r13
- xor r14, r14
- xor r15, r15
-
- ;
- ; Far return into 32-bit mode
- ;
- retfq
-
-BITS 32
-CompatMode:
- ;
- ; Set up stack to prepare for exiting protected mode
- ;
- push edx ; Code16 CS
- push ebx ; PM16Mode label address
-
- ;
- ; Disable paging
- ;
- mov eax, cr0 ; Read CR0
- btr eax, 31 ; Set PG=0
- mov cr0, eax ; Write CR0
-
- ;
- ; Disable long mode
- ;
- mov ecx, 0c0000080h ; EFER MSR number
- rdmsr ; Read EFER
- btr eax, 8 ; Set LME=0
- wrmsr ; Write EFER
-
- ;
- ; Disable PAE
- ;
- mov eax, cr4 ; Read CR4
- btr eax, 5 ; Set PAE=0
- mov cr4, eax ; Write CR4
-
- mov edx, esi ; Restore RDX reset value
-
- ;
- ; Switch to 16-bit operand size
- ;
- retf
-
-BITS 16
- ;
- ; At entry to this label
- ; - RDX will have its reset value
- ; - On the top of the stack
- ; - Alignment data (two bytes) to be discarded
- ; - IP for Real Mode (two bytes)
- ; - CS for Real Mode (two bytes)
- ;
- ; This label is also used with AsmRelocateApLoop. During MP finalization,
- ; the code from PM16Mode to SwitchToRealProcEnd is copied to the start of
- ; the WakeupBuffer, allowing a parked AP to be booted by an OS.
- ;
-PM16Mode:
- mov eax, cr0 ; Read CR0
- btr eax, 0 ; Set PE=0
- mov cr0, eax ; Write CR0
-
- pop ax ; Discard alignment data
-
- ;
- ; Clear registers (except RDX and RSP) before going into 16-bit mode
- ;
- xor eax, eax
- xor ebx, ebx
- xor ecx, ecx
- xor esi, esi
- xor edi, edi
- xor ebp, ebp
-
- iret
+;
+; Required for the AMD SEV helper functions
+;
+%include "AmdSev.nasm"
-SwitchToRealProcEnd:
+RendezvousFunnelProcEnd:
;-------------------------------------------------------------------------------------
; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer);
@@ -596,8 +449,6 @@ ASM_PFX(AsmGetAddressMap):
mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddress], rax
mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize], AsmRelocateApLoopEnd - AsmRelocateApLoopStart
mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.ModeTransitionOffset], Flat32Start - RendezvousFunnelProcStart
- mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealSize], SwitchToRealProcEnd - SwitchToRealProcStart
- mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealOffset], SwitchToRealProcStart - RendezvousFunnelProcStart
mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealNoNxOffset], SwitchToRealProcStart - Flat32Start
mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeOffset], PM16Mode - RendezvousFunnelProcStart
mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeSize], SwitchToRealProcEnd - PM16Mode
--
2.35.1.windows.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v3 4/5] MpInitLib: Only allocate below 1MB memory for 16bit code
2022-05-16 7:14 [PATCH v3 0/5] MpInitLib code refactoring Ni, Ray
` (2 preceding siblings ...)
2022-05-16 7:14 ` [PATCH v3 3/5] MpInitLib: Put SEV logic in separate file Ni, Ray
@ 2022-05-16 7:14 ` Ni, Ray
2022-05-16 7:14 ` [PATCH v3 5/5] MpInitLib: Move the Above1Mb vector allocation to MpInitLibInitialize Ni, Ray
2022-06-10 8:19 ` [edk2-devel] [PATCH v3 0/5] MpInitLib code refactoring Dong, Eric
5 siblings, 0 replies; 8+ messages in thread
From: Ni, Ray @ 2022-05-16 7:14 UTC (permalink / raw)
To: devel; +Cc: Eric Dong
Today's implementation allocates below 1MB memory for the 16bit, 32bit
and 64bit code.
But it's not necessary since now the 32bit and 64bit code run at high
memory no matter in PEI and DXE phase.
The patch simplifies the logic to remove the code that handles the
case when WakeupBufferHigh is 0.
It also reduce the memory foot print under 1MB by allocating
memory for 16bit code only.
MP_CPU_EXCHANGE_INFO is still under 1MB which is immediate
after the 16bit code.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
---
UefiCpuPkg/Library/MpInitLib/AmdSev.c | 6 +-
UefiCpuPkg/Library/MpInitLib/MpEqu.inc | 2 +-
UefiCpuPkg/Library/MpInitLib/MpLib.c | 94 ++++++++++++--------------
3 files changed, 46 insertions(+), 56 deletions(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/AmdSev.c b/UefiCpuPkg/Library/MpInitLib/AmdSev.c
index b4a344ee6b..4e4c63a52d 100644
--- a/UefiCpuPkg/Library/MpInitLib/AmdSev.c
+++ b/UefiCpuPkg/Library/MpInitLib/AmdSev.c
@@ -110,11 +110,7 @@ MpInitLibSevEsAPReset (
Code16 = GetProtectedMode16CS ();
Code32 = GetProtectedMode32CS ();
- if (CpuMpData->WakeupBufferHigh != 0) {
- APResetFn = (AP_RESET *)(CpuMpData->WakeupBufferHigh + CpuMpData->AddressMap.SwitchToRealNoNxOffset);
- } else {
- APResetFn = (AP_RESET *)(CpuMpData->MpCpuExchangeInfo->BufferStart + CpuMpData->AddressMap.SwitchToRealOffset);
- }
+ APResetFn = (AP_RESET *)(CpuMpData->WakeupBufferHigh + CpuMpData->AddressMap.SwitchToRealNoNxOffset);
BufferStart = CpuMpData->MpCpuExchangeInfo->BufferStart;
StackStart = CpuMpData->SevEsAPResetStackStart -
diff --git a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
index 1cc071cf7b..ebadcc6fb3 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
+++ b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
@@ -95,5 +95,5 @@ struc MP_CPU_EXCHANGE_INFO
.ExtTopoAvail: CTYPE_BOOLEAN 1
endstruc
-MP_CPU_EXCHANGE_INFO_OFFSET equ (SwitchToRealProcEnd - RendezvousFunnelProcStart)
+MP_CPU_EXCHANGE_INFO_OFFSET equ (Flat32Start - RendezvousFunnelProcStart)
%define MP_CPU_EXCHANGE_INFO_FIELD(Field) (MP_CPU_EXCHANGE_INFO_OFFSET + MP_CPU_EXCHANGE_INFO. %+ Field)
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index aa0eb9a70b..e4edbb618d 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -848,6 +848,30 @@ WaitApWakeup (
}
}
+/**
+ Calculate the size of the reset vector.
+
+ @param[in] AddressMap The pointer to Address Map structure.
+
+ @return Total amount of memory required for the AP reset area
+**/
+STATIC
+VOID
+GetApResetVectorSize (
+ IN MP_ASSEMBLY_ADDRESS_MAP *AddressMap,
+ OUT UINTN *SizeBelow1Mb OPTIONAL,
+ OUT UINTN *SizeAbove1Mb OPTIONAL
+ )
+{
+ if (SizeBelow1Mb != NULL) {
+ *SizeBelow1Mb = AddressMap->ModeTransitionOffset + sizeof (MP_CPU_EXCHANGE_INFO);
+ }
+
+ if (SizeAbove1Mb != NULL) {
+ *SizeAbove1Mb = AddressMap->RendezvousFunnelSize - AddressMap->ModeTransitionOffset;
+ }
+}
+
/**
This function will fill the exchange info structure.
@@ -935,21 +959,15 @@ FillExchangeInfoData (
// Copy all 32-bit code and 64-bit code into memory with type of
// EfiBootServicesCode to avoid page fault if NX memory protection is enabled.
//
- if (CpuMpData->WakeupBufferHigh != 0) {
- Size = CpuMpData->AddressMap.RendezvousFunnelSize -
- CpuMpData->AddressMap.ModeTransitionOffset;
- CopyMem (
- (VOID *)CpuMpData->WakeupBufferHigh,
- CpuMpData->AddressMap.RendezvousFunnelAddress +
- CpuMpData->AddressMap.ModeTransitionOffset,
- Size
- );
+ GetApResetVectorSize (&CpuMpData->AddressMap, NULL, &Size);
+ CopyMem (
+ (VOID *)CpuMpData->WakeupBufferHigh,
+ CpuMpData->AddressMap.RendezvousFunnelAddress +
+ CpuMpData->AddressMap.ModeTransitionOffset,
+ Size
+ );
- ExchangeInfo->ModeTransitionMemory = (UINT32)CpuMpData->WakeupBufferHigh;
- } else {
- ExchangeInfo->ModeTransitionMemory = (UINT32)
- (ExchangeInfo->BufferStart + CpuMpData->AddressMap.ModeTransitionOffset);
- }
+ ExchangeInfo->ModeTransitionMemory = (UINT32)CpuMpData->WakeupBufferHigh;
ExchangeInfo->ModeHighMemory = ExchangeInfo->ModeTransitionMemory +
(UINT32)ExchangeInfo->ModeOffset -
@@ -990,7 +1008,7 @@ BackupAndPrepareWakeupBuffer (
CopyMem (
(VOID *)CpuMpData->WakeupBuffer,
(VOID *)CpuMpData->AddressMap.RendezvousFunnelAddress,
- CpuMpData->AddressMap.RendezvousFunnelSize
+ CpuMpData->BackupBufferSize - sizeof (MP_CPU_EXCHANGE_INFO)
);
}
@@ -1011,27 +1029,6 @@ RestoreWakeupBuffer (
);
}
-/**
- Calculate the size of the reset vector.
-
- @param[in] AddressMap The pointer to Address Map structure.
-
- @return Total amount of memory required for the AP reset area
-**/
-STATIC
-UINTN
-GetApResetVectorSize (
- IN MP_ASSEMBLY_ADDRESS_MAP *AddressMap
- )
-{
- UINTN Size;
-
- Size = AddressMap->RendezvousFunnelSize +
- sizeof (MP_CPU_EXCHANGE_INFO);
-
- return Size;
-}
-
/**
Allocate reset vector buffer.
@@ -1042,20 +1039,17 @@ AllocateResetVector (
IN OUT CPU_MP_DATA *CpuMpData
)
{
- UINTN ApResetVectorSize;
+ UINTN ApResetVectorSizeBelow1Mb;
+ UINTN ApResetVectorSizeAbove1Mb;
UINTN ApResetStackSize;
if (CpuMpData->WakeupBuffer == (UINTN)-1) {
- ApResetVectorSize = GetApResetVectorSize (&CpuMpData->AddressMap);
+ GetApResetVectorSize (&CpuMpData->AddressMap, &ApResetVectorSizeBelow1Mb, &ApResetVectorSizeAbove1Mb);
- CpuMpData->WakeupBuffer = GetWakeupBuffer (ApResetVectorSize);
+ CpuMpData->WakeupBuffer = GetWakeupBuffer (ApResetVectorSizeBelow1Mb);
CpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *)(UINTN)
- (CpuMpData->WakeupBuffer +
- CpuMpData->AddressMap.RendezvousFunnelSize);
- CpuMpData->WakeupBufferHigh = AllocateCodeBuffer (
- CpuMpData->AddressMap.RendezvousFunnelSize -
- CpuMpData->AddressMap.ModeTransitionOffset
- );
+ (CpuMpData->WakeupBuffer + ApResetVectorSizeBelow1Mb - sizeof (MP_CPU_EXCHANGE_INFO));
+ CpuMpData->WakeupBufferHigh = AllocateCodeBuffer (ApResetVectorSizeAbove1Mb);
//
// The AP reset stack is only used by SEV-ES guests. Do not allocate it
// if SEV-ES is not enabled. An SEV-SNP guest is also considered
@@ -1794,7 +1788,7 @@ MpInitLibInitialize (
UINT8 ApLoopMode;
UINT8 *MonitorBuffer;
UINTN Index;
- UINTN ApResetVectorSize;
+ UINTN ApResetVectorSizeBelow1Mb;
UINTN BackupBufferAddr;
UINTN ApIdtBase;
@@ -1808,7 +1802,7 @@ MpInitLibInitialize (
ASSERT (MaxLogicalProcessorNumber != 0);
AsmGetAddressMap (&AddressMap);
- ApResetVectorSize = GetApResetVectorSize (&AddressMap);
+ GetApResetVectorSize (&AddressMap, &ApResetVectorSizeBelow1Mb, NULL);
ApStackSize = PcdGet32 (PcdCpuApStackSize);
ApLoopMode = GetApLoopMode (&MonitorFilterSize);
@@ -1819,7 +1813,7 @@ MpInitLibInitialize (
BufferSize = ApStackSize * MaxLogicalProcessorNumber;
BufferSize += MonitorFilterSize * MaxLogicalProcessorNumber;
- BufferSize += ApResetVectorSize;
+ BufferSize += ApResetVectorSizeBelow1Mb;
BufferSize = ALIGN_VALUE (BufferSize, 8);
BufferSize += VolatileRegisters.Idtr.Limit + 1;
BufferSize += sizeof (CPU_MP_DATA);
@@ -1852,12 +1846,12 @@ MpInitLibInitialize (
//
MonitorBuffer = (UINT8 *)(Buffer + ApStackSize * MaxLogicalProcessorNumber);
BackupBufferAddr = (UINTN)MonitorBuffer + MonitorFilterSize * MaxLogicalProcessorNumber;
- ApIdtBase = ALIGN_VALUE (BackupBufferAddr + ApResetVectorSize, 8);
+ ApIdtBase = ALIGN_VALUE (BackupBufferAddr + ApResetVectorSizeBelow1Mb, 8);
CpuMpData = (CPU_MP_DATA *)(ApIdtBase + VolatileRegisters.Idtr.Limit + 1);
CpuMpData->Buffer = Buffer;
CpuMpData->CpuApStackSize = ApStackSize;
CpuMpData->BackupBuffer = BackupBufferAddr;
- CpuMpData->BackupBufferSize = ApResetVectorSize;
+ CpuMpData->BackupBufferSize = ApResetVectorSizeBelow1Mb;
CpuMpData->WakeupBuffer = (UINTN)-1;
CpuMpData->CpuCount = 1;
CpuMpData->BspNumber = 0;
--
2.35.1.windows.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v3 5/5] MpInitLib: Move the Above1Mb vector allocation to MpInitLibInitialize
2022-05-16 7:14 [PATCH v3 0/5] MpInitLib code refactoring Ni, Ray
` (3 preceding siblings ...)
2022-05-16 7:14 ` [PATCH v3 4/5] MpInitLib: Only allocate below 1MB memory for 16bit code Ni, Ray
@ 2022-05-16 7:14 ` Ni, Ray
2022-06-10 8:19 ` [edk2-devel] [PATCH v3 0/5] MpInitLib code refactoring Dong, Eric
5 siblings, 0 replies; 8+ messages in thread
From: Ni, Ray @ 2022-05-16 7:14 UTC (permalink / raw)
To: devel; +Cc: Eric Dong
The AP vector consists of 2 parts:
1. the initial 16-bit code that should be under 1MB and page aligned.
2. the 32-bit/64-bit code that can be anywhere in the memory with any
alignment.
The need of part #2 is because the memory under 1MB is temporary
"stolen" for use and will "give" back after all AP wake up. The range
of memory is not marked as code page in page table. CPU may trigger
exception as soon as NX is enabled.
The part #2 memory allocation can be done in the MpInitLibInitialize.
Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 53 +++++++++++++++-------------
1 file changed, 29 insertions(+), 24 deletions(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index e4edbb618d..66e0f94f03 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -955,18 +955,6 @@ FillExchangeInfoData (
Size -= sizeof (IA32_SEGMENT_DESCRIPTOR);
}
- //
- // Copy all 32-bit code and 64-bit code into memory with type of
- // EfiBootServicesCode to avoid page fault if NX memory protection is enabled.
- //
- GetApResetVectorSize (&CpuMpData->AddressMap, NULL, &Size);
- CopyMem (
- (VOID *)CpuMpData->WakeupBufferHigh,
- CpuMpData->AddressMap.RendezvousFunnelAddress +
- CpuMpData->AddressMap.ModeTransitionOffset,
- Size
- );
-
ExchangeInfo->ModeTransitionMemory = (UINT32)CpuMpData->WakeupBufferHigh;
ExchangeInfo->ModeHighMemory = ExchangeInfo->ModeTransitionMemory +
@@ -1035,21 +1023,24 @@ RestoreWakeupBuffer (
@param[in, out] CpuMpData The pointer to CPU MP Data structure.
**/
VOID
-AllocateResetVector (
+AllocateResetVectorBelow1Mb (
IN OUT CPU_MP_DATA *CpuMpData
)
{
- UINTN ApResetVectorSizeBelow1Mb;
- UINTN ApResetVectorSizeAbove1Mb;
UINTN ApResetStackSize;
if (CpuMpData->WakeupBuffer == (UINTN)-1) {
- GetApResetVectorSize (&CpuMpData->AddressMap, &ApResetVectorSizeBelow1Mb, &ApResetVectorSizeAbove1Mb);
-
- CpuMpData->WakeupBuffer = GetWakeupBuffer (ApResetVectorSizeBelow1Mb);
+ CpuMpData->WakeupBuffer = GetWakeupBuffer (CpuMpData->BackupBufferSize);
CpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *)(UINTN)
- (CpuMpData->WakeupBuffer + ApResetVectorSizeBelow1Mb - sizeof (MP_CPU_EXCHANGE_INFO));
- CpuMpData->WakeupBufferHigh = AllocateCodeBuffer (ApResetVectorSizeAbove1Mb);
+ (CpuMpData->WakeupBuffer + CpuMpData->BackupBufferSize - sizeof (MP_CPU_EXCHANGE_INFO));
+ DEBUG ((
+ DEBUG_INFO,
+ "AP Vector: 16-bit = %p/%x, ExchangeInfo = %p/%x\n",
+ CpuMpData->WakeupBuffer,
+ CpuMpData->BackupBufferSize - sizeof (MP_CPU_EXCHANGE_INFO),
+ CpuMpData->MpCpuExchangeInfo,
+ sizeof (MP_CPU_EXCHANGE_INFO)
+ ));
//
// The AP reset stack is only used by SEV-ES guests. Do not allocate it
// if SEV-ES is not enabled. An SEV-SNP guest is also considered
@@ -1148,7 +1139,7 @@ WakeUpAP (
(CpuMpData->InitFlag != ApInitDone))
{
ResetVectorRequired = TRUE;
- AllocateResetVector (CpuMpData);
+ AllocateResetVectorBelow1Mb (CpuMpData);
AllocateSevEsAPMemory (CpuMpData);
FillExchangeInfoData (CpuMpData);
SaveLocalApicTimerSetting (CpuMpData);
@@ -1789,6 +1780,7 @@ MpInitLibInitialize (
UINT8 *MonitorBuffer;
UINTN Index;
UINTN ApResetVectorSizeBelow1Mb;
+ UINTN ApResetVectorSizeAbove1Mb;
UINTN BackupBufferAddr;
UINTN ApIdtBase;
@@ -1802,9 +1794,9 @@ MpInitLibInitialize (
ASSERT (MaxLogicalProcessorNumber != 0);
AsmGetAddressMap (&AddressMap);
- GetApResetVectorSize (&AddressMap, &ApResetVectorSizeBelow1Mb, NULL);
- ApStackSize = PcdGet32 (PcdCpuApStackSize);
- ApLoopMode = GetApLoopMode (&MonitorFilterSize);
+ GetApResetVectorSize (&AddressMap, &ApResetVectorSizeBelow1Mb, &ApResetVectorSizeAbove1Mb);
+ ApStackSize = PcdGet32 (PcdCpuApStackSize);
+ ApLoopMode = GetApLoopMode (&MonitorFilterSize);
//
// Save BSP's Control registers for APs.
@@ -1913,6 +1905,19 @@ MpInitLibInitialize (
(UINT32 *)(MonitorBuffer + MonitorFilterSize * Index);
}
+ //
+ // Copy all 32-bit code and 64-bit code into memory with type of
+ // EfiBootServicesCode to avoid page fault if NX memory protection is enabled.
+ //
+ CpuMpData->WakeupBufferHigh = AllocateCodeBuffer (ApResetVectorSizeAbove1Mb);
+ CopyMem (
+ (VOID *)CpuMpData->WakeupBufferHigh,
+ CpuMpData->AddressMap.RendezvousFunnelAddress +
+ CpuMpData->AddressMap.ModeTransitionOffset,
+ ApResetVectorSizeAbove1Mb
+ );
+ DEBUG ((DEBUG_INFO, "AP Vector: non-16-bit = %p/%x\n", CpuMpData->WakeupBufferHigh, ApResetVectorSizeAbove1Mb));
+
//
// Enable the local APIC for Virtual Wire Mode.
//
--
2.35.1.windows.2
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v3 3/5] MpInitLib: Put SEV logic in separate file
2022-05-16 7:14 ` [PATCH v3 3/5] MpInitLib: Put SEV logic in separate file Ni, Ray
@ 2022-05-16 13:41 ` Lendacky, Thomas
0 siblings, 0 replies; 8+ messages in thread
From: Lendacky, Thomas @ 2022-05-16 13:41 UTC (permalink / raw)
To: Ray Ni, devel
Cc: Eric Dong, Rahul Kumar, Michael Roth, James Bottomley, Min Xu,
Jiewen Yao, Jordan Justen, Ard Biesheuvel, Erdem Aktas,
Gerd Hoffmann
On 5/16/22 02:14, Ray Ni wrote:
> The patch does several simplifications:
> 1. Treat SwitchToRealProc as part of RendezvousFunnelProc.
> So the common logic in MpLib.c doesn't need to be aware of
> SwitchToRealProc.
> As a result, SwitchToRealSize/Offset are removed from
> MP_ASSEMBLY_ADDRESS_MAP.
>
> 2. Move SwitchToRealProc to AmdSev.nasm.
> All other assembly code in AmdSev.nasm is called through
> OneTimeCall.
I hadn't realized that Brijesh made all of the functions in AmdSev.nasm
OneTimeCall functions, so moving the include now actually gets those
"functions" out of the RendezvousFunnelProc function. Looks much cleaner
this way.
Thanks Ray!
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Tested-by: Tom Lendacky <thomas.lendacky@amd.com>
>
> Signed-off-by: Ray Ni <ray.ni@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> Cc: Michael Roth <michael.roth@amd.com>
> Cc: James Bottomley <jejb@linux.ibm.com>
> Cc: Min Xu <min.m.xu@intel.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Tom Lendacky <thomas.lendacky@amd.com>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Erdem Aktas <erdemaktas@google.com>
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> ---
> .../Library/MpInitLib/Ia32/MpFuncs.nasm | 5 +-
> UefiCpuPkg/Library/MpInitLib/MpEqu.inc | 4 +-
> UefiCpuPkg/Library/MpInitLib/MpLib.c | 13 +-
> UefiCpuPkg/Library/MpInitLib/MpLib.h | 4 +-
> UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm | 148 ++++++++++++++++
> UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 159 +-----------------
> 6 files changed, 161 insertions(+), 172 deletions(-)
>
> diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> index 8981c32722..28301bb8f0 100644
> --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
> @@ -199,7 +199,6 @@ CProcedureInvoke:
> call eax ; Invoke C function
>
> jmp $ ; Never reach here
> -RendezvousFunnelProcEnd:
>
> ;-------------------------------------------------------------------------------------
> ;SwitchToRealProc procedure follows.
> @@ -209,6 +208,8 @@ SwitchToRealProcStart:
> jmp $ ; Never reach here
> SwitchToRealProcEnd:
>
> +RendezvousFunnelProcEnd:
> +
> ;-------------------------------------------------------------------------------------
> ; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer);
> ;
> @@ -258,8 +259,6 @@ ASM_PFX(AsmGetAddressMap):
> mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddress], AsmRelocateApLoopStart
> mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize], AsmRelocateApLoopEnd - AsmRelocateApLoopStart
> mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.ModeTransitionOffset], Flat32Start - RendezvousFunnelProcStart
> - mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealSize], SwitchToRealProcEnd - SwitchToRealProcStart
> - mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealOffset], SwitchToRealProcStart - RendezvousFunnelProcStart
> mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealNoNxOffset], SwitchToRealProcStart - Flat32Start
> mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeOffset], 0
> mov dword [ebx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeSize], 0
> diff --git a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
> index aba53f5720..1cc071cf7b 100644
> --- a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
> +++ b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
> @@ -1,5 +1,5 @@
> ;------------------------------------------------------------------------------ ;
> -; Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.<BR>
> +; Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
> ; SPDX-License-Identifier: BSD-2-Clause-Patent
> ;
> ; Module Name:
> @@ -27,8 +27,6 @@ struc MP_ASSEMBLY_ADDRESS_MAP
> .RelocateApLoopFuncAddress CTYPE_UINTN 1
> .RelocateApLoopFuncSize CTYPE_UINTN 1
> .ModeTransitionOffset CTYPE_UINTN 1
> - .SwitchToRealSize CTYPE_UINTN 1
> - .SwitchToRealOffset CTYPE_UINTN 1
> .SwitchToRealNoNxOffset CTYPE_UINTN 1
> .SwitchToRealPM16ModeOffset CTYPE_UINTN 1
> .SwitchToRealPM16ModeSize CTYPE_UINTN 1
> diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> index d761bdc487..aa0eb9a70b 100644
> --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
> +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> @@ -936,8 +936,7 @@ FillExchangeInfoData (
> // EfiBootServicesCode to avoid page fault if NX memory protection is enabled.
> //
> if (CpuMpData->WakeupBufferHigh != 0) {
> - Size = CpuMpData->AddressMap.RendezvousFunnelSize +
> - CpuMpData->AddressMap.SwitchToRealSize -
> + Size = CpuMpData->AddressMap.RendezvousFunnelSize -
> CpuMpData->AddressMap.ModeTransitionOffset;
> CopyMem (
> (VOID *)CpuMpData->WakeupBufferHigh,
> @@ -991,8 +990,7 @@ BackupAndPrepareWakeupBuffer (
> CopyMem (
> (VOID *)CpuMpData->WakeupBuffer,
> (VOID *)CpuMpData->AddressMap.RendezvousFunnelAddress,
> - CpuMpData->AddressMap.RendezvousFunnelSize +
> - CpuMpData->AddressMap.SwitchToRealSize
> + CpuMpData->AddressMap.RendezvousFunnelSize
> );
> }
>
> @@ -1029,7 +1027,6 @@ GetApResetVectorSize (
> UINTN Size;
>
> Size = AddressMap->RendezvousFunnelSize +
> - AddressMap->SwitchToRealSize +
> sizeof (MP_CPU_EXCHANGE_INFO);
>
> return Size;
> @@ -1054,11 +1051,9 @@ AllocateResetVector (
> CpuMpData->WakeupBuffer = GetWakeupBuffer (ApResetVectorSize);
> CpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *)(UINTN)
> (CpuMpData->WakeupBuffer +
> - CpuMpData->AddressMap.RendezvousFunnelSize +
> - CpuMpData->AddressMap.SwitchToRealSize);
> + CpuMpData->AddressMap.RendezvousFunnelSize);
> CpuMpData->WakeupBufferHigh = AllocateCodeBuffer (
> - CpuMpData->AddressMap.RendezvousFunnelSize +
> - CpuMpData->AddressMap.SwitchToRealSize -
> + CpuMpData->AddressMap.RendezvousFunnelSize -
> CpuMpData->AddressMap.ModeTransitionOffset
> );
> //
> diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
> index 59ab960897..974fb76019 100644
> --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
> +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
> @@ -1,7 +1,7 @@
> /** @file
> Common header file for MP Initialize Library.
>
> - Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
> Copyright (c) 2020, AMD Inc. All rights reserved.<BR>
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
> @@ -181,8 +181,6 @@ typedef struct {
> UINT8 *RelocateApLoopFuncAddress;
> UINTN RelocateApLoopFuncSize;
> UINTN ModeTransitionOffset;
> - UINTN SwitchToRealSize;
> - UINTN SwitchToRealOffset;
> UINTN SwitchToRealNoNxOffset;
> UINTN SwitchToRealPM16ModeOffset;
> UINTN SwitchToRealPM16ModeSize;
> diff --git a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm
> index 8bb1161fa0..7c2469f9c5 100644
> --- a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm
> +++ b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm
> @@ -198,3 +198,151 @@ RestoreGhcb:
>
> SevEsGetApicIdExit:
> OneTimeCallRet SevEsGetApicId
> +
> +
> +;-------------------------------------------------------------------------------------
> +;SwitchToRealProc procedure follows.
> +;ALSO THIS PROCEDURE IS EXECUTED BY APs TRANSITIONING TO 16 BIT MODE. HENCE THIS PROC
> +;IS IN MACHINE CODE.
> +; SwitchToRealProc (UINTN BufferStart, UINT16 Code16, UINT16 Code32, UINTN StackStart)
> +; rcx - Buffer Start
> +; rdx - Code16 Selector Offset
> +; r8 - Code32 Selector Offset
> +; r9 - Stack Start
> +;-------------------------------------------------------------------------------------
> +SwitchToRealProcStart:
> +BITS 64
> + cli
> +
> + ;
> + ; Get RDX reset value before changing stacks since the
> + ; new stack won't be able to accomodate a #VC exception.
> + ;
> + push rax
> + push rbx
> + push rcx
> + push rdx
> +
> + mov rax, 1
> + cpuid
> + mov rsi, rax ; Save off the reset value for RDX
> +
> + pop rdx
> + pop rcx
> + pop rbx
> + pop rax
> +
> + ;
> + ; Establish stack below 1MB
> + ;
> + mov rsp, r9
> +
> + ;
> + ; Push ultimate Reset Vector onto the stack
> + ;
> + mov rax, rcx
> + shr rax, 4
> + push word 0x0002 ; RFLAGS
> + push ax ; CS
> + push word 0x0000 ; RIP
> + push word 0x0000 ; For alignment, will be discarded
> +
> + ;
> + ; Get address of "16-bit operand size" label
> + ;
> + lea rbx, [PM16Mode]
> +
> + ;
> + ; Push addresses used to change to compatibility mode
> + ;
> + lea rax, [CompatMode]
> + push r8
> + push rax
> +
> + ;
> + ; Clear R8 - R15, for reset, before going into 32-bit mode
> + ;
> + xor r8, r8
> + xor r9, r9
> + xor r10, r10
> + xor r11, r11
> + xor r12, r12
> + xor r13, r13
> + xor r14, r14
> + xor r15, r15
> +
> + ;
> + ; Far return into 32-bit mode
> + ;
> + retfq
> +
> +BITS 32
> +CompatMode:
> + ;
> + ; Set up stack to prepare for exiting protected mode
> + ;
> + push edx ; Code16 CS
> + push ebx ; PM16Mode label address
> +
> + ;
> + ; Disable paging
> + ;
> + mov eax, cr0 ; Read CR0
> + btr eax, 31 ; Set PG=0
> + mov cr0, eax ; Write CR0
> +
> + ;
> + ; Disable long mode
> + ;
> + mov ecx, 0c0000080h ; EFER MSR number
> + rdmsr ; Read EFER
> + btr eax, 8 ; Set LME=0
> + wrmsr ; Write EFER
> +
> + ;
> + ; Disable PAE
> + ;
> + mov eax, cr4 ; Read CR4
> + btr eax, 5 ; Set PAE=0
> + mov cr4, eax ; Write CR4
> +
> + mov edx, esi ; Restore RDX reset value
> +
> + ;
> + ; Switch to 16-bit operand size
> + ;
> + retf
> +
> +BITS 16
> + ;
> + ; At entry to this label
> + ; - RDX will have its reset value
> + ; - On the top of the stack
> + ; - Alignment data (two bytes) to be discarded
> + ; - IP for Real Mode (two bytes)
> + ; - CS for Real Mode (two bytes)
> + ;
> + ; This label is also used with AsmRelocateApLoop. During MP finalization,
> + ; the code from PM16Mode to SwitchToRealProcEnd is copied to the start of
> + ; the WakeupBuffer, allowing a parked AP to be booted by an OS.
> + ;
> +PM16Mode:
> + mov eax, cr0 ; Read CR0
> + btr eax, 0 ; Set PE=0
> + mov cr0, eax ; Write CR0
> +
> + pop ax ; Discard alignment data
> +
> + ;
> + ; Clear registers (except RDX and RSP) before going into 16-bit mode
> + ;
> + xor eax, eax
> + xor ebx, ebx
> + xor ecx, ecx
> + xor esi, esi
> + xor edi, edi
> + xor ebp, ebp
> +
> + iret
> +
> +SwitchToRealProcEnd:
> diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
> index d7e0e1fabd..1daaa72b1e 100644
> --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
> +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
> @@ -152,11 +152,6 @@ SkipEnable5LevelPaging:
>
> BITS 64
>
> -;
> -; Required for the AMD SEV helper functions
> -;
> -%include "AmdSev.nasm"
> -
> LongModeStart:
> mov esi, ebx
> lea edi, [esi + MP_CPU_EXCHANGE_INFO_FIELD (InitFlag)]
> @@ -265,154 +260,12 @@ CProcedureInvoke:
> add rsp, 20h
> jmp $ ; Should never reach here
>
> -RendezvousFunnelProcEnd:
> -
> -;-------------------------------------------------------------------------------------
> -;SwitchToRealProc procedure follows.
> -;ALSO THIS PROCEDURE IS EXECUTED BY APs TRANSITIONING TO 16 BIT MODE. HENCE THIS PROC
> -;IS IN MACHINE CODE.
> -; SwitchToRealProc (UINTN BufferStart, UINT16 Code16, UINT16 Code32, UINTN StackStart)
> -; rcx - Buffer Start
> -; rdx - Code16 Selector Offset
> -; r8 - Code32 Selector Offset
> -; r9 - Stack Start
> -;-------------------------------------------------------------------------------------
> -SwitchToRealProcStart:
> -BITS 64
> - cli
> -
> - ;
> - ; Get RDX reset value before changing stacks since the
> - ; new stack won't be able to accomodate a #VC exception.
> - ;
> - push rax
> - push rbx
> - push rcx
> - push rdx
> -
> - mov rax, 1
> - cpuid
> - mov rsi, rax ; Save off the reset value for RDX
> -
> - pop rdx
> - pop rcx
> - pop rbx
> - pop rax
> -
> - ;
> - ; Establish stack below 1MB
> - ;
> - mov rsp, r9
> -
> - ;
> - ; Push ultimate Reset Vector onto the stack
> - ;
> - mov rax, rcx
> - shr rax, 4
> - push word 0x0002 ; RFLAGS
> - push ax ; CS
> - push word 0x0000 ; RIP
> - push word 0x0000 ; For alignment, will be discarded
> -
> - ;
> - ; Get address of "16-bit operand size" label
> - ;
> - lea rbx, [PM16Mode]
> -
> - ;
> - ; Push addresses used to change to compatibility mode
> - ;
> - lea rax, [CompatMode]
> - push r8
> - push rax
> -
> - ;
> - ; Clear R8 - R15, for reset, before going into 32-bit mode
> - ;
> - xor r8, r8
> - xor r9, r9
> - xor r10, r10
> - xor r11, r11
> - xor r12, r12
> - xor r13, r13
> - xor r14, r14
> - xor r15, r15
> -
> - ;
> - ; Far return into 32-bit mode
> - ;
> - retfq
> -
> -BITS 32
> -CompatMode:
> - ;
> - ; Set up stack to prepare for exiting protected mode
> - ;
> - push edx ; Code16 CS
> - push ebx ; PM16Mode label address
> -
> - ;
> - ; Disable paging
> - ;
> - mov eax, cr0 ; Read CR0
> - btr eax, 31 ; Set PG=0
> - mov cr0, eax ; Write CR0
> -
> - ;
> - ; Disable long mode
> - ;
> - mov ecx, 0c0000080h ; EFER MSR number
> - rdmsr ; Read EFER
> - btr eax, 8 ; Set LME=0
> - wrmsr ; Write EFER
> -
> - ;
> - ; Disable PAE
> - ;
> - mov eax, cr4 ; Read CR4
> - btr eax, 5 ; Set PAE=0
> - mov cr4, eax ; Write CR4
> -
> - mov edx, esi ; Restore RDX reset value
> -
> - ;
> - ; Switch to 16-bit operand size
> - ;
> - retf
> -
> -BITS 16
> - ;
> - ; At entry to this label
> - ; - RDX will have its reset value
> - ; - On the top of the stack
> - ; - Alignment data (two bytes) to be discarded
> - ; - IP for Real Mode (two bytes)
> - ; - CS for Real Mode (two bytes)
> - ;
> - ; This label is also used with AsmRelocateApLoop. During MP finalization,
> - ; the code from PM16Mode to SwitchToRealProcEnd is copied to the start of
> - ; the WakeupBuffer, allowing a parked AP to be booted by an OS.
> - ;
> -PM16Mode:
> - mov eax, cr0 ; Read CR0
> - btr eax, 0 ; Set PE=0
> - mov cr0, eax ; Write CR0
> -
> - pop ax ; Discard alignment data
> -
> - ;
> - ; Clear registers (except RDX and RSP) before going into 16-bit mode
> - ;
> - xor eax, eax
> - xor ebx, ebx
> - xor ecx, ecx
> - xor esi, esi
> - xor edi, edi
> - xor ebp, ebp
> -
> - iret
> +;
> +; Required for the AMD SEV helper functions
> +;
> +%include "AmdSev.nasm"
>
> -SwitchToRealProcEnd:
> +RendezvousFunnelProcEnd:
>
> ;-------------------------------------------------------------------------------------
> ; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer);
> @@ -596,8 +449,6 @@ ASM_PFX(AsmGetAddressMap):
> mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddress], rax
> mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize], AsmRelocateApLoopEnd - AsmRelocateApLoopStart
> mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.ModeTransitionOffset], Flat32Start - RendezvousFunnelProcStart
> - mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealSize], SwitchToRealProcEnd - SwitchToRealProcStart
> - mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealOffset], SwitchToRealProcStart - RendezvousFunnelProcStart
> mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealNoNxOffset], SwitchToRealProcStart - Flat32Start
> mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeOffset], PM16Mode - RendezvousFunnelProcStart
> mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeSize], SwitchToRealProcEnd - PM16Mode
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [edk2-devel] [PATCH v3 0/5] MpInitLib code refactoring
2022-05-16 7:14 [PATCH v3 0/5] MpInitLib code refactoring Ni, Ray
` (4 preceding siblings ...)
2022-05-16 7:14 ` [PATCH v3 5/5] MpInitLib: Move the Above1Mb vector allocation to MpInitLibInitialize Ni, Ray
@ 2022-06-10 8:19 ` Dong, Eric
5 siblings, 0 replies; 8+ messages in thread
From: Dong, Eric @ 2022-06-10 8:19 UTC (permalink / raw)
To: devel@edk2.groups.io, Ni, Ray
Reviewed-by: Eric Dong <eric.dong@intel.com> for this serial.
Thanks,
Eric
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Ni, Ray
Sent: Monday, May 16, 2022 3:14 PM
To: devel@edk2.groups.io
Subject: [edk2-devel] [PATCH v3 0/5] MpInitLib code refactoring
v2:
Updated 3/5: "Put SEV logic in separate file" patch.
Added 5/5: "Move the Above1Mb vector allocation to MpInitLibInitialize" patch.
v3:
v2 was sent to wrong mailing list "edk2-devel@lists.01.org".
v3 is created to send to correct mailing list.
All code changes are in https://github.com/niruiyu/edk2/tree/refactormp3.
Ray Ni (5):
MpInitLib: Allocate code buffer for PEI phase
MpInitLib: remove unneeded global ASM_PFX
MpInitLib: Put SEV logic in separate file
MpInitLib: Only allocate below 1MB memory for 16bit code
MpInitLib: Move the Above1Mb vector allocation to MpInitLibInitialize
UefiCpuPkg/Library/MpInitLib/AmdSev.c | 6 +-
UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 2 +-
.../Library/MpInitLib/Ia32/MpFuncs.nasm | 13 +-
UefiCpuPkg/Library/MpInitLib/MpEqu.inc | 6 +-
UefiCpuPkg/Library/MpInitLib/MpLib.c | 124 ++++++-------
UefiCpuPkg/Library/MpInitLib/MpLib.h | 6 +-
UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 15 +-
UefiCpuPkg/Library/MpInitLib/X64/AmdSev.nasm | 148 +++++++++++++++ UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 169 +-----------------
9 files changed, 233 insertions(+), 256 deletions(-)
--
2.35.1.windows.2
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-06-10 8:20 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-05-16 7:14 [PATCH v3 0/5] MpInitLib code refactoring Ni, Ray
2022-05-16 7:14 ` [PATCH v3 1/5] MpInitLib: Allocate code buffer for PEI phase Ni, Ray
2022-05-16 7:14 ` [PATCH v3 2/5] MpInitLib: remove unneeded global ASM_PFX Ni, Ray
2022-05-16 7:14 ` [PATCH v3 3/5] MpInitLib: Put SEV logic in separate file Ni, Ray
2022-05-16 13:41 ` Lendacky, Thomas
2022-05-16 7:14 ` [PATCH v3 4/5] MpInitLib: Only allocate below 1MB memory for 16bit code Ni, Ray
2022-05-16 7:14 ` [PATCH v3 5/5] MpInitLib: Move the Above1Mb vector allocation to MpInitLibInitialize Ni, Ray
2022-06-10 8:19 ` [edk2-devel] [PATCH v3 0/5] MpInitLib code refactoring Dong, Eric
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