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Date: Tue, 31 May 2022 09:45:13 +0200
From: "Gerd Hoffmann" <kraxel@redhat.com>
To: devel@edk2.groups.io, zhiguang.liu@intel.com
Cc: Guo Dong <guo.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
	Maurice Ma <maurice.ma@intel.com>,
	Benjamin You <benjamin.you@intel.com>,
	Sean Rhodes <sean@starlabs.systems>
Subject: Re: [edk2-devel] [PATCH] UefiPayloadPkg: Always split page table entry to 4K if it covers stack.
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On Tue, May 31, 2022 at 01:39:37PM +0800, Zhiguang Liu wrote:
> There is a concern case that stack and a proteced DXE memory range is in
> the same 2M Page Table entry, and somehow CPU doesn't flash the page
> table entry cache for stack, and causes Page fault when using stack.

Can you clarify the "somehow" please?  Are we discussing a workaround
for a cpu bug here?  If not this sounds like a tlbflush instruction is
missing somewhere ...

take care,
  Gerd