From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by mx.groups.io with SMTP id smtpd.web11.21606.1654823839079246928 for ; Thu, 09 Jun 2022 18:17:19 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=Ch0qX9up; spf=pass (domain: intel.com, ip: 134.134.136.31, mailfrom: nathaniel.l.desimone@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654823839; x=1686359839; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=Z3YOSJFMFYmkGet3HNCh+/l/LlLEcoOSRBlm7P7PT2Y=; b=Ch0qX9upKUTjPpdp9+Hl8ADQHYjt/7ih/valy6bsQP+AvqNZAt4Vs8Ow nM7woqYHfZ5hqOHeG4cjffXE+NPqbg5fEjDjwnIz43Px/6hmwVexhA7VE Sg7hCrN69jDExMTFcI4mMY5PlqMrCS4o3t8fLZVVqZoDMCr7laukK1T8Y ujoeZl8a3+0L5TfKaJczYRUkehr2YHlO69DTDE4xg2PTEY+h8fJV3h5G0 bEMXTlhnvEIPLcyhAPbVggDwTeIdiUTf5zsg0iUXpjdF4sfhZZPhUtSrC CpWTpPY84i73dSzYFQE1Il19CFusEB2WdmnEyBpBGXau+uNp69s+9yVhb Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10373"; a="339230150" X-IronPort-AV: E=Sophos;i="5.91,288,1647327600"; d="scan'208";a="339230150" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2022 18:17:09 -0700 X-IronPort-AV: E=Sophos;i="5.91,288,1647327600"; d="scan'208";a="566647267" Received: from nldesimo-desk1.amr.corp.intel.com ([10.7.159.54]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2022 18:17:09 -0700 From: "Nate DeSimone" To: devel@edk2.groups.io Cc: Jian J Wang , Liming Gao , Michael D Kinney , Isaac Oram , Chasel Chiu , Gao Cheng , Di Zhang , Daocheng Bu , Michael Kubacki Subject: [PATCH V1 0/1] Add EDKII_PEI_VARIABLE_PPI Date: Thu, 9 Jun 2022 18:17:04 -0700 Message-Id: <20220610011705.5148-1-nathaniel.l.desimone@intel.com> X-Mailer: git-send-email 2.27.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This patch series proposes a new architectural PPI: EDKII_PEI_VARIABLE_PPI This PPI provides services to read and write to UEFI variables during the PEI environment. While an implementation of this PPI does not exist yet, Intel is working on a new implementation of the PEI variable services that includes write support. As this is essentially a PEI version of the EFI_SMM_VARIABLE_PROTOCOL, I don't expect it to be immensely controversial. Regardless, before this implementation is done, we would like to provide the community with an opportunity to provide input the on new architectural PPI. Cc: Jian J Wang Cc: Liming Gao Cc: Michael D Kinney Cc: Isaac Oram Cc: Chasel Chiu Cc: Gao Cheng Cc: Di Zhang Cc: Daocheng Bu Cc: Michael Kubacki Signed-off-by: Nate DeSimone Nate DeSimone (1): MdeModulePkg: Add Definition of EDKII_PEI_VARIABLE_PPI MdeModulePkg/Include/Ppi/Variable.h | 189 ++++++++++++++++++++++++++++ MdeModulePkg/MdeModulePkg.dec | 3 + 2 files changed, 192 insertions(+) create mode 100644 MdeModulePkg/Include/Ppi/Variable.h -- 2.27.0.windows.1