From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by mx.groups.io with SMTP id smtpd.web10.75326.1656957193849429793 for ; Mon, 04 Jul 2022 10:53:14 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="body hash did not verify" header.i=@kernel.org header.s=k20201202 header.b=gEND7vVQ; spf=pass (domain: kernel.org, ip: 145.40.68.75, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id EEEB0B81187; Mon, 4 Jul 2022 17:53:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 40DBAC3411E; Mon, 4 Jul 2022 17:53:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656957190; bh=xX8OyGGmf2mIC4fApMGQXkwk7/yAmB2htiDaxpjlJTA=; h=From:To:Cc:Subject:Date:From; b=gEND7vVQWs9sTvudEs/kxLGdWipDH9/mCLScjFv5y6wVyf2VKNr/RkJDzYm/KazAt Nf1+cGeeQmIVM7NYa/VLOGLbYLUss1OXv0lRTfynibNVLGLc8yDNuXsEG02Rwm8vUG I1k1JjWycDhjZ77Hrd28X7IqmuEb60h7JaFYg6RFlbsbVuckGi/ZXrJR2UzCmZ8QW6 s1S+ecnl9jpYW5jTE65LpL4xLWIyke1EoLD6wOPU8blOTrPqKVpYh603S9tqZgv4ZZ gv3PgC78CNhnw6ul1DrfZNbshs51GE64uG/GsLWmqd5DAXJi1V3EiWdovftgj7su/T IKYrZJJYbaQ0w== From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: quic_llindhol@quicinc.com, sami.mujawar@arm.com, Ard Biesheuvel , Marc Zyngier , Alexander Graf Subject: [PATCH 0/7] ArmVirtPkg/ArmVirtQemu: avoid stores with MMU off Date: Mon, 4 Jul 2022 19:52:45 +0200 Message-Id: <20220704175252.4015120-1-ardb@kernel.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable We currently do a substantial amount of processing before enabling the MMU and caches, which is bad for performance, but also risky, as it requires cache coherency to be managed by hand. This also means that when running under virtualization, the hypervisor must do a non-trivial amount of work to ensure that the host's cached view of memory is consistent with the guest's uncached view. So let's update the ArmVirtQemu early boot sequence to improve the situation: - instead of switching the MMU off and on again to meet break-before-make (BBM) requirements when running at EL1, use two sets of page tables and switch between then using different ASIDs; - use a compile time generated ID map that covers the first bank of NOR flash, the first MMIO region (for the UART), and the first 128 MiB of DRAM, and switch to it straight out of reset. The resulting build no longer performs any memory accesses via the data side, and only relies on instruction fetches before the MMU is enabled. Cc: Marc Zyngier Cc: Alexander Graf Ard Biesheuvel (7): ArmPkg/ArmMmuLib: don't replace table entries with block entries ArmPkg/ArmMmuLib: use shadow page tables for break-before-make at EL1 ArmPkg/ArmMmuLib: permit initial configuration with MMU enabled ArmPlatformPkg/PrePeiCore: permit entry with the MMU enabled ArmVirtPkg/ArmVirtQemu: implement ArmPlatformLib with static ID map ArmVirtPkg/ArmVirtQemu: use first 128 MiB as permanent PEI memory ArmVirtPkg/ArmVirtQemu: enable initial ID map at early boot ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c | 3 = + ArmPkg/Include/Chipset/AArch64Mmu.h | 1 = + ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 162 = ++++++++++++-------- ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S | 15 = +- ArmPlatformPkg/PrePeiCore/PrePeiCore.c | 22 = +-- ArmVirtPkg/ArmVirtQemu.dsc | 10 = +- ArmVirtPkg/ArmVirtQemu.fdf | 2 = +- ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S | 111 = ++++++++++++++ ArmVirtPkg/Library/ArmPlatformLibQemu/ArmPlatformLibQemu.c | 36 = +++++ ArmVirtPkg/Library/ArmPlatformLibQemu/ArmPlatformLibQemu.inf | 36 = +++++ ArmVirtPkg/Library/ArmPlatformLibQemu/IdMap.S | 57 = +++++++ ArmVirtPkg/MemoryInitPei/MemoryInitPeim.c | 89 = +++++++++++ ArmVirtPkg/MemoryInitPei/MemoryInitPeim.inf | 66 = ++++++++ 13 files changed, 530 insertions(+), 80 deletions(-) create mode 100644 ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlat= formHelper.S create mode 100644 ArmVirtPkg/Library/ArmPlatformLibQemu/ArmPlatformLibQ= emu.c create mode 100644 ArmVirtPkg/Library/ArmPlatformLibQemu/ArmPlatformLibQ= emu.inf create mode 100644 ArmVirtPkg/Library/ArmPlatformLibQemu/IdMap.S create mode 100644 ArmVirtPkg/MemoryInitPei/MemoryInitPeim.c create mode 100644 ArmVirtPkg/MemoryInitPei/MemoryInitPeim.inf --=20 2.35.1