From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web09.578.1657215239737004569 for ; Thu, 07 Jul 2022 10:33:59 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=UPL+Tf9r; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: ankit.sinha@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1657215239; x=1688751239; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tnBvesWG0vDA0wX9/7z1XuE4YTDkjfjsQf00rGTEymg=; b=UPL+Tf9rg88m5wvmjAZCtdmEsNGQDbC/Zw8/iVNGaNibNdJJo6TKNsvX gBeHwnN40nampI0d5uuf7bclb/UTdtpAAMbi1KJ3IlL2rd7IG2lGIyLk1 mq/Dm1tpClYs1QheQeR6CdeFeyxNxYRdEygP+OKqDKaxzlyyLAgWs0Kua O5iF9LE+gxfpHv8+j8HIi1WNDCtNcC0qL3oioQ19r26nAtw56xysBKqq6 QGN6metxBeV0utxPayt82bRcdbSlsnA+0NCZLLpKKcON1OF97dMMv0U7d UpKDg4sCSlOpvYgUlooq99PydXgt9A0JL7CbY5YIQxlFP9dpIMpgfvxdO Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10401"; a="264496645" X-IronPort-AV: E=Sophos;i="5.92,253,1650956400"; d="scan'208";a="264496645" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2022 10:33:59 -0700 X-IronPort-AV: E=Sophos;i="5.92,253,1650956400"; d="scan'208";a="626396638" Received: from ankitsin-mobl4.amr.corp.intel.com ([10.251.18.224]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jul 2022 10:33:58 -0700 From: "Sinha, Ankit" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Isaac Oram , Eric Dong Subject: [edk2-platforms PATCH V1 1/6] Platform/Intel: Modifying PCD class for some ACPI related PCDs Date: Thu, 7 Jul 2022 10:33:25 -0700 Message-Id: <20220707173330.2066-2-ankit.sinha@intel.com> X-Mailer: git-send-email 2.27.0.windows.1 In-Reply-To: <20220707173330.2066-1-ankit.sinha@intel.com> References: <20220707173330.2066-1-ankit.sinha@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: ankit13s Some PCDs related to FADT entries need to be defined as dynamic for boottime customization and update. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Isaac Oram Cc: Eric Dong Signed-off-by: Ankit Sinha --- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 29 ++++++++++--------- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf | 24 +++++++++------- Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 30 ++++++++++---------- 3 files changed, 44 insertions(+), 39 deletions(-) diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index 3c9f79de5c6c..c7e87cbd7d9d 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -1068,7 +1068,7 @@ InstallMcfgFromScratch ( &McfgTable->Header, EFI_ACPI_3_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE, EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION, - 0 + FixedPcdGet32 (PcdAcpiDefaultOemRevision) ); if (EFI_ERROR (Status)) { return Status; @@ -1195,6 +1195,7 @@ PlatformUpdateTables ( FadtHeader->PreferredPmProfile = PcdGet8 (PcdFadtPreferredPmProfile); FadtHeader->IaPcBootArch = PcdGet16 (PcdFadtIaPcBootArch); FadtHeader->Flags = PcdGet32 (PcdFadtFlags); + FadtHeader->SmiCmd = PcdGet32 (PcdFadtSmiCmd); FadtHeader->AcpiEnable = PcdGet8 (PcdAcpiEnableSwSmi); FadtHeader->AcpiDisable = PcdGet8 (PcdAcpiDisableSwSmi); FadtHeader->Pm1aEvtBlk = PcdGet16 (PcdAcpiPm1AEventBlockAddress); @@ -1209,6 +1210,7 @@ PlatformUpdateTables ( FadtHeader->Gpe1Base = PcdGet8 (PcdAcpiGpe1Base); FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress); + FadtHeader->XPm1bEvtBlk.Address = PcdGet16 (PcdAcpiPm1BEventBlockAddress); FadtHeader->XPm1aCntBlk.Address = PcdGet16 (PcdAcpiPm1AControlBlockAddress); FadtHeader->XPm1bCntBlk.Address = PcdGet16 (PcdAcpiPm1BControlBlockAddress); FadtHeader->XPm2CntBlk.Address = PcdGet16 (PcdAcpiPm2ControlBlockAddress); @@ -1216,7 +1218,7 @@ PlatformUpdateTables ( FadtHeader->XGpe0Blk.Address = PcdGet16 (PcdAcpiGpe0BlockAddress); FadtHeader->XGpe1Blk.Address = PcdGet16 (PcdAcpiGpe1BlockAddress); - FadtHeader->ResetReg.AccessSize = PcdGet8 (PcdAcpiResetRegAccessSize); + FadtHeader->ResetReg.AccessSize = PcdGet8 (PcdAcpiResetRegisterAccessSize); FadtHeader->XPm1aEvtBlk.AccessSize = PcdGet8 (PcdAcpiXPm1aEvtBlkAccessSize); FadtHeader->XPm1bEvtBlk.AccessSize = PcdGet8 (PcdAcpiXPm1bEvtBlkAccessSize); FadtHeader->XPm1aCntBlk.AccessSize = PcdGet8 (PcdAcpiXPm1aCntBlkAccessSize); @@ -1226,22 +1228,23 @@ PlatformUpdateTables ( FadtHeader->XGpe0Blk.AccessSize = PcdGet8 (PcdAcpiXGpe0BlkAccessSize); FadtHeader->XGpe1Blk.AccessSize = PcdGet8 (PcdAcpiXGpe1BlkAccessSize); - FadtHeader->SleepControlReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepControlRegAddressSpaceId); - FadtHeader->SleepControlReg.RegisterBitOffset = PcdGet8 (PcdAcpiSleepControlRegRegisterBitOffset); - FadtHeader->SleepControlReg.AccessSize = PcdGet8 (PcdAcpiSleepControlRegAccessSize); - FadtHeader->SleepControlReg.Address = PcdGet64 (PcdAcpiSleepControlRegAddress); - FadtHeader->SleepStatusReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepStatusRegAddressSpaceId); - FadtHeader->SleepStatusReg.RegisterBitWidth = PcdGet8 (PcdAcpiSleepStatusRegRegisterBitWidth); - FadtHeader->SleepStatusReg.RegisterBitOffset = PcdGet8 (PcdAcpiSleepStatusRegRegisterBitOffset); - FadtHeader->SleepStatusReg.AccessSize = PcdGet8 (PcdAcpiSleepStatusRegAccessSize); - FadtHeader->SleepStatusReg.Address = PcdGet64 (PcdAcpiSleepStatusRegAddress); + FadtHeader->SleepControlReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepControlRegisterAddressSpaceId); + FadtHeader->SleepControlReg.RegisterBitWidth = PcdGet8 (PcdAcpiSleepControlRegisterBitWidth); + FadtHeader->SleepControlReg.RegisterBitOffset = PcdGet8 (PcdAcpiSleepControlRegisterBitOffset); + FadtHeader->SleepControlReg.AccessSize = PcdGet8 (PcdAcpiSleepControlRegisterAccessSize); + FadtHeader->SleepControlReg.Address = PcdGet64 (PcdAcpiSleepControlRegisterAddress); + FadtHeader->SleepStatusReg.AddressSpaceId = PcdGet8 (PcdAcpiSleepStatusRegisterAddressSpaceId); + FadtHeader->SleepStatusReg.RegisterBitWidth = PcdGet8 (PcdAcpiSleepStatusRegisterBitWidth); + FadtHeader->SleepStatusReg.RegisterBitOffset = PcdGet8 (PcdAcpiSleepStatusRegisterBitOffset); + FadtHeader->SleepStatusReg.AccessSize = PcdGet8 (PcdAcpiSleepStatusRegisterAccessSize); + FadtHeader->SleepStatusReg.Address = PcdGet64 (PcdAcpiSleepStatusRegisterAddress); FadtHeader->S4BiosReq = PcdGet8 (PcdAcpiS4BiosReq); FadtHeader->XPm1aEvtBlk.Address = PcdGet16 (PcdAcpiPm1AEventBlockAddress); FadtHeader->XPm1bEvtBlk.Address = PcdGet16 (PcdAcpiPm1BEventBlockAddress); - FadtHeader->DutyOffset = PcdGet8 (PcdFadtDutyOffset); - FadtHeader->DutyWidth = PcdGet8 (PcdFadtDutyWidth); + FadtHeader->DutyOffset = PcdGet8 (PcdFadtDutyOffset); + FadtHeader->DutyWidth = PcdGet8 (PcdFadtDutyWidth); DEBUG ((DEBUG_INFO, "ACPI FADT table @ address 0x%x\n", Table)); DEBUG ((DEBUG_INFO, " IaPcBootArch 0x%x\n", FadtHeader->IaPcBootArch)); diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf index 119212d2216b..31b6c3be3cc1 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf @@ -71,6 +71,8 @@ gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength + gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch + gMinPlatformPkgTokenSpaceGuid.PcdFadtSmiCmd gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress @@ -82,7 +84,7 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockAddress gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress - gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegisterAccessSize gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aCntBlkAccessSize @@ -91,16 +93,16 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAddressSpaceId + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterBitWidth + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterBitOffset + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAddress + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAddressSpaceId + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterBitWidth + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterBitOffset + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAccessSize + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAddress gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec index 68ab1d702d6a..58fc5ba15908 100644 --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec @@ -112,9 +112,7 @@ gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8|UINT32|0x90000022 gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|4|UINT32|0x90000023 - gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x90000025 - gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x90000026 - gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x90000027 + gMinPlatformPkgTokenSpaceGuid.PcdFadtSmiCmd|0x000000B2|UINT32|0x9000002A gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16|0x00010035 gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16|0x00010036 @@ -126,7 +124,7 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe0BlockLength|0x00|UINT8|0x0001003C gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x0001003D gMinPlatformPkgTokenSpaceGuid.PcdAcpiGpe1Base|0x00|UINT8|0x00010040 - gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegAccessSize|0x00|UINT8|0x00010042 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiResetRegisterAccessSize|0x00|UINT8|0x00010042 gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1aEvtBlkAccessSize|0x00|UINT8|0x00010043 gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPm1bEvtBlkAccessSize|0x00|UINT8|0x00010044 @@ -136,17 +134,6 @@ gMinPlatformPkgTokenSpaceGuid.PcdAcpiXPmTmrBlkAccessSize|0x00|UINT8|0x00010048 gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe0BlkAccessSize|0x00|UINT8|0x00010049 gMinPlatformPkgTokenSpaceGuid.PcdAcpiXGpe1BlkAccessSize|0x00|UINT8|0x0001004A - - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddressSpaceId|0x00|UINT8|0x0001004B - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitWidth|0x00|UINT8|0x0001004C - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegRegisterBitOffset|0x00|UINT8|0x0001004D - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAccessSize|0x00|UINT8|0x0001004E - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegAddress|0x0000000000000000|UINT64|0x0001004F - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddressSpaceId|0x00|UINT8|0x00010050 - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitWidth|0x00|UINT8|0x00010051 - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegRegisterBitOffset|0x00|UINT8|0x00010052 - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAccessSize|0x00|UINT8|0x00010053 - gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegAddress|0x0000000000000000|UINT64|0x00010054 gMinPlatformPkgTokenSpaceGuid.PcdAcpiS4BiosReq|0x0000|UINT8|0x00010055 # @@ -271,6 +258,19 @@ [PcdsDynamic, PcdsDynamicEx] gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000019 + gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x90000025 + gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x90000026 + gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x90000027 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAddressSpaceId|0x00|UINT8|0x0001004B + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterBitWidth|0x00|UINT8|0x0001004C + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterBitOffset|0x00|UINT8|0x0001004D + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAccessSize|0x00|UINT8|0x0001004E + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepControlRegisterAddress|0x0000000000000000|UINT64|0x0001004F + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAddressSpaceId|0x00|UINT8|0x00010050 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterBitWidth|0x00|UINT8|0x00010051 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterBitOffset|0x00|UINT8|0x00010052 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAccessSize|0x00|UINT8|0x00010053 + gMinPlatformPkgTokenSpaceGuid.PcdAcpiSleepStatusRegisterAddress|0x0000000000000000|UINT64|0x00010054 [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] -- 2.27.0.windows.1