From: "Ni, Ray" <ray.ni@intel.com>
To: devel@edk2.groups.io
Cc: Zhiguang Liu <zhiguang.liu@intel.com>, Eric Dong <eric.dong@intel.com>
Subject: [PATCH 03/10] CpuPageTableLib: Fix a bug when a bit is 1 in Attribute, 0 in Mask
Date: Mon, 18 Jul 2022 21:18:24 +0800 [thread overview]
Message-ID: <20220718131831.660-4-ray.ni@intel.com> (raw)
In-Reply-To: <20220718131831.660-1-ray.ni@intel.com>
To reproduce the issue:
UINTN PageTable;
VOID *Buffer;
UINTN PageTableBufferSize;
IA32_MAP_ATTRIBUTE Attribute;
IA32_MAP_ATTRIBUTE Mask;
RETURN_STATUS Status;
Attribute.Uint64 = 0;
Mask.Uint64 = 0;
PageTableBufferSize = 0;
PageTable = 0;
Buffer = NULL;
Attribute.Bits.Present = 1;
Attribute.Bits.Nx = 1;
Mask.Bits.Present = 1;
Mask.Uint64 = MAX_UINT64;
//
// Create page table to cover [0, 10M)
//
Status = PageTableMap (
&PageTable, PagingMode, Buffer, &PageTableBufferSize,
0, (UINT64)SIZE_2MB * 5, &Attribute, &Mask
);
ASSERT (Status == RETURN_BUFFER_TOO_SMALL);
Buffer = AllocatePages (EFI_SIZE_TO_PAGES (PageTableBufferSize));
Status = PageTableMap (
&PageTable, PagingMode, Buffer, &PageTableBufferSize,
0, (UINT64)SIZE_2MB * 5, &Attribute, &Mask
);
ASSERT (Status == RETURN_SUCCESS);
//
// Change the mapping for [0, 4KB)
// No change actually. Just clear Nx bit in Mask.
//
Mask.Bits.Nx = 0;
PageTableBufferSize = 0;
Status = PageTableMap (
&PageTable, PagingMode, NULL, &PageTableBufferSize,
0, (UINT64)SIZE_4KB, &Attribute, &Mask
);
ASSERT (Status == RETURN_SUCCESS); // FAIL!!
The root cause is when comparing the existing mapping attributes
against the requested one, Mask is not used but it should be used.
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
---
UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
index 17bca5e351..429b014b7b 100644
--- a/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
+++ b/UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableMap.c
@@ -308,7 +308,7 @@ PageTableLibMapInLevel (
//
PleBAttribute.Uint64 = PageTableLibGetPleBMapAttribute (&ParentPagingEntry->PleB, &NopAttribute);
if ((IA32_MAP_ATTRIBUTE_ATTRIBUTES (&PleBAttribute) & IA32_MAP_ATTRIBUTE_ATTRIBUTES (Mask))
- == IA32_MAP_ATTRIBUTE_ATTRIBUTES (Attribute))
+ == (IA32_MAP_ATTRIBUTE_ATTRIBUTES (Attribute) & IA32_MAP_ATTRIBUTE_ATTRIBUTES (Mask)))
{
//
// This function is called when the memory length is less than the region length of the parent level.
--
2.35.1.windows.2
next prev parent reply other threads:[~2022-07-18 13:18 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-18 13:18 [PATCH 00/10] UefiCpuPkg: Create CpuPageTableLib for manipulating X86 paging structs Ni, Ray
2022-07-18 13:18 ` [PATCH 01/10] " Ni, Ray
2022-07-18 13:49 ` [edk2-devel] " Gerd Hoffmann
2022-07-19 8:17 ` Ni, Ray
2022-08-15 16:23 ` Lendacky, Thomas
2022-08-16 2:25 ` Ni, Ray
2022-07-18 13:18 ` [PATCH 02/10] UefiCpuPkg/CpuPageTableLib: Return error on invalid parameters Ni, Ray
2022-07-18 13:18 ` Ni, Ray [this message]
2022-07-18 13:18 ` [PATCH 04/10] CpuPageTableLib: Refactor the logic Ni, Ray
2022-07-18 13:18 ` [PATCH 05/10] CpuPageTableLib: Split the page entry when LA is aligned but PA is not Ni, Ray
2022-07-18 13:18 ` [PATCH 06/10] CpuPageTableLib: Avoid treating non-leaf entry as leaf one Ni, Ray
2022-07-18 13:18 ` [PATCH 07/10] CpuPageTableLib: Fix parent attributes are not inherited properly Ni, Ray
2022-07-18 13:18 ` [PATCH 08/10] CpuPageTableLib: Fix a bug to avoid unnecessary changing to page table Ni, Ray
2022-07-18 13:18 ` [PATCH 09/10] CpuPageTableLib: Fix bug that wrongly requires extra size for mapping Ni, Ray
2022-07-18 13:18 ` [PATCH 10/10] CpuPageTableLib: define IA32_PAGE_LEVEL enum type internally Ni, Ray
2022-08-09 3:46 ` [edk2-devel] [PATCH 00/10] UefiCpuPkg: Create CpuPageTableLib for manipulating X86 paging structs Dong, Eric
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