[PATCH v1 3/5] S3FeaturePkg: Implement S3 resume

["Benjamin Doron" <benjamin.doron00@gmail.com>]

Follow-up commits to MinPlatform (AcpiPlatform and
PeiFspWrapperHobProcessLib for memory) and FSP-related board libraries
required for successful S3 resume.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Ankit Sinha <ankit.sinha@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
---
 Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf | 14 ++++
 Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf  |  8 +-
 Features/Intel/PowerManagement/S3FeaturePkg/Include/S3Feature.dsc  | 56 ++++++++++++-
 Features/Intel/PowerManagement/S3FeaturePkg/S3Pei/S3Pei.c          | 83 ++++++++++++++++++--
 Features/Intel/PowerManagement/S3FeaturePkg/S3Pei/S3Pei.inf        |  8 +-
 5 files changed, 161 insertions(+), 8 deletions(-)

diff --git a/Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf b/Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf
index 9e17f853c630..44aa2fb1b85e 100644
--- a/Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf
+++ b/Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf
@@ -2,7 +2,21 @@
 #  FDF file for post-memory S3 advanced feature modules.
 #
 # Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2022, Baruch Binyamin Doron.<BR>
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
+
+## Dependencies
+  INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
+  INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
+  # FSP may perform CPU finalisation, requires CpuInitDxe from closed code
+  # - Presently, PiSmmCpuDxeSmm shall perform finalisation with this data
+  INF UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
+
+## Save-state module stack
+  INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
+
+## Restore-state module stack
+  INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
diff --git a/Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf b/Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf
index fdd16a4e0356..e130fa5f098d 100644
--- a/Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf
+++ b/Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf
@@ -2,9 +2,15 @@
 #  FDF file for pre-memory S3 advanced feature modules.
 #
 # Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2022, Baruch Binyamin Doron.<BR>
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
 
-INF S3FeaturePkg/S3Pei/S3Pei.inf
+## Dependencies
+  INF S3FeaturePkg/S3Pei/S3Pei.inf
+  INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
+
+## Restore-state module stack
+  INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
diff --git a/Features/Intel/PowerManagement/S3FeaturePkg/Include/S3Feature.dsc b/Features/Intel/PowerManagement/S3FeaturePkg/Include/S3Feature.dsc
index cc34e785076a..77dc7f9da61c 100644
--- a/Features/Intel/PowerManagement/S3FeaturePkg/Include/S3Feature.dsc
+++ b/Features/Intel/PowerManagement/S3FeaturePkg/Include/S3Feature.dsc
@@ -7,6 +7,7 @@
 # for the build infrastructure.
 #
 # Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2022, Baruch Binyamin Doron.<BR>
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -25,6 +26,10 @@
     !error "DXE_ARCH must be specified to build this feature!"
   !endif
 
+[PcdsFixedAtBuild]
+  # Attempts to improve performance at the cost of more DRAM usage
+  gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnS3Boot|TRUE
+
 ################################################################################
 #
 # Library Class section - list of all Library Classes needed by this feature.
@@ -32,7 +37,15 @@
 ################################################################################
 
 [LibraryClasses.common.PEIM]
-  SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLib/PeiSmmAccessLib.inf
+  # TODO: Some platforms (TGL) do a no-op.
+  SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.inf
+  SmmControlLib|IntelSiliconPkg/Feature/SmmControl/Library/PeiSmmControlLib/PeiSmmControlLib.inf
+
+[LibraryClasses.common.DXE_DRIVER, LibraryClasses.common.DXE_SMM_DRIVER]
+  #######################################
+  # Edk2 Packages
+  #######################################
+  S3BootScriptLib|MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf
 
 ################################################################################
 #
@@ -65,3 +78,44 @@
 
   # Add components here that should be included in the package build.
   S3FeaturePkg/S3Pei/S3Pei.inf
+  UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
+  UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
+
+#
+# Feature DXE Components
+#
+
+# @todo: Change below line to [Components.$(DXE_ARCH)] after https://bugzilla.tianocore.org/show_bug.cgi?id=2308
+#        is completed.
+[Components.X64]
+  #####################################
+  # S3 Feature Package
+  #####################################
+
+  # Add library instances here that are not included in package components and should be tested
+  # in the package build.
+
+  # Add components here that should be included in the package build.
+  UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
+  MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
+  UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
+  MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
+  # NOTE: DebugLibReportStatusCode will be after exit-BS
+  # - DebugLibSerialPort requires care to avoid gBS in SerialPortInitialize()
+  # - No variable assigns after ReadyToLock take effect, due to LockBox copy
+  MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
+
+###################################################################################################
+#
+# BuildOptions Section - Define the module specific tool chain flags that should be used as
+#                        the default flags for a module. These flags are appended to any
+#                        standard flags that are defined by the build process. They can be
+#                        applied for any modules or only those modules with the specific
+#                        module style (EDK or EDKII) specified in [Components] section.
+#
+#                        For advanced features, it is recommended to enable [BuildOptions] in
+#                        the applicable INF file so it does not affect the whole board package
+#                        build when this DSC file is active.
+#
+###################################################################################################
+[BuildOptions]
diff --git a/Features/Intel/PowerManagement/S3FeaturePkg/S3Pei/S3Pei.c b/Features/Intel/PowerManagement/S3FeaturePkg/S3Pei/S3Pei.c
index b0aaa04962c8..6acb894b6fc9 100644
--- a/Features/Intel/PowerManagement/S3FeaturePkg/S3Pei/S3Pei.c
+++ b/Features/Intel/PowerManagement/S3FeaturePkg/S3Pei/S3Pei.c
@@ -2,12 +2,87 @@
   Source code file for S3 PEI module
 
 Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2022, Baruch Binyamin Doron.<BR>
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
+#include <PiPei.h>
+#include <Library/DebugLib.h>
+#include <Library/PciLib.h>
 #include <Library/PeiServicesLib.h>
 #include <Library/SmmAccessLib.h>
+#include <Library/SmmControlLib.h>
+
+// TODO: Finalise implementation factoring
+#define R_SA_PAM0  (0x80)
+#define R_SA_PAM5  (0x85)
+#define R_SA_PAM6  (0x86)
+
+/**
+  This function is called after FspSiliconInitDone installed PPI.
+  For FSP API mode, this is when FSP-M HOBs are installed into EDK2.
+
+  @param[in] PeiServices    Pointer to PEI Services Table.
+  @param[in] NotifyDesc     Pointer to the descriptor for the Notification event that
+                            caused this function to execute.
+  @param[in] Ppi            Pointer to the PPI data associated with this function.
+
+  @retval EFI_STATUS        Always return EFI_SUCCESS
+**/
+EFI_STATUS
+EFIAPI
+FspSiliconInitDoneNotify (
+  IN EFI_PEI_SERVICES           **PeiServices,
+  IN EFI_PEI_NOTIFY_DESCRIPTOR  *NotifyDesc,
+  IN VOID                       *Ppi
+  )
+{
+  EFI_STATUS     Status;
+  EFI_BOOT_MODE  BootMode;
+  UINT64         MchBaseAddress;
+
+  Status = PeiServicesGetBootMode (&BootMode);
+  ASSERT_EFI_ERROR (Status);
+
+  // Enable PAM regions for AP wakeup vector (resume)
+  // - CPU is finalised by PiSmmCpuDxeSmm, not FSP. So, it's safe here?
+  // TODO/TEST: coreboot does this unconditionally, vendor FWs may not (test resume). Should we?
+  // - It is certainly interesting that only PAM0, PAM5 and PAM6 are defined for KabylakeSiliconPkg.
+  // - Also note that 0xA0000-0xFFFFF is marked "reserved" in FSP HOB - this does not mean
+  //   that the memory is unusable, perhaps this is precisely because it will contain
+  //   the AP wakeup vector.
+  if (BootMode == BOOT_ON_S3_RESUME) {
+    MchBaseAddress = PCI_LIB_ADDRESS (0, 0, 0, 0);
+    PciWrite8 (MchBaseAddress + R_SA_PAM0, 0x30);
+    PciWrite8 (MchBaseAddress + (R_SA_PAM0 + 1), 0x33);
+    PciWrite8 (MchBaseAddress + (R_SA_PAM0 + 2), 0x33);
+    PciWrite8 (MchBaseAddress + (R_SA_PAM0 + 3), 0x33);
+    PciWrite8 (MchBaseAddress + (R_SA_PAM0 + 4), 0x33);
+    PciWrite8 (MchBaseAddress + R_SA_PAM5, 0x33);
+    PciWrite8 (MchBaseAddress + R_SA_PAM6, 0x33);
+  }
+
+  //
+  // Install EFI_PEI_MM_ACCESS_PPI for S3 resume case
+  //
+  Status = PeiInstallSmmAccessPpi ();
+  ASSERT_EFI_ERROR (Status);
+
+  //
+  // Install EFI_PEI_MM_CONTROL_PPI for S3 resume case
+  //
+  Status = PeiInstallSmmControlPpi ();
+  ASSERT_EFI_ERROR (Status);
+
+  return Status;
+}
+
+EFI_PEI_NOTIFY_DESCRIPTOR  mFspSiliconInitDoneNotifyDesc = {
+  (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+  &gFspSiliconInitDonePpiGuid,
+  FspSiliconInitDoneNotify
+};
 
 /**
   S3 PEI module entry point
@@ -25,12 +100,10 @@ S3PeiEntryPoint (
   IN CONST EFI_PEI_SERVICES     **PeiServices
   )
 {
-  EFI_STATUS Status;
+  EFI_STATUS  Status;
 
-  //
-  // Install EFI_PEI_MM_ACCESS_PPI for S3 resume case
-  //
-  Status = PeiInstallSmmAccessPpi ();
+  Status = PeiServicesNotifyPpi (&mFspSiliconInitDoneNotifyDesc);
+  ASSERT_EFI_ERROR (Status);
 
   return Status;
 }
diff --git a/Features/Intel/PowerManagement/S3FeaturePkg/S3Pei/S3Pei.inf b/Features/Intel/PowerManagement/S3FeaturePkg/S3Pei/S3Pei.inf
index e485eac9521f..173919bb881e 100644
--- a/Features/Intel/PowerManagement/S3FeaturePkg/S3Pei/S3Pei.inf
+++ b/Features/Intel/PowerManagement/S3FeaturePkg/S3Pei/S3Pei.inf
@@ -18,10 +18,13 @@
 [LibraryClasses]
   PeimEntryPoint
   PeiServicesLib
+  DebugLib
   SmmAccessLib
+  SmmControlLib
 
 [Packages]
   MdePkg/MdePkg.dec
+  IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
   IntelSiliconPkg/IntelSiliconPkg.dec
   S3FeaturePkg/S3FeaturePkg.dec
 
@@ -31,5 +34,8 @@
 [FeaturePcd]
   gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable
 
+[Ppis]
+  gFspSiliconInitDonePpiGuid
+
 [Depex]
-  gEfiPeiMemoryDiscoveredPpiGuid
+  TRUE
-- 
2.36.1