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([2607:f2c0:e98c:e:39b7:8453:91b5:69bf]) by smtp.gmail.com with ESMTPSA id z8-20020ac84308000000b0031ee1f0c420sm3766705qtm.10.2022.07.22.17.22.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Jul 2022 17:22:08 -0700 (PDT) From: "Benjamin Doron" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Ankit Sinha , Isaac Oram , Liming Gao , Eric Dong Subject: [PATCH v1 4/5] [WIP] MinPlatformPkg: Implement S3 resume Date: Fri, 22 Jul 2022 20:20:00 -0400 Message-Id: <20220723002001.1309418-5-benjamin.doron00@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220723002001.1309418-1-benjamin.doron00@gmail.com> References: <20220723002001.1309418-1-benjamin.doron00@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Allocate memory to use on S3 resume. TODO: Size calculation, confirm implementation goes in this module. Cc: Chasel Chiu Cc: Nate DeSimone Cc: Ankit Sinha Cc: Isaac Oram Cc: Liming Gao Cc: Eric Dong Signed-off-by: Benjamin Doron --- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c = | 133 ++++++++++++++++++++ Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.h = | 4 + Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf = | 6 + Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLi= b/FspWrapperHobProcessLib.c | 70 ++++++++++- Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLi= b/PeiFspWrapperHobProcessLib.inf | 2 + Platform/Intel/MinPlatformPkg/Include/AcpiS3MemoryNvData.h = | 22 ++++ Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc = | 4 + Platform/Intel/MinPlatformPkg/Include/Fdf/CorePostMemoryInclude.fdf = | 4 + 8 files changed, 244 insertions(+), 1 deletion(-) diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b= /Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index c7e87cbd7d9d..1d369e7a6541 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -1424,6 +1424,135 @@ AcpiEndOfDxeEvent ( IsHardwareChange ();=0D }=0D =0D +/**=0D + Get the mem size in memory type infromation table.=0D +=0D + @return the mem size in memory type infromation table.=0D +**/=0D +STATIC=0D +UINT64=0D +GetMemorySizeInMemoryTypeInformation (=0D + VOID=0D + )=0D +{=0D + EFI_STATUS Status;=0D + EFI_MEMORY_TYPE_INFORMATION *MemoryData;=0D + UINT8 Index;=0D + UINTN TempPageNum;=0D +=0D + Status =3D EfiGetSystemConfigurationTable (&gEfiMemoryTypeInformationGui= d, (VOID **) &MemoryData);=0D +=0D + if (EFI_ERROR (Status) || MemoryData =3D=3D NULL) {=0D + return 0;=0D + }=0D +=0D + TempPageNum =3D 0;=0D + for (Index =3D 0; MemoryData[Index].Type !=3D EfiMaxMemoryType; Index++)= {=0D + //=0D + // Accumulate default memory size requirements=0D + //=0D + TempPageNum +=3D MemoryData[Index].NumberOfPages;=0D + }=0D +=0D + return TempPageNum * EFI_PAGE_SIZE;=0D +}=0D +=0D +/**=0D + Get the mem size need to be consumed and reserved for PEI phase resume.= =0D +=0D + @return the mem size to be reserved for PEI phase resume.=0D +**/=0D +STATIC=0D +UINT64=0D +GetPeiMemSize (=0D + VOID=0D + )=0D +{=0D + #define PEI_ADDITIONAL_MEMORY_SIZE (16 * EFI_PAGE_SIZE)=0D +=0D + UINT64 Size;=0D +=0D + Size =3D GetMemorySizeInMemoryTypeInformation ();=0D +=0D + return PcdGet32 (PcdPeiMinMemSize) + Size + PEI_ADDITIONAL_MEMORY_SIZE;= =0D +}=0D +=0D +/**=0D + Allocate EfiACPIMemoryNVS below 4G memory address.=0D +=0D + This function allocates EfiACPIMemoryNVS below 4G memory address.=0D +=0D + @param Size Size of memory to allocate.=0D +=0D + @return Allocated address for output.=0D +=0D +**/=0D +VOID *=0D +AllocateAcpiNvsMemoryBelow4G (=0D + IN UINTN Size=0D + )=0D +{=0D + UINTN Pages;=0D + EFI_PHYSICAL_ADDRESS Address;=0D + EFI_STATUS Status;=0D + VOID *Buffer;=0D +=0D + Pages =3D EFI_SIZE_TO_PAGES (Size);=0D + Address =3D 0xffffffff;=0D +=0D + Status =3D gBS->AllocatePages (=0D + AllocateMaxAddress,=0D + EfiACPIMemoryNVS,=0D + Pages,=0D + &Address=0D + );=0D + ASSERT_EFI_ERROR (Status);=0D +=0D + Buffer =3D (VOID *)(UINTN)Address;=0D + ZeroMem (Buffer, Size);=0D +=0D + return Buffer;=0D +}=0D +=0D +/**=0D + Allocates memory to use on S3 resume=0D +**/=0D +STATIC=0D +VOID=0D +EFIAPI=0D +AllocateS3ResumeMemory (=0D + VOID=0D + )=0D +{=0D + EFI_STATUS Status;=0D + UINT64 S3PeiMemBase;=0D + UINT64 S3PeiMemSize;=0D + ACPI_S3_MEMORY S3MemoryInfo;=0D +=0D + DEBUG ((DEBUG_INFO, "%a() Start\n", __FUNCTION__));=0D +=0D + S3PeiMemSize =3D GetPeiMemSize ();=0D + S3PeiMemBase =3D (UINTN) AllocateAcpiNvsMemoryBelow4G (S3PeiMemSize);=0D + ASSERT (S3PeiMemBase !=3D 0);=0D +=0D + S3MemoryInfo.S3PeiMemBase =3D S3PeiMemBase;=0D + S3MemoryInfo.S3PeiMemSize =3D S3PeiMemSize;=0D +=0D + DEBUG ((DEBUG_INFO, "S3PeiMemBase: 0x%x\n", S3PeiMemBase));=0D + DEBUG ((DEBUG_INFO, "S3PeiMemSize: 0x%x\n", S3PeiMemSize));=0D +=0D + Status =3D gRT->SetVariable (=0D + ACPI_S3_MEMORY_NV_NAME,=0D + &gEfiAcpiVariableGuid,=0D + EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACC= ESS,=0D + sizeof (S3MemoryInfo),=0D + &S3MemoryInfo=0D + );=0D + ASSERT_EFI_ERROR (Status);=0D +=0D + DEBUG ((DEBUG_INFO, "%a() End\n", __FUNCTION__));=0D +}=0D +=0D /**=0D ACPI Platform driver installation function.=0D =0D @@ -1493,5 +1622,9 @@ InstallAcpiPlatform ( InstallMadtFromScratch ();=0D InstallMcfgFromScratch ();=0D =0D + //if (FeaturePcdGet (PcdS3FeatureEnable)) {=0D + AllocateS3ResumeMemory ();=0D + //}=0D +=0D return EFI_SUCCESS;=0D }=0D diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.h b= /Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.h index 9bdc482f4382..381bdd25f671 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.h +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.h @@ -21,8 +21,10 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D #include =0D #include =0D +#include =0D #include =0D #include =0D #include =0D @@ -43,4 +45,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent =0D #include =0D =0D +#include =0D +=0D #endif=0D diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf= b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf index 31b6c3be3cc1..1b59427d3452 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.inf @@ -28,6 +28,7 @@ MdeModulePkg/MdeModulePkg.dec=0D UefiCpuPkg/UefiCpuPkg.dec=0D MinPlatformPkg/MinPlatformPkg.dec=0D + IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec=0D PcAtChipsetPkg/PcAtChipsetPkg.dec=0D =0D [LibraryClasses]=0D @@ -115,6 +116,9 @@ =0D gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags=0D =0D + #gS3FeaturePkgTokenSpaceGuid.PcdS3FeatureEnable=0D + gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize=0D +=0D [Protocols]=0D gEfiAcpiTableProtocolGuid ## CONSUMES=0D gEfiMpServiceProtocolGuid ## CONSUMES=0D @@ -124,6 +128,8 @@ gEfiGlobalVariableGuid ## CONSUMES=0D gEfiHobListGuid ## CONSUMES=0D gEfiEndOfDxeEventGroupGuid ## CONSUMES=0D + gEfiMemoryTypeInformationGuid ## CONSUMES=0D + gEfiAcpiVariableGuid ## CONSUMES=0D =0D [Depex]=0D gEfiAcpiTableProtocolGuid AND=0D diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapper= HobProcessLib/FspWrapperHobProcessLib.c b/Platform/Intel/MinPlatformPkg/Fsp= Wrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c index 7ee4d3a31c49..992ec5d41bd8 100644 --- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProc= essLib/FspWrapperHobProcessLib.c +++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProc= essLib/FspWrapperHobProcessLib.c @@ -16,14 +16,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D #include =0D #include =0D #include =0D #include =0D #include =0D #include =0D +#include =0D =0D #include =0D +#include =0D =0D //=0D // Additional pages are used by DXE memory manager.=0D @@ -130,6 +133,55 @@ GetPeiMemSize ( return MinSize + Size + PEI_ADDITIONAL_MEMORY_SIZE;=0D }=0D =0D +/**=0D + Get S3 PEI memory information.=0D +=0D + @note At this point, memory is ready, and PeiServices are available to u= se.=0D + Platform can get some data from SMRAM directly.=0D +=0D + @param[out] S3PeiMemSize PEI memory size to be installed in S3 phase.=0D + @param[out] S3PeiMemBase PEI memory base to be installed in S3 phase.=0D +=0D + @return If S3 PEI memory information is got successfully.=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +GetS3MemoryInfo (=0D + OUT UINT64 *S3PeiMemSize,=0D + OUT EFI_PHYSICAL_ADDRESS *S3PeiMemBase=0D + )=0D +{=0D + EFI_STATUS Status;=0D + EFI_PEI_READ_ONLY_VARIABLE2_PPI *VariablePpi;=0D + UINTN DataSize;=0D + ACPI_S3_MEMORY S3MemoryInfo;=0D +=0D + *S3PeiMemBase =3D 0;=0D + *S3PeiMemSize =3D 0;=0D +=0D + Status =3D PeiServicesLocatePpi (&gEfiPeiReadOnlyVariable2PpiGuid, 0, NU= LL, (VOID **) &VariablePpi);=0D + ASSERT_EFI_ERROR (Status);=0D +=0D + DataSize =3D sizeof (S3MemoryInfo);=0D + Status =3D VariablePpi->GetVariable (=0D + VariablePpi,=0D + ACPI_S3_MEMORY_NV_NAME,=0D + &gEfiAcpiVariableGuid,=0D + NULL,=0D + &DataSize,=0D + &S3MemoryInfo=0D + );=0D + ASSERT_EFI_ERROR (Status);=0D +=0D + if (EFI_ERROR (Status)) {=0D + return Status;=0D + }=0D +=0D + *S3PeiMemBase =3D S3MemoryInfo.S3PeiMemBase;=0D + *S3PeiMemSize =3D S3MemoryInfo.S3PeiMemSize;=0D + return EFI_SUCCESS;=0D +}=0D +=0D /**=0D Post FSP-M HOB process for Memory Resource Descriptor.=0D =0D @@ -280,7 +332,7 @@ PostFspmHobProcess ( 0x1000=0D );=0D =0D -=0D + if (BootMode !=3D BOOT_ON_S3_RESUME) {=0D //=0D // Capsule mode=0D //=0D @@ -337,7 +389,23 @@ PostFspmHobProcess ( if (Capsule !=3D NULL) {=0D Status =3D Capsule->CreateState ((EFI_PEI_SERVICES **)PeiServices, C= apsuleBuffer, CapsuleBufferLength);=0D }=0D + } else {=0D + // TODO: Must BuildResourceDescriptorHob()?=0D + Status =3D GetS3MemoryInfo (&PeiMemSize, &PeiMemBase);=0D + ASSERT_EFI_ERROR (Status);=0D =0D + DEBUG ((DEBUG_INFO, "S3 resume PeiMemBase : 0x%08x\n", PeiMemBa= se));=0D + DEBUG ((DEBUG_INFO, "S3 resume PeiMemSize : 0x%08x\n", PeiMemSi= ze));=0D +=0D + //=0D + // Install efi memory=0D + //=0D + Status =3D PeiServicesInstallPeiMemory (=0D + PeiMemBase,=0D + PeiMemSize=0D + );=0D + ASSERT_EFI_ERROR (Status);=0D + }=0D =0D //=0D // Create a memory allocation HOB at fixed location for MP Services PPI = AP wait loop.=0D diff --git a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapper= HobProcessLib/PeiFspWrapperHobProcessLib.inf b/Platform/Intel/MinPlatformPk= g/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.= inf index b846e7af1d2d..e2aac36bf018 100644 --- a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProc= essLib/PeiFspWrapperHobProcessLib.inf +++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProc= essLib/PeiFspWrapperHobProcessLib.inf @@ -75,7 +75,9 @@ gZeroGuid=0D gEfiGraphicsInfoHobGuid=0D gEfiGraphicsDeviceInfoHobGuid=0D + gEfiAcpiVariableGuid=0D =0D [Ppis]=0D gEfiPeiCapsulePpiGuid ## CONSUMES=0D + gEfiPeiReadOnlyVariable2PpiGuid ## CONSUMES=0D gEdkiiSiliconInitializedPpiGuid ## PRODUCES=0D diff --git a/Platform/Intel/MinPlatformPkg/Include/AcpiS3MemoryNvData.h b/P= latform/Intel/MinPlatformPkg/Include/AcpiS3MemoryNvData.h new file mode 100644 index 000000000000..0d75af8e9a03 --- /dev/null +++ b/Platform/Intel/MinPlatformPkg/Include/AcpiS3MemoryNvData.h @@ -0,0 +1,22 @@ +/** @file + Header file for NV data structure definition. + +Copyright (c) 2021, Baruch Binyamin Doron +SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef __ACPI_S3_MEMORY_NV_DATA_H__ +#define __ACPI_S3_MEMORY_NV_DATA_H__ + +// +// NV data structure +// +typedef struct { + UINT64 S3PeiMemBase; + UINT64 S3PeiMemSize; +} ACPI_S3_MEMORY; + +#define ACPI_S3_MEMORY_NV_NAME L"S3MemoryInfo" + +#endif diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc b= /Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc index 08e50cac075f..0eb0cc8306ee 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc +++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiInclude.dsc @@ -41,3 +41,7 @@ NULL|SecurityPkg/Library/HashInstanceLibSha256/HashInstanceLibSha256= .inf=0D }=0D !endif=0D +=0D +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE && gS3Fe= aturePkgTokenSpaceGuid.PcdS3FeatureEnable =3D=3D TRUE=0D + MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerf= ormancePei.inf=0D +!endif=0D diff --git a/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePostMemoryInclud= e.fdf b/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePostMemoryInclude.fdf index 3c2716d6728a..d8fb6683f7d4 100644 --- a/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePostMemoryInclude.fdf +++ b/Platform/Intel/MinPlatformPkg/Include/Fdf/CorePostMemoryInclude.fdf @@ -6,3 +6,7 @@ # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D ##=0D +=0D +!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly =3D=3D FALSE && gS3Fe= aturePkgTokenSpaceGuid.PcdS3FeatureEnable =3D=3D TRUE=0D + INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/Firmwar= ePerformancePei.inf=0D +!endif=0D --=20 2.36.1