From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web11.23793.1658948427427267678 for ; Wed, 27 Jul 2022 12:00:27 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=ltakWYTV; spf=pass (domain: intel.com, ip: 192.55.52.88, mailfrom: ankit.sinha@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1658948427; x=1690484427; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=9vOa8Vfb5CB8YrGVOlSOXh2erENK2JN9xLql0tD/JqA=; b=ltakWYTVy2TmJRwlKVVsNwBL1W/SkDPrdedW7Wko5DPdRcZqOucbTiGw F7gSeOA/McsAPcGwW8eqTrRZ2QyT1v1E0SNiz7FxPefc+sp/TJOHZVW7n Ln32Fqto9KteTKU4Gp2mu/pWX4PIU2bHnfY978htg/WpLSHHl5CjzxRdh T6ri/dp4PkoYQrQgBxUBdHLtbiWlCwUSgdH6WkzLa3zW5REiXGBLDDMcW f3+sBzsKzk+gQJ9A5hCtj/MGu3Fp5N3YTKEQ7MHLhOQnpIeTygJWX19Ym pUXjTJJmBJP3ESTaN44+u/MmAqseoLgjZ9d+8GAhHx2uzyWhNFX4UHsZ9 g==; X-IronPort-AV: E=McAfee;i="6400,9594,10421"; a="314104331" X-IronPort-AV: E=Sophos;i="5.93,196,1654585200"; d="scan'208";a="314104331" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jul 2022 12:00:27 -0700 X-IronPort-AV: E=Sophos;i="5.93,196,1654585200"; d="scan'208";a="576111963" Received: from ankitsin-mobl4.amr.corp.intel.com ([10.209.124.186]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jul 2022 12:00:26 -0700 From: "Sinha, Ankit" To: devel@edk2.groups.io Cc: Nate DeSimone , Isaac Oram , Eric Dong Subject: [edk2-devel][edk2-platforms][PATCH V1 1/1] Add second, third and fourth thread mapping in MADT Date: Wed, 27 Jul 2022 12:00:19 -0700 Message-Id: <20220727190019.931-1-ankit.sinha@intel.com> X-Mailer: git-send-email 2.27.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Cc: Nate DeSimone Cc: Isaac Oram Cc: Eric Dong Signed-off-by: Ankit Sinha --- Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c index c7e87cbd7d9d..524f9914b0b1 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/AcpiPlatform.c @@ -261,7 +261,7 @@ SortCpuLocalApicInTable ( } // - // 3. Sort and map the second threads to the middle of the CpuApicIdOrderTable + // 3. Sort and map the second, third and fourth threads to the middle of the CpuApicIdOrderTable // for (Index = 0; Index < mNumberOfCpus; Index++) { if ((TempCpuApicIdOrderTable[Index].Thread) == 1) { //second thread @@ -270,6 +270,20 @@ SortCpuLocalApicInTable ( } } + for (Index = 0; Index < mNumberOfCpus; Index++) { + if ((TempCpuApicIdOrderTable[Index].Thread) == 2) { // third thread + CopyMem (&mCpuApicIdOrderTable[CurrProcessor], &TempCpuApicIdOrderTable[Index], sizeof (EFI_CPU_ID_ORDER_MAP)); + CurrProcessor++; + } + } + + for (Index = 0; Index < mNumberOfCpus; Index++) { + if ((TempCpuApicIdOrderTable[Index].Thread) == 3) { // fourth thread + CopyMem (&mCpuApicIdOrderTable[CurrProcessor], &TempCpuApicIdOrderTable[Index], sizeof (EFI_CPU_ID_ORDER_MAP)); + CurrProcessor++; + } + } + // // 4. Sort and map the not enabled threads to the bottom of the CpuApicIdOrderTable // -- 2.27.0.windows.1