From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mx.groups.io with SMTP id smtpd.web09.1465.1659658812988341838 for ; Thu, 04 Aug 2022 17:20:15 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=mqURShOi; spf=pass (domain: intel.com, ip: 192.55.52.93, mailfrom: chasel.chiu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1659658815; x=1691194815; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lZb0lnABtATkiwvs+SVKBFl1x0yFOP2s7nB5NBjDsAs=; b=mqURShOi5+Yvr0Gwehf0TMIlDYqyQQY1+V96wZ7BvTDK56aM804JVWKx z54FIVKHzSJTQ66tFyU0vCRneWlI47koUaSH/w51qF5LaAy+83YWeCRAC qMVEpsrg45yVu2glPDmPZ3AcLjBRk6O3HNlxf5XMTBScFiQ1SPQFcYMAa GBfMr8+ZyOqqDfw2MANH++trxikqW+Q5/xWtrcl5MXVfi2dmlavIYSM0w 0J+whQtKRe/HKmuOU1vCtjiiQ1Q+GVNI5aAJLIrYGGc0GOxAJIglhV506 4Hs4mZtWEcMSAqTey2M8CaPfbHhaSEXJJg9LgJ8WT/624VJf0RFSlutLB w==; X-IronPort-AV: E=McAfee;i="6400,9594,10429"; a="287647676" X-IronPort-AV: E=Sophos;i="5.93,216,1654585200"; d="scan'208";a="287647676" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2022 17:20:14 -0700 X-IronPort-AV: E=Sophos;i="5.93,216,1654585200"; d="scan'208";a="671497596" Received: from jwiegert-mobl1.amr.corp.intel.com (HELO cchiu4-mobl.gar.corp.intel.com) ([10.212.235.240]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2022 17:20:10 -0700 From: "Chiu, Chasel" To: devel@edk2.groups.io Cc: Chasel Chiu , Nate DeSimone , Star Zeng Subject: [PATCH 2/4] IntelFsp2WrapperPkg: Add FSP 2.4 MultiPhase interface. Date: Thu, 4 Aug 2022 17:19:49 -0700 Message-Id: <20220805001951.3687-3-chasel.chiu@intel.com> X-Mailer: git-send-email 2.35.0.windows.1 In-Reply-To: <20220805001951.3687-1-chasel.chiu@intel.com> References: <20220805001951.3687-1-chasel.chiu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3916 Provide FSP 2.4 MultiPhase wrapper support library. Cc: Nate DeSimone Cc: Star Zeng Signed-off-by: Chasel Chiu --- IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrapperMu= ltiPhaseProcessLib.c | 337 ++++++++++++++++++++++++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++= ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h = | 38 ++++++++++++++++++++++++++++++++++++++ IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec = | 6 +++++- IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc = | 4 +++- IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/FspWrapperMulti= PhaseProcessLib.inf | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 430 insertions(+), 2 deletions(-) diff --git a/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/Pei= FspWrapperMultiPhaseProcessLib.c b/IntelFsp2WrapperPkg/Library/FspWrapperMu= ltiPhaseProcessLib/PeiFspWrapperMultiPhaseProcessLib.c new file mode 100644 index 0000000000..25fac73bac --- /dev/null +++ b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/PeiFspWrap= perMultiPhaseProcessLib.c @@ -0,0 +1,337 @@ +/** @file=0D + Support FSP MultiPhase process.=0D +=0D + Copyright (c) 2022, Intel Corporation. All rights reserved.
=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D +=0D +/**=0D + Execute 32-bit FSP API entry code.=0D +=0D + @param[in] Function The 32bit code entry to be executed.=0D + @param[in] Param1 The first parameter to pass to 32bit code.=0D + @param[in] Param2 The second parameter to pass to 32bit code.=0D +=0D + @return EFI_STATUS.=0D +**/=0D +EFI_STATUS=0D +Execute32BitCode (=0D + IN UINT64 Function,=0D + IN UINT64 Param1,=0D + IN UINT64 Param2=0D + );=0D +=0D +/**=0D + Execute 64-bit FSP API entry code.=0D +=0D + @param[in] Function The 64bit code entry to be executed.=0D + @param[in] Param1 The first parameter to pass to 64bit code.=0D + @param[in] Param2 The second parameter to pass to 64bit code.=0D +=0D + @return EFI_STATUS.=0D +**/=0D +EFI_STATUS=0D +Execute64BitCode (=0D + IN UINT64 Function,=0D + IN UINT64 Param1,=0D + IN UINT64 Param2=0D + );=0D +=0D +/**=0D + Call FspsMultiPhase API.=0D +=0D + @param[in] FspsMultiPhaseParams - Parameters for MultiPhase API.=0D +=0D + @return EFI_UNSUPPORTED - the requested FspsMultiPhase API is not suppo= rted.=0D + @return EFI_DEVICE_ERROR - the FSP header was not found.=0D + @return EFI status returned by FspsMultiPhase API.=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +CallFspMultiPhaseEntry (=0D + IN VOID *FspMultiPhaseParams,=0D + IN OUT VOID **FspHobListPtr,=0D + IN UINT8 ComponentIndex=0D + )=0D +{=0D + FSP_INFO_HEADER *FspHeader;=0D + //=0D + // FSP_MULTI_PHASE_INIT and FSP_MULTI_PHASE_SI_INIT API functions having= same prototype.=0D + //=0D + UINTN FspMultiPhaseApiEntry;=0D + UINTN FspMultiPhaseApiOffset;=0D + EFI_STATUS Status;=0D + BOOLEAN InterruptState;=0D +=0D + if (ComponentIndex =3D=3D FspMultiPhaseMemInitApiIndex) {=0D + FspHeader =3D (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBa= seAddress));=0D + if (FspHeader =3D=3D NULL) {=0D + return EFI_DEVICE_ERROR;=0D + }=0D +=0D + FspMultiPhaseApiOffset =3D FspHeader->FspMultiPhaseMemInitEntryOffset;= =0D + } else if (ComponentIndex =3D=3D FspMultiPhaseSiInitApiIndex) {=0D + FspHeader =3D (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspsBa= seAddress));=0D + if (FspHeader =3D=3D NULL) {=0D + return EFI_DEVICE_ERROR;=0D + }=0D +=0D + FspMultiPhaseApiOffset =3D FspHeader->FspMultiPhaseSiInitEntryOffset;= =0D + }=0D +=0D + if (FspMultiPhaseApiOffset =3D=3D 0) {=0D + return EFI_UNSUPPORTED;=0D + }=0D +=0D + FspMultiPhaseApiEntry =3D FspHeader->ImageBase + FspMultiPhaseApiOffset;= =0D + InterruptState =3D SaveAndDisableInterrupts ();=0D + if ((FspHeader->ImageAttribute & BIT2) =3D=3D 0) {=0D + // BIT2: IMAGE_ATTRIBUTE_64BIT_MODE_SUPPORT=0D + Status =3D Execute32BitCode ((UINTN)FspMultiPhaseApiEntry, (UINTN)FspM= ultiPhaseParams, (UINTN)NULL);=0D + } else {=0D + Status =3D Execute64BitCode ((UINTN)FspMultiPhaseApiEntry, (UINTN)FspM= ultiPhaseParams, (UINTN)NULL);=0D + }=0D +=0D + SetInterruptState (InterruptState);=0D +=0D + DEBUG ((DEBUG_ERROR, "CallFspMultiPhaseEntry return Status %r \n", Statu= s));=0D +=0D + return Status;=0D +}=0D +=0D +/**=0D + FSP Wrapper Variable Request Handler=0D +=0D + @retval EFI_UNSUPPORTED FSP Wrapper cannot support the specific variab= le request=0D + @retval EFI_STATUS Return FSP returned status=0D +=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +FspWrapperVariableRequestHandler (=0D + IN OUT VOID **FspHobListPtr,=0D + IN UINT8 ComponentIndex=0D + )=0D +{=0D + EFI_STATUS Status;=0D + FSP_MULTI_PHASE_PARAMS FspMultiPhaseParams;=0D + FSP_MULTI_PHASE_VARIABLE_REQUEST_INFO_PARAMS *FspVariableRequestPar= ams;=0D + EFI_PEI_READ_ONLY_VARIABLE2_PPI *ReadOnlyVariablePpi;= =0D + EDKII_PEI_VARIABLE_PPI *VariablePpi;=0D + BOOLEAN WriteVariableSupport;= =0D + FSP_MULTI_PHASE_COMPLETE_VARIABLE_REQUEST_PARAMS CompleteVariableReques= tParams;=0D +=0D + WriteVariableSupport =3D TRUE;=0D + Status =3D PeiServicesLocatePpi (=0D + &gEdkiiPeiVariablePpiGuid,=0D + 0,=0D + NULL,=0D + (VOID **)&VariablePpi=0D + );=0D + if (EFI_ERROR (Status)) {=0D + WriteVariableSupport =3D FALSE;=0D + Status =3D PeiServicesLocatePpi (=0D + &gEfiPeiReadOnlyVariable2PpiGuid,=0D + 0,=0D + NULL,=0D + (VOID **)&ReadOnlyVariablePpi=0D + );=0D + ASSERT_EFI_ERROR (Status);=0D + if (EFI_ERROR (Status)) {=0D + return EFI_UNSUPPORTED;=0D + }=0D + }=0D +=0D + Status =3D FSP_STATUS_VARIABLE_REQUEST;=0D + while (Status =3D=3D FSP_STATUS_VARIABLE_REQUEST) {=0D + //=0D + // Firstly querry variable request informaiton from FSP.=0D + //=0D + FspMultiPhaseParams.MultiPhaseAction =3D EnumMultiPhaseGetVariableRequ= estInfo;=0D + FspMultiPhaseParams.PhaseIndex =3D 0;=0D + Status =3D CallFspMultiPhaseEntry (&FspM= ultiPhaseParams, FspHobListPtr, ComponentIndex);=0D + ASSERT_EFI_ERROR (Status);=0D + //=0D + // FSP should output this pointer for variable request information.=0D + //=0D + FspVariableRequestParams =3D (FSP_MULTI_PHASE_VARIABLE_REQUEST_INFO_PA= RAMS *)FspMultiPhaseParams.MultiPhaseParamPtr;=0D + switch (FspVariableRequestParams->VariableRequest) {=0D + case EnumFspVariableRequestGetVariable:=0D + if (WriteVariableSupport) {=0D + Status =3D VariablePpi->GetVariable (=0D + VariablePpi,=0D + FspVariableRequestParams->VariableName,= =0D + FspVariableRequestParams->VariableGuid,= =0D + FspVariableRequestParams->Attributes,=0D + (UINTN *)FspVariableRequestParams->DataS= ize,=0D + FspVariableRequestParams->Data=0D + );=0D + } else {=0D + Status =3D ReadOnlyVariablePpi->GetVariable (=0D + ReadOnlyVariablePpi,=0D + FspVariableRequestParams->Variab= leName,=0D + FspVariableRequestParams->Variab= leGuid,=0D + FspVariableRequestParams->Attrib= utes,=0D + (UINTN *)FspVariableRequestParam= s->DataSize,=0D + FspVariableRequestParams->Data=0D + );=0D + }=0D +=0D + CompleteVariableRequestParams.VariableRequestStatus =3D Status;=0D + FspMultiPhaseParams.MultiPhaseParamPtr =3D (VOID *)&C= ompleteVariableRequestParams;=0D + FspMultiPhaseParams.MultiPhaseAction =3D EnumMultiP= haseCompleteVariableRequest;=0D + Status =3D CallFspMul= tiPhaseEntry (&FspMultiPhaseParams, FspHobListPtr, ComponentIndex);=0D + break;=0D +=0D + case EnumFspVariableRequestSetVariable:=0D + if (WriteVariableSupport) {=0D + Status =3D VariablePpi->SetVariable (=0D + VariablePpi,=0D + FspVariableRequestParams->VariableName,= =0D + FspVariableRequestParams->VariableGuid,= =0D + *FspVariableRequestParams->Attributes,=0D + (UINTN)*FspVariableRequestParams->DataSi= ze,=0D + FspVariableRequestParams->Data=0D + );=0D + } else {=0D + return EFI_UNSUPPORTED;=0D + }=0D +=0D + CompleteVariableRequestParams.VariableRequestStatus =3D Status;=0D + FspMultiPhaseParams.MultiPhaseParamPtr =3D (VOID *)&C= ompleteVariableRequestParams;=0D + FspMultiPhaseParams.MultiPhaseAction =3D EnumMultiP= haseCompleteVariableRequest;=0D + Status =3D CallFspMul= tiPhaseEntry (&FspMultiPhaseParams, FspHobListPtr, ComponentIndex);=0D + break;=0D +=0D + case EnumFspVariableRequestGetNextVariableName:=0D + if (WriteVariableSupport) {=0D + Status =3D VariablePpi->GetNextVariableName (=0D + VariablePpi,=0D + (UINTN *)FspVariableRequestParams->Varia= bleNameSize,=0D + FspVariableRequestParams->VariableName,= =0D + FspVariableRequestParams->VariableGuid=0D + );=0D + } else {=0D + Status =3D ReadOnlyVariablePpi->NextVariableName (=0D + ReadOnlyVariablePpi,=0D + (UINTN *)FspVariableRequestParam= s->VariableNameSize,=0D + FspVariableRequestParams->Variab= leName,=0D + FspVariableRequestParams->Variab= leGuid=0D + );=0D + }=0D +=0D + CompleteVariableRequestParams.VariableRequestStatus =3D Status;=0D + FspMultiPhaseParams.MultiPhaseParamPtr =3D (VOID *)&C= ompleteVariableRequestParams;=0D + FspMultiPhaseParams.MultiPhaseAction =3D EnumMultiP= haseCompleteVariableRequest;=0D + Status =3D CallFspMul= tiPhaseEntry (&FspMultiPhaseParams, FspHobListPtr, ComponentIndex);=0D + break;=0D +=0D + case EnumFspVariableRequestQueryVariableInfo:=0D + if (WriteVariableSupport) {=0D + Status =3D VariablePpi->QueryVariableInfo (=0D + VariablePpi,=0D + *FspVariableRequestParams->Attributes,=0D + FspVariableRequestParams->MaximumVariabl= eStorageSize,=0D + FspVariableRequestParams->RemainingVaria= bleStorageSize,=0D + FspVariableRequestParams->MaximumVariabl= eSize=0D + );=0D + } else {=0D + return EFI_UNSUPPORTED;=0D + }=0D +=0D + CompleteVariableRequestParams.VariableRequestStatus =3D Status;=0D + FspMultiPhaseParams.MultiPhaseParamPtr =3D (VOID *)&C= ompleteVariableRequestParams;=0D + FspMultiPhaseParams.MultiPhaseAction =3D EnumMultiP= haseCompleteVariableRequest;=0D + Status =3D CallFspMul= tiPhaseEntry (&FspMultiPhaseParams, FspHobListPtr, ComponentIndex);=0D + break;=0D +=0D + default:=0D + DEBUG ((DEBUG_ERROR, "Unknown VariableRequest type!\n"));=0D + Status =3D EFI_UNSUPPORTED;=0D + break;=0D + }=0D + }=0D +=0D + return Status;=0D +}=0D +=0D +/**=0D + FSP Wrapper MultiPhase Handler=0D +=0D + @retval EFI_STATUS Always return EFI_SUCCESS=0D +=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +FspWrapperMultiPhaseHandler (=0D + IN OUT VOID **FspHobListPtr,=0D + IN UINT8 ComponentIndex=0D + )=0D +{=0D + EFI_STATUS Status;=0D + FSP_MULTI_PHASE_PARAMS FspMultiPhaseParams;=0D + FSP_MULTI_PHASE_GET_NUMBER_OF_PHASES_PARAMS FspMultiPhaseGetNumber;=0D + UINT32 Index;=0D + UINT32 NumOfPhases;=0D +=0D + //=0D + // Firstly querry FSP for how many phases supported.=0D + //=0D + FspMultiPhaseParams.MultiPhaseAction =3D EnumMultiPhaseGetNumberOfPhas= es;=0D + FspMultiPhaseParams.PhaseIndex =3D 0;=0D + FspMultiPhaseParams.MultiPhaseParamPtr =3D (VOID *)&FspMultiPhaseGetNumb= er;=0D + Status =3D CallFspMultiPhaseEntry (&FspM= ultiPhaseParams, FspHobListPtr, ComponentIndex);=0D + if (Status =3D=3D EFI_UNSUPPORTED) {=0D + //=0D + // MultiPhase API was not supported=0D + //=0D + return Status;=0D + } else {=0D + ASSERT_EFI_ERROR (Status);=0D + }=0D +=0D + NumOfPhases =3D FspMultiPhaseGetNumber.NumberOfPhases;=0D +=0D + for (Index =3D 1; Index <=3D NumOfPhases; Index++) {=0D + DEBUG ((DEBUG_ERROR, "MultiPhase Index/NumOfPhases =3D %d of %d\n", In= dex, NumOfPhases));=0D + //=0D + // Platform handling can be added here to take care specific actions f= or each phase=0D + // before returning control back to FSP.=0D + //=0D + FspMultiPhaseParams.MultiPhaseAction =3D EnumMultiPhaseExecutePhase;= =0D + FspMultiPhaseParams.PhaseIndex =3D Index;=0D + FspMultiPhaseParams.MultiPhaseParamPtr =3D NULL;=0D + Status =3D CallFspMultiPhaseEntry (&Fs= pMultiPhaseParams, FspHobListPtr, ComponentIndex);=0D +=0D + if (Status =3D=3D FSP_STATUS_VARIABLE_REQUEST) {=0D + //=0D + // call to Variable request handler=0D + //=0D + FspWrapperVariableRequestHandler (FspHobListPtr, ComponentIndex);=0D + }=0D +=0D + //=0D + // Reset the system if FSP API returned FSP_STATUS_RESET_REQUIRED stat= us=0D + //=0D + if ((Status >=3D FSP_STATUS_RESET_REQUIRED_COLD) && (Status <=3D FSP_S= TATUS_RESET_REQUIRED_8)) {=0D + DEBUG ((DEBUG_INFO, "FspMultiPhaseApi-0x%x requested reset %r\n", Co= mponentIndex, Status));=0D + CallFspWrapperResetSystem ((UINTN)Status);=0D + }=0D +=0D + ASSERT_EFI_ERROR (Status);=0D + }=0D +=0D + return EFI_SUCCESS;=0D +}=0D diff --git a/IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProces= sLib.h b/IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib= .h new file mode 100644 index 0000000000..9a3b6cf9e3 --- /dev/null +++ b/IntelFsp2WrapperPkg/Include/Library/FspWrapperMultiPhaseProcessLib.h @@ -0,0 +1,38 @@ +/** @file=0D + Provide FSP wrapper MultiPhase handling functions.=0D +=0D + Copyright (c) 2022, Intel Corporation. All rights reserved.
=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#ifndef __FSP_WRAPPER_MULTI_PHASE_PROCESS_LIB_H__=0D +#define __FSP_WRAPPER_MULTI_PHASE_PROCESS_LIB_H__=0D +=0D +/**=0D + It's a reference code for how to handle FSP Variable Request API.=0D +=0D + @retval EFI_STATUS Always return EFI_SUCCESS=0D +=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +FspWrapperVariableRequestHandler (=0D + IN OUT VOID **FspHobListPtr,=0D + IN UINT8 ComponentIndex=0D + );=0D +=0D +/**=0D + It's a reference code for how to handle FSP MultiPhase API.=0D +=0D + @retval EFI_STATUS Always return EFI_SUCCESS=0D +=0D +**/=0D +EFI_STATUS=0D +EFIAPI=0D +FspWrapperMultiPhaseHandler (=0D + IN OUT VOID **FspHobListPtr,=0D + IN UINT8 ComponentIndex=0D + );=0D +=0D +#endif=0D diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec b/IntelFsp2Wrapper= Pkg/IntelFsp2WrapperPkg.dec index c43b0c2267..a002b1d742 100644 --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec @@ -1,7 +1,7 @@ ## @file=0D # Provides drivers and definitions to support fsp in EDKII bios.=0D #=0D -# Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.
=0D +# Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.
=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D ##=0D @@ -28,6 +28,10 @@ =0D ## @libraryclass Provide FSP TPM measurement related function.=0D FspMeasurementLib|Include/Library/FspMeasurementLib.h=0D +=0D + ## @libraryclass Provide MultiPhase handling related functions.=0D + FspWrapperMultiPhaseProcessLib|Include/Library/FspWrapperMultiPhaseProce= ssLib.h=0D +=0D [Guids]=0D #=0D # GUID defined in package=0D diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc b/IntelFsp2Wrapper= Pkg/IntelFsp2WrapperPkg.dsc index 21e089000e..a191185bea 100644 --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dsc @@ -1,7 +1,7 @@ ## @file=0D # Provides drivers and definitions to support fsp in EDKII bios.=0D #=0D -# Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.
=0D +# Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.
=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D ##=0D @@ -48,6 +48,7 @@ FspWrapperApiLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFs= pWrapperApiLib.inf=0D FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiTestLi= bNull/BaseFspWrapperApiTestLibNull.inf=0D FspMeasurementLib|IntelFsp2WrapperPkg/Library/BaseFspMeasurementLib/Base= FspMeasurementLib.inf=0D + FspWrapperMultiPhaseProcessLib|IntelFsp2WrapperPkg/Library/FspWrapperMul= tiPhaseProcessLib/FspWrapperMultiPhaseProcessLib.inf=0D =0D # FSP platform sample=0D FspWrapperPlatformLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatform= LibSample/BaseFspWrapperPlatformLibSample.inf=0D @@ -91,6 +92,7 @@ IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLib.in= f=0D IntelFsp2WrapperPkg/Library/BaseFspWrapperPlatformLibSample/BaseFspWrapp= erPlatformLibSample.inf=0D IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf=0D + IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/FspWrapperMul= tiPhaseProcessLib.inf=0D =0D [PcdsFixedAtBuild.common]=0D gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x1f=0D diff --git a/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/Fsp= WrapperMultiPhaseProcessLib.inf b/IntelFsp2WrapperPkg/Library/FspWrapperMul= tiPhaseProcessLib/FspWrapperMultiPhaseProcessLib.inf new file mode 100644 index 0000000000..6186ec6976 --- /dev/null +++ b/IntelFsp2WrapperPkg/Library/FspWrapperMultiPhaseProcessLib/FspWrapper= MultiPhaseProcessLib.inf @@ -0,0 +1,47 @@ +## @file=0D +# Sec Core for FSP to support MultiPhase (SeparatePhase) SiInitialization= .=0D +#=0D +# Copyright (c) 2022, Intel Corporation. All rights reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +[Defines]=0D + INF_VERSION =3D 0x00010005=0D + BASE_NAME =3D FspWrapperMultiPhaseProcessLib=0D + FILE_GUID =3D 11E657B7-C3D8-405B-94C5-516840E67B75= =0D + MODULE_TYPE =3D PEIM=0D + VERSION_STRING =3D 1.0=0D + LIBRARY_CLASS =3D FspWrapperMultiPhaseProcessLib=0D +=0D +#=0D +# The following information is for reference only and not required by the = build tools.=0D +#=0D +# VALID_ARCHITECTURES =3D IA32=0D +#=0D +=0D +[Sources]=0D + PeiFspWrapperMultiPhaseProcessLib.c=0D +=0D +[Packages]=0D + MdePkg/MdePkg.dec=0D + IntelFsp2Pkg/IntelFsp2Pkg.dec=0D + IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec=0D + MdeModulePkg/MdeModulePkg.dec=0D +=0D +[LibraryClasses]=0D + BaseMemoryLib=0D + DebugLib=0D + BaseLib=0D + PcdLib=0D + FspWrapperPlatformLib=0D + PeiServicesLib=0D +=0D +[Ppis]=0D + gEfiPeiReadOnlyVariable2PpiGuid=0D + gEdkiiPeiVariablePpiGuid=0D +=0D +[Pcd]=0D + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES=0D + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES=0D --=20 2.35.0.windows.1