From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web08.4050.1659681568025593867 for ; Thu, 04 Aug 2022 23:39:28 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=heHtAFg+; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: zhiguang.liu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1659681568; x=1691217568; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=0jbHT/KuDwwHz70uLLwjWJxvJa0f/r8Oz/Y/OFFWyZk=; b=heHtAFg+Y06rBOQH2ZHL4IBYwS8AatMC/YFkLZwA9+jKAQYVArB6cv8j 6UHEiCqDrtF3XI4qi8MUWpyhgu2RoCFJf3DdvLtbENlS7OmC5qUvLJJvh VXepTuUYqjp0mf9+XP7d+eWw22N+XV/ns4hUDzV8YqvY9dggzuvHfHuZ0 qL4LdN2GHkqFrTZux2Ein3gCO5K7rE5mEz7Nf4/LCGlKYat5Xrv8RUdYl mEz/I/4az2JVoTZ8cc/oEcv6pcEjQ+Z1Eeiyely1nprH13lb2cKiIbBtj WU8Rx6neTt8OUIVqhHot/jk5Pq4SX9Yj1tQs9CHc6hr16kejr0VDk/y0j Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10429"; a="273180903" X-IronPort-AV: E=Sophos;i="5.93,216,1654585200"; d="scan'208";a="273180903" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2022 23:39:27 -0700 X-IronPort-AV: E=Sophos;i="5.93,216,1654585200"; d="scan'208";a="554011585" Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2022 23:39:24 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu , Eric Dong , Ray Ni , Rahul Kumar , Leif Lindholm , Dandan Bi , Liming Gao , Jian J Wang , Ard Biesheuvel , Sami Mujawar Subject: [PATCH v2 0/3] Simplify InitializeSeparateExceptionStacks Date: Fri, 5 Aug 2022 14:39:09 +0800 Message-Id: <20220805063912.1347-1-zhiguang.liu@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The patch set is to hide the exception implementation details, so that caller don't need to know anything about IDT when separate stack for it. However, this patch set changes a library API, so I have to change multiple packages inside one patch. Otherwise, I can make sure every single commit can build and boot fine. If anyone has good idea to separate the first big patch, please tell me. Thanks in advance. V2: Add another patch to Simplify the CPU_EXCEPTION_INIT_DATA definition Keep the memory layout picture in CpuExceptionHandlerLib. Fix some code and comment issue accoring to Ray's comment Code can be seen at https://github.com/tianocore/edk2/pull/3124 Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Leif Lindholm Cc: Dandan Bi Cc: Liming Gao Cc: Jian J Wang Cc: Ard Biesheuvel Cc: Sami Mujawar Signed-off-by: Zhiguang Liu Zhiguang Liu (3): UefiCpuPkg: Simplify InitializeSeparateExceptionStacks MdeModulePkg: Move CPU_EXCEPTION_INIT_DATA to UefiCpuPkg UefiCpuPkg: Simplify the struct definition of CPU_EXCEPTION_INIT_DATA .../Library/ArmExceptionLib/ArmExceptionLib.c | 15 +- MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c | 4 +- .../Include/Library/CpuExceptionHandlerLib.h | 82 +-------- .../CpuExceptionHandlerLibNull.c | 15 +- UefiCpuPkg/CpuDxe/CpuMp.c | 157 +++------------- UefiCpuPkg/CpuDxe/CpuMp.h | 10 +- UefiCpuPkg/CpuMpPei/CpuMpPei.c | 173 +++--------------- UefiCpuPkg/CpuMpPei/CpuMpPei.h | 10 +- .../CpuExceptionCommon.h | 57 +++++- .../CpuExceptionHandlerLib/DxeException.c | 112 +++++++++--- .../Ia32/ArchExceptionHandler.c | 71 ++++--- .../CpuExceptionHandlerLib/PeiCpuException.c | 94 +++++++++- .../PeiCpuExceptionHandlerLib.inf | 4 +- .../SecPeiCpuException.c | 15 +- .../CpuExceptionHandlerLib/SmmException.c | 15 +- .../X64/ArchExceptionHandler.c | 67 ++++--- 16 files changed, 416 insertions(+), 485 deletions(-) -- 2.31.1.windows.1