From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web12.6742.1660008368004129018 for ; Mon, 08 Aug 2022 18:26:08 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=WH4zufwU; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: zhiguang.liu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660008368; x=1691544368; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=p4PPQBW01VORnrn5+zX9043Fke+MTY7Ejxqmh2O2sD4=; b=WH4zufwU+GSQIDpb8r1q6KKYh6H/QngE+hrHRetPcMMs42Y6DFs7YjVJ EqKn9ShjFuUwN9EwiqUqvFcNvE/wYQdG0hgEanIs1RJArQGDeLCeRbjPT 5/pYaNxtRYWrPeUu/ZePES0wgUDnx6LTStqmrhXdG36fO5KDN6Y63quDF 8ZjVq3qD/eyW68JdIoW+mGQ6smZBVYSJ9nBY6kghRIE8yx+vve+4AV4rZ WTPW/8LBh4BXluP7Ei8LucWa0FbqsBnlLseZr0SmTzmZYpjKklPG1B53O Y4/D/o8eSRXQIuld2q7vYVvtKtmxxY3+6TKH9QwB/XVs4sKkuPF6WXWVg Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10433"; a="377020582" X-IronPort-AV: E=Sophos;i="5.93,223,1654585200"; d="scan'208";a="377020582" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Aug 2022 18:26:07 -0700 X-IronPort-AV: E=Sophos;i="5.93,223,1654585200"; d="scan'208";a="932291941" Received: from unknown (HELO shwdesfp01.ccr.corp.intel.com) ([10.239.158.151]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Aug 2022 18:26:04 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu , Eric Dong , Ray Ni , Rahul Kumar , Leif Lindholm , Dandan Bi , Liming Gao , Jian J Wang , Ard Biesheuvel , Sami Mujawar Subject: [PATCH v3 0/3] Simplify InitializeSeparateExceptionStacks Date: Tue, 9 Aug 2022 09:25:34 +0800 Message-Id: <20220809012537.1513-1-zhiguang.liu@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The patch set is to hide the exception implementation details, so that caller don't need to know anything about IDT when separate stack for it. However, this patch set changes a library API, so I have to change multiple packages inside one patch. Otherwise, I can make sure every single commit can build and boot fine. If anyone has good idea to separate the first big patch, please tell me. Thanks in advance. V2: Add another patch to Simplify the CPU_EXCEPTION_INIT_DATA definition Keep the memory layout picture in CpuExceptionHandlerLib. Fix some code and comment issue according to Ray's comment V3: Change the code behavior when the needed size is zero: skip instead of assert Fix the bug that treating the TSS as part of GDT Reorder the modification in the patch set. Code can be seen at https://github.com/tianocore/edk2/pull/3124 Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Leif Lindholm Cc: Dandan Bi Cc: Liming Gao Cc: Jian J Wang Cc: Ard Biesheuvel Cc: Sami Mujawar Signed-off-by: Zhiguang Liu Zhiguang Liu (3): UefiCpuPkg: Simplify InitializeSeparateExceptionStacks MdeModulePkg: Move CPU_EXCEPTION_INIT_DATA to UefiCpuPkg UefiCpuPkg: Simplify the struct definition of CPU_EXCEPTION_INIT_DATA .../Library/ArmExceptionLib/ArmExceptionLib.c | 15 +- MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c | 4 +- .../Include/Library/CpuExceptionHandlerLib.h | 82 +------- .../CpuExceptionHandlerLibNull.c | 15 +- UefiCpuPkg/CpuDxe/CpuMp.c | 162 ++++------------ UefiCpuPkg/CpuMpPei/CpuMpPei.c | 176 ++++-------------- .../CpuExceptionCommon.h | 57 +++++- .../CpuExceptionHandlerLib/DxeException.c | 112 ++++++++--- .../Ia32/ArchExceptionHandler.c | 71 ++++--- .../CpuExceptionHandlerLib/PeiCpuException.c | 94 +++++++++- .../PeiCpuExceptionHandlerLib.inf | 4 +- .../SecPeiCpuException.c | 15 +- .../CpuExceptionHandlerLib/SmmException.c | 15 +- .../X64/ArchExceptionHandler.c | 67 ++++--- 14 files changed, 411 insertions(+), 478 deletions(-) -- 2.31.1.windows.1