* [PATCH v3 0/3] Simplify InitializeSeparateExceptionStacks
@ 2022-08-09 1:25 Zhiguang Liu
2022-08-09 1:25 ` [PATCH v3 1/3] UefiCpuPkg: " Zhiguang Liu
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Zhiguang Liu @ 2022-08-09 1:25 UTC (permalink / raw)
To: devel
Cc: Zhiguang Liu, Eric Dong, Ray Ni, Rahul Kumar, Leif Lindholm,
Dandan Bi, Liming Gao, Jian J Wang, Ard Biesheuvel, Sami Mujawar
The patch set is to hide the exception implementation details,
so that caller don't need to know anything about IDT when separate stack
for it. However, this patch set changes a library API, so I have to
change multiple packages inside one patch. Otherwise, I can make sure
every single commit can build and boot fine. If anyone has good idea to
separate the first big patch, please tell me. Thanks in advance.
V2:
Add another patch to Simplify the CPU_EXCEPTION_INIT_DATA definition
Keep the memory layout picture in CpuExceptionHandlerLib.
Fix some code and comment issue according to Ray's comment
V3:
Change the code behavior when the needed size is zero: skip instead of assert
Fix the bug that treating the TSS as part of GDT
Reorder the modification in the patch set.
Code can be seen at https://github.com/tianocore/edk2/pull/3124
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
Zhiguang Liu (3):
UefiCpuPkg: Simplify InitializeSeparateExceptionStacks
MdeModulePkg: Move CPU_EXCEPTION_INIT_DATA to UefiCpuPkg
UefiCpuPkg: Simplify the struct definition of CPU_EXCEPTION_INIT_DATA
.../Library/ArmExceptionLib/ArmExceptionLib.c | 15 +-
MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c | 4 +-
.../Include/Library/CpuExceptionHandlerLib.h | 82 +-------
.../CpuExceptionHandlerLibNull.c | 15 +-
UefiCpuPkg/CpuDxe/CpuMp.c | 162 ++++------------
UefiCpuPkg/CpuMpPei/CpuMpPei.c | 176 ++++--------------
.../CpuExceptionCommon.h | 57 +++++-
.../CpuExceptionHandlerLib/DxeException.c | 112 ++++++++---
.../Ia32/ArchExceptionHandler.c | 71 ++++---
.../CpuExceptionHandlerLib/PeiCpuException.c | 94 +++++++++-
.../PeiCpuExceptionHandlerLib.inf | 4 +-
.../SecPeiCpuException.c | 15 +-
.../CpuExceptionHandlerLib/SmmException.c | 15 +-
.../X64/ArchExceptionHandler.c | 67 ++++---
14 files changed, 411 insertions(+), 478 deletions(-)
--
2.31.1.windows.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v3 1/3] UefiCpuPkg: Simplify InitializeSeparateExceptionStacks
2022-08-09 1:25 [PATCH v3 0/3] Simplify InitializeSeparateExceptionStacks Zhiguang Liu
@ 2022-08-09 1:25 ` Zhiguang Liu
2022-08-09 1:25 ` [PATCH v3 2/3] MdeModulePkg: Move CPU_EXCEPTION_INIT_DATA to UefiCpuPkg Zhiguang Liu
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Zhiguang Liu @ 2022-08-09 1:25 UTC (permalink / raw)
To: devel
Cc: Zhiguang Liu, Eric Dong, Ray Ni, Rahul Kumar, Leif Lindholm,
Dandan Bi, Liming Gao, Jian J Wang, Ard Biesheuvel, Sami Mujawar
Hide the Exception implementation details in CpuExcetionHandlerLib and
caller only need to provide buffer
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
---
.../Library/ArmExceptionLib/ArmExceptionLib.c | 15 +-
MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c | 4 +-
.../Include/Library/CpuExceptionHandlerLib.h | 15 +-
.../CpuExceptionHandlerLibNull.c | 15 +-
UefiCpuPkg/CpuDxe/CpuMp.c | 162 ++++------------
UefiCpuPkg/CpuMpPei/CpuMpPei.c | 176 ++++--------------
.../CpuExceptionHandlerLib/DxeException.c | 113 ++++++++---
.../CpuExceptionHandlerLib/PeiCpuException.c | 95 +++++++++-
.../PeiCpuExceptionHandlerLib.inf | 4 +-
.../SecPeiCpuException.c | 15 +-
.../CpuExceptionHandlerLib/SmmException.c | 15 +-
11 files changed, 289 insertions(+), 340 deletions(-)
diff --git a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
index 2c7bc66aa7..a521c33f32 100644
--- a/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
+++ b/ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
@@ -288,20 +288,23 @@ CommonCExceptionHandler (
/**
Setup separate stacks for certain exception handlers.
+ If the input Buffer and BufferSize are both NULL, use global variable if possible.
- InitData is optional and processor arch dependent.
-
- @param[in] InitData Pointer to data optional for information about how
- to assign stacks for certain exception handlers.
+ @param[in] Buffer Point to buffer used to separate exception stack.
+ @param[in, out] BufferSize On input, it indicates the byte size of Buffer.
+ If the size is not enough, the return status will
+ be EFI_BUFFER_TOO_SMALL, and output BufferSize
+ will be the size it needs.
@retval EFI_SUCCESS The stacks are assigned successfully.
@retval EFI_UNSUPPORTED This function is not supported.
-
+ @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small.
**/
EFI_STATUS
EFIAPI
InitializeSeparateExceptionStacks (
- IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL
+ IN VOID *Buffer,
+ IN OUT UINTN *BufferSize
)
{
return EFI_SUCCESS;
diff --git a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
index 0a1f3d79e2..5733f0c8ec 100644
--- a/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
+++ b/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c
@@ -1,7 +1,7 @@
/** @file
DXE Core Main Entry Point
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -260,7 +260,7 @@ DxeMain (
// Setup Stack Guard
//
if (PcdGetBool (PcdCpuStackGuard)) {
- Status = InitializeSeparateExceptionStacks (NULL);
+ Status = InitializeSeparateExceptionStacks (NULL, NULL);
ASSERT_EFI_ERROR (Status);
}
diff --git a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h
index 9a495081f7..8d44ed916a 100644
--- a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h
+++ b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h
@@ -104,20 +104,23 @@ InitializeCpuExceptionHandlers (
/**
Setup separate stacks for certain exception handlers.
+ If the input Buffer and BufferSize are both NULL, use global variable if possible.
- InitData is optional and processor arch dependent.
-
- @param[in] InitData Pointer to data optional for information about how
- to assign stacks for certain exception handlers.
+ @param[in] Buffer Point to buffer used to separate exception stack.
+ @param[in, out] BufferSize On input, it indicates the byte size of Buffer.
+ If the size is not enough, the return status will
+ be EFI_BUFFER_TOO_SMALL, and output BufferSize
+ will be the size it needs.
@retval EFI_SUCCESS The stacks are assigned successfully.
@retval EFI_UNSUPPORTED This function is not supported.
-
+ @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small.
**/
EFI_STATUS
EFIAPI
InitializeSeparateExceptionStacks (
- IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL
+ IN VOID *Buffer,
+ IN OUT UINTN *BufferSize
);
/**
diff --git a/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.c b/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.c
index 8aeedcb4d1..74908a379b 100644
--- a/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.c
+++ b/MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.c
@@ -83,20 +83,23 @@ DumpCpuContext (
/**
Setup separate stacks for certain exception handlers.
+ If the input Buffer and BufferSize are both NULL, use global variable if possible.
- InitData is optional and processor arch dependent.
-
- @param[in] InitData Pointer to data optional for information about how
- to assign stacks for certain exception handlers.
+ @param[in] Buffer Point to buffer used to separate exception stack.
+ @param[in, out] BufferSize On input, it indicates the byte size of Buffer.
+ If the size is not enough, the return status will
+ be EFI_BUFFER_TOO_SMALL, and output BufferSize
+ will be the size it needs.
@retval EFI_SUCCESS The stacks are assigned successfully.
@retval EFI_UNSUPPORTED This function is not supported.
-
+ @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small.
**/
EFI_STATUS
EFIAPI
InitializeSeparateExceptionStacks (
- IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL
+ IN VOID *Buffer,
+ IN OUT UINTN *BufferSize
)
{
return EFI_UNSUPPORTED;
diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c b/UefiCpuPkg/CpuDxe/CpuMp.c
index e385f585c7..f3ca813d2a 100644
--- a/UefiCpuPkg/CpuDxe/CpuMp.c
+++ b/UefiCpuPkg/CpuDxe/CpuMp.c
@@ -596,23 +596,13 @@ CollectBistDataFromHob (
}
}
-/**
- Get GDT register value.
-
- This function is mainly for AP purpose because AP may have different GDT
- table than BSP.
-
- @param[in,out] Buffer The pointer to private data buffer.
-
-**/
-VOID
-EFIAPI
-GetGdtr (
- IN OUT VOID *Buffer
- )
-{
- AsmReadGdtr ((IA32_DESCRIPTOR *)Buffer);
-}
+//
+// Structure for InitializeSeparateExceptionStacks
+//
+typedef struct {
+ VOID *Buffer;
+ UINTN *BufferSize;
+} EXCEPTION_STACK_SWITCH_CONTEXT;
/**
Initializes CPU exceptions handlers for the sake of stack switch requirement.
@@ -629,27 +619,17 @@ InitializeExceptionStackSwitchHandlers (
IN OUT VOID *Buffer
)
{
- CPU_EXCEPTION_INIT_DATA *EssData;
- IA32_DESCRIPTOR Idtr;
- EFI_STATUS Status;
+ EXCEPTION_STACK_SWITCH_CONTEXT *SwitchStackData;
- EssData = Buffer;
- //
- // We don't plan to replace IDT table with a new one, but we should not assume
- // the AP's IDT is the same as BSP's IDT either.
- //
- AsmReadIdtr (&Idtr);
- EssData->Ia32.IdtTable = (VOID *)Idtr.Base;
- EssData->Ia32.IdtTableSize = Idtr.Limit + 1;
- Status = InitializeSeparateExceptionStacks (EssData);
- ASSERT_EFI_ERROR (Status);
+ SwitchStackData = (EXCEPTION_STACK_SWITCH_CONTEXT *)Buffer;
+ InitializeSeparateExceptionStacks (SwitchStackData->Buffer, SwitchStackData->BufferSize);
}
/**
Initializes MP exceptions handlers for the sake of stack switch requirement.
This function will allocate required resources required to setup stack switch
- and pass them through CPU_EXCEPTION_INIT_DATA to each logic processor.
+ and pass them through SwitchStackData to each logic processor.
**/
VOID
@@ -657,129 +637,53 @@ InitializeMpExceptionStackSwitchHandlers (
VOID
)
{
- UINTN Index;
- UINTN Bsp;
- UINTN ExceptionNumber;
- UINTN OldGdtSize;
- UINTN NewGdtSize;
- UINTN NewStackSize;
- IA32_DESCRIPTOR Gdtr;
- CPU_EXCEPTION_INIT_DATA EssData;
- UINT8 *GdtBuffer;
- UINT8 *StackTop;
-
- ExceptionNumber = FixedPcdGetSize (PcdCpuStackSwitchExceptionList);
- NewStackSize = FixedPcdGet32 (PcdCpuKnownGoodStackSize) * ExceptionNumber;
-
- StackTop = AllocateRuntimeZeroPool (NewStackSize * mNumberOfProcessors);
- ASSERT (StackTop != NULL);
- StackTop += NewStackSize * mNumberOfProcessors;
-
- //
- // The default exception handlers must have been initialized. Let's just skip
- // it in this method.
- //
- EssData.Ia32.Revision = CPU_EXCEPTION_INIT_DATA_REV;
- EssData.Ia32.InitDefaultHandlers = FALSE;
-
- EssData.Ia32.StackSwitchExceptions = FixedPcdGetPtr (PcdCpuStackSwitchExceptionList);
- EssData.Ia32.StackSwitchExceptionNumber = ExceptionNumber;
- EssData.Ia32.KnownGoodStackSize = FixedPcdGet32 (PcdCpuKnownGoodStackSize);
+ UINTN Index;
+ UINTN Bsp;
+ EXCEPTION_STACK_SWITCH_CONTEXT SwitchStackData;
+ UINTN BufferSize;
- //
- // Initialize Gdtr to suppress incorrect compiler/analyzer warnings.
- //
- Gdtr.Base = 0;
- Gdtr.Limit = 0;
+ SwitchStackData.BufferSize = &BufferSize;
MpInitLibWhoAmI (&Bsp);
+
for (Index = 0; Index < mNumberOfProcessors; ++Index) {
- //
- // To support stack switch, we need to re-construct GDT but not IDT.
- //
+ SwitchStackData.Buffer = NULL;
+ BufferSize = 0;
+
if (Index == Bsp) {
- GetGdtr (&Gdtr);
+ InitializeExceptionStackSwitchHandlers (&SwitchStackData);
} else {
//
- // AP might have different size of GDT from BSP.
+ // AP might need different buffer size from BSP.
//
- MpInitLibStartupThisAP (GetGdtr, Index, NULL, 0, (VOID *)&Gdtr, NULL);
+ MpInitLibStartupThisAP (InitializeExceptionStackSwitchHandlers, Index, NULL, 0, (VOID *)&SwitchStackData, NULL);
}
- //
- // X64 needs only one TSS of current task working for all exceptions
- // because of its IST feature. IA32 needs one TSS for each exception
- // in addition to current task. Since AP is not supposed to allocate
- // memory, we have to do it in BSP. To simplify the code, we allocate
- // memory for IA32 case to cover both IA32 and X64 exception stack
- // switch.
- //
- // Layout of memory to allocate for each processor:
- // --------------------------------
- // | Alignment | (just in case)
- // --------------------------------
- // | |
- // | Original GDT |
- // | |
- // --------------------------------
- // | Current task descriptor |
- // --------------------------------
- // | |
- // | Exception task descriptors | X ExceptionNumber
- // | |
- // --------------------------------
- // | Current task-state segment |
- // --------------------------------
- // | |
- // | Exception task-state segment | X ExceptionNumber
- // | |
- // --------------------------------
- //
- OldGdtSize = Gdtr.Limit + 1;
- EssData.Ia32.ExceptionTssDescSize = sizeof (IA32_TSS_DESCRIPTOR) *
- (ExceptionNumber + 1);
- EssData.Ia32.ExceptionTssSize = sizeof (IA32_TASK_STATE_SEGMENT) *
- (ExceptionNumber + 1);
- NewGdtSize = sizeof (IA32_TSS_DESCRIPTOR) +
- OldGdtSize +
- EssData.Ia32.ExceptionTssDescSize +
- EssData.Ia32.ExceptionTssSize;
-
- GdtBuffer = AllocateRuntimeZeroPool (NewGdtSize);
- ASSERT (GdtBuffer != NULL);
-
- //
- // Make sure GDT table alignment
- //
- EssData.Ia32.GdtTable = ALIGN_POINTER (GdtBuffer, sizeof (IA32_TSS_DESCRIPTOR));
- NewGdtSize -= ((UINT8 *)EssData.Ia32.GdtTable - GdtBuffer);
- EssData.Ia32.GdtTableSize = NewGdtSize;
-
- EssData.Ia32.ExceptionTssDesc = ((UINT8 *)EssData.Ia32.GdtTable + OldGdtSize);
- EssData.Ia32.ExceptionTss = ((UINT8 *)EssData.Ia32.GdtTable + OldGdtSize +
- EssData.Ia32.ExceptionTssDescSize);
+ if (BufferSize == 0) {
+ continue;
+ }
- EssData.Ia32.KnownGoodStackTop = (UINTN)StackTop;
+ SwitchStackData.Buffer = AllocateRuntimeZeroPool (BufferSize);
+ ASSERT (SwitchStackData.Buffer != NULL);
DEBUG ((
DEBUG_INFO,
- "Exception stack top[cpu%lu]: 0x%lX\n",
+ "Buffer[cpu%lu] for InitializeExceptionStackSwitchHandlers: 0x%lX with size 0x%x\n",
(UINT64)(UINTN)Index,
- (UINT64)(UINTN)StackTop
+ (UINT64)(UINTN)SwitchStackData.Buffer,
+ (UINT32)BufferSize
));
if (Index == Bsp) {
- InitializeExceptionStackSwitchHandlers (&EssData);
+ InitializeExceptionStackSwitchHandlers (&SwitchStackData);
} else {
MpInitLibStartupThisAP (
InitializeExceptionStackSwitchHandlers,
Index,
NULL,
0,
- (VOID *)&EssData,
+ (VOID *)&SwitchStackData,
NULL
);
}
-
- StackTop -= NewStackSize;
}
}
diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.c b/UefiCpuPkg/CpuMpPei/CpuMpPei.c
index d4786979fa..c0be11d3ad 100644
--- a/UefiCpuPkg/CpuMpPei/CpuMpPei.c
+++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.c
@@ -1,7 +1,7 @@
/** @file
CPU PEI Module installs CPU Multiple Processor PPI.
- Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -411,23 +411,13 @@ PeiWhoAmI (
return MpInitLibWhoAmI (ProcessorNumber);
}
-/**
- Get GDT register value.
-
- This function is mainly for AP purpose because AP may have different GDT
- table than BSP.
-
- @param[in,out] Buffer The pointer to private data buffer.
-
-**/
-VOID
-EFIAPI
-GetGdtr (
- IN OUT VOID *Buffer
- )
-{
- AsmReadGdtr ((IA32_DESCRIPTOR *)Buffer);
-}
+//
+// Structure for InitializeSeparateExceptionStacks
+//
+typedef struct {
+ VOID *Buffer;
+ UINTN *BufferSize;
+} EXCEPTION_STACK_SWITCH_CONTEXT;
/**
Initializes CPU exceptions handlers for the sake of stack switch requirement.
@@ -444,27 +434,17 @@ InitializeExceptionStackSwitchHandlers (
IN OUT VOID *Buffer
)
{
- CPU_EXCEPTION_INIT_DATA *EssData;
- IA32_DESCRIPTOR Idtr;
- EFI_STATUS Status;
+ EXCEPTION_STACK_SWITCH_CONTEXT *SwitchStackData;
- EssData = Buffer;
- //
- // We don't plan to replace IDT table with a new one, but we should not assume
- // the AP's IDT is the same as BSP's IDT either.
- //
- AsmReadIdtr (&Idtr);
- EssData->Ia32.IdtTable = (VOID *)Idtr.Base;
- EssData->Ia32.IdtTableSize = Idtr.Limit + 1;
- Status = InitializeSeparateExceptionStacks (EssData);
- ASSERT_EFI_ERROR (Status);
+ SwitchStackData = (EXCEPTION_STACK_SWITCH_CONTEXT *)Buffer;
+ InitializeSeparateExceptionStacks (SwitchStackData->Buffer, SwitchStackData->BufferSize);
}
/**
Initializes MP exceptions handlers for the sake of stack switch requirement.
This function will allocate required resources required to setup stack switch
- and pass them through CPU_EXCEPTION_INIT_DATA to each logic processor.
+ and pass them through SwitchStackData to each logic processor.
**/
VOID
@@ -472,148 +452,60 @@ InitializeMpExceptionStackSwitchHandlers (
VOID
)
{
- EFI_STATUS Status;
- UINTN Index;
- UINTN Bsp;
- UINTN ExceptionNumber;
- UINTN OldGdtSize;
- UINTN NewGdtSize;
- UINTN NewStackSize;
- IA32_DESCRIPTOR Gdtr;
- CPU_EXCEPTION_INIT_DATA EssData;
- UINT8 *GdtBuffer;
- UINT8 *StackTop;
- UINTN NumberOfProcessors;
+ UINTN Index;
+ UINTN Bsp;
+ EXCEPTION_STACK_SWITCH_CONTEXT SwitchStackData;
+ UINTN BufferSize;
+ UINTN NumberOfProcessors;
if (!PcdGetBool (PcdCpuStackGuard)) {
return;
}
+ SwitchStackData.BufferSize = &BufferSize;
MpInitLibGetNumberOfProcessors (&NumberOfProcessors, NULL);
MpInitLibWhoAmI (&Bsp);
- ExceptionNumber = FixedPcdGetSize (PcdCpuStackSwitchExceptionList);
- NewStackSize = FixedPcdGet32 (PcdCpuKnownGoodStackSize) * ExceptionNumber;
-
- StackTop = AllocatePages (EFI_SIZE_TO_PAGES (NewStackSize * NumberOfProcessors));
- ASSERT (StackTop != NULL);
- if (StackTop == NULL) {
- return;
- }
-
- StackTop += NewStackSize * NumberOfProcessors;
-
- //
- // The default exception handlers must have been initialized. Let's just skip
- // it in this method.
- //
- EssData.Ia32.Revision = CPU_EXCEPTION_INIT_DATA_REV;
- EssData.Ia32.InitDefaultHandlers = FALSE;
-
- EssData.Ia32.StackSwitchExceptions = FixedPcdGetPtr (PcdCpuStackSwitchExceptionList);
- EssData.Ia32.StackSwitchExceptionNumber = ExceptionNumber;
- EssData.Ia32.KnownGoodStackSize = FixedPcdGet32 (PcdCpuKnownGoodStackSize);
-
- //
- // Initialize Gdtr to suppress incorrect compiler/analyzer warnings.
- //
- Gdtr.Base = 0;
- Gdtr.Limit = 0;
for (Index = 0; Index < NumberOfProcessors; ++Index) {
- //
- // To support stack switch, we need to re-construct GDT but not IDT.
- //
+ SwitchStackData.Buffer = NULL;
+ BufferSize = 0;
+
if (Index == Bsp) {
- GetGdtr (&Gdtr);
+ InitializeExceptionStackSwitchHandlers (&SwitchStackData);
} else {
//
- // AP might have different size of GDT from BSP.
+ // AP might need different buffer size from BSP.
//
- MpInitLibStartupThisAP (GetGdtr, Index, NULL, 0, (VOID *)&Gdtr, NULL);
+ MpInitLibStartupThisAP (InitializeExceptionStackSwitchHandlers, Index, NULL, 0, (VOID *)&SwitchStackData, NULL);
}
- //
- // X64 needs only one TSS of current task working for all exceptions
- // because of its IST feature. IA32 needs one TSS for each exception
- // in addition to current task. Since AP is not supposed to allocate
- // memory, we have to do it in BSP. To simplify the code, we allocate
- // memory for IA32 case to cover both IA32 and X64 exception stack
- // switch.
- //
- // Layout of memory to allocate for each processor:
- // --------------------------------
- // | Alignment | (just in case)
- // --------------------------------
- // | |
- // | Original GDT |
- // | |
- // --------------------------------
- // | Current task descriptor |
- // --------------------------------
- // | |
- // | Exception task descriptors | X ExceptionNumber
- // | |
- // --------------------------------
- // | Current task-state segment |
- // --------------------------------
- // | |
- // | Exception task-state segment | X ExceptionNumber
- // | |
- // --------------------------------
- //
- OldGdtSize = Gdtr.Limit + 1;
- EssData.Ia32.ExceptionTssDescSize = sizeof (IA32_TSS_DESCRIPTOR) *
- (ExceptionNumber + 1);
- EssData.Ia32.ExceptionTssSize = sizeof (IA32_TASK_STATE_SEGMENT) *
- (ExceptionNumber + 1);
- NewGdtSize = sizeof (IA32_TSS_DESCRIPTOR) +
- OldGdtSize +
- EssData.Ia32.ExceptionTssDescSize +
- EssData.Ia32.ExceptionTssSize;
-
- Status = PeiServicesAllocatePool (
- NewGdtSize,
- (VOID **)&GdtBuffer
- );
- ASSERT (GdtBuffer != NULL);
- if (EFI_ERROR (Status)) {
- ASSERT_EFI_ERROR (Status);
- return;
+ if (BufferSize == 0) {
+ continue;
}
- //
- // Make sure GDT table alignment
- //
- EssData.Ia32.GdtTable = ALIGN_POINTER (GdtBuffer, sizeof (IA32_TSS_DESCRIPTOR));
- NewGdtSize -= ((UINT8 *)EssData.Ia32.GdtTable - GdtBuffer);
- EssData.Ia32.GdtTableSize = NewGdtSize;
-
- EssData.Ia32.ExceptionTssDesc = ((UINT8 *)EssData.Ia32.GdtTable + OldGdtSize);
- EssData.Ia32.ExceptionTss = ((UINT8 *)EssData.Ia32.GdtTable + OldGdtSize +
- EssData.Ia32.ExceptionTssDescSize);
-
- EssData.Ia32.KnownGoodStackTop = (UINTN)StackTop;
+ SwitchStackData.Buffer = AllocatePages (EFI_SIZE_TO_PAGES (BufferSize));
+ ASSERT (SwitchStackData.Buffer != NULL);
+ ZeroMem (SwitchStackData.Buffer, EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (BufferSize)));
DEBUG ((
DEBUG_INFO,
- "Exception stack top[cpu%lu]: 0x%lX\n",
+ "Buffer[cpu%lu] for InitializeExceptionStackSwitchHandlers: 0x%lX with size 0x%x\n",
(UINT64)(UINTN)Index,
- (UINT64)(UINTN)StackTop
+ (UINT64)(UINTN)SwitchStackData.Buffer,
+ (UINT32)BufferSize
));
if (Index == Bsp) {
- InitializeExceptionStackSwitchHandlers (&EssData);
+ InitializeExceptionStackSwitchHandlers (&SwitchStackData);
} else {
MpInitLibStartupThisAP (
InitializeExceptionStackSwitchHandlers,
Index,
NULL,
0,
- (VOID *)&EssData,
+ (VOID *)&SwitchStackData,
NULL
);
}
-
- StackTop -= NewStackSize;
}
}
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c
index e62bb5e6c0..04e8409922 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c
@@ -104,48 +104,105 @@ RegisterCpuInterruptHandler (
/**
Setup separate stacks for certain exception handlers.
+ If the input Buffer and BufferSize are both NULL, use global variable if possible.
- InitData is optional and processor arch dependent.
-
- @param[in] InitData Pointer to data optional for information about how
- to assign stacks for certain exception handlers.
+ @param[in] Buffer Point to buffer used to separate exception stack.
+ @param[in, out] BufferSize On input, it indicates the byte size of Buffer.
+ If the size is not enough, the return status will
+ be EFI_BUFFER_TOO_SMALL, and output BufferSize
+ will be the size it needs.
@retval EFI_SUCCESS The stacks are assigned successfully.
@retval EFI_UNSUPPORTED This function is not supported.
-
+ @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small.
**/
EFI_STATUS
EFIAPI
InitializeSeparateExceptionStacks (
- IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL
+ IN VOID *Buffer,
+ IN OUT UINTN *BufferSize
)
{
CPU_EXCEPTION_INIT_DATA EssData;
IA32_DESCRIPTOR Idtr;
IA32_DESCRIPTOR Gdtr;
-
- if (InitData == NULL) {
+ UINTN NeedBufferSize;
+ UINTN StackTop;
+ UINT8 *NewGdtTable;
+
+ //
+ // X64 needs only one TSS of current task working for all exceptions
+ // because of its IST feature. IA32 needs one TSS for each exception
+ // in addition to current task. To simplify the code, we report the
+ // needed memory for IA32 case to cover both IA32 and X64 exception
+ // stack switch.
+ //
+ // Layout of memory needed for each processor:
+ // --------------------------------
+ // | Alignment | (just in case)
+ // --------------------------------
+ // | |
+ // | Original GDT |
+ // | |
+ // --------------------------------
+ // | Current task descriptor |
+ // --------------------------------
+ // | |
+ // | Exception task descriptors | X ExceptionNumber
+ // | |
+ // --------------------------------
+ // | Current task-state segment |
+ // --------------------------------
+ // | |
+ // | Exception task-state segment | X ExceptionNumber
+ // | |
+ // --------------------------------
+ //
+ AsmReadGdtr (&Gdtr);
+ if ((Buffer == NULL) && (BufferSize == NULL)) {
SetMem (mNewGdt, sizeof (mNewGdt), 0);
-
- AsmReadIdtr (&Idtr);
- AsmReadGdtr (&Gdtr);
-
- EssData.X64.Revision = CPU_EXCEPTION_INIT_DATA_REV;
- EssData.X64.KnownGoodStackTop = (UINTN)mNewStack + sizeof (mNewStack);
- EssData.X64.KnownGoodStackSize = CPU_KNOWN_GOOD_STACK_SIZE;
- EssData.X64.StackSwitchExceptions = CPU_STACK_SWITCH_EXCEPTION_LIST;
- EssData.X64.StackSwitchExceptionNumber = CPU_STACK_SWITCH_EXCEPTION_NUMBER;
- EssData.X64.IdtTable = (VOID *)Idtr.Base;
- EssData.X64.IdtTableSize = Idtr.Limit + 1;
- EssData.X64.GdtTable = mNewGdt;
- EssData.X64.GdtTableSize = sizeof (mNewGdt);
- EssData.X64.ExceptionTssDesc = mNewGdt + Gdtr.Limit + 1;
- EssData.X64.ExceptionTssDescSize = CPU_TSS_DESC_SIZE;
- EssData.X64.ExceptionTss = mNewGdt + Gdtr.Limit + 1 + CPU_TSS_DESC_SIZE;
- EssData.X64.ExceptionTssSize = CPU_TSS_SIZE;
-
- InitData = &EssData;
+ StackTop = (UINTN)mNewStack + sizeof (mNewStack);
+ NewGdtTable = mNewGdt;
+ } else {
+ if (BufferSize == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Total needed size includes stack size, new GDT table size, TSS size.
+ // Add another DESCRIPTOR size for alignment requiremet.
+ //
+ NeedBufferSize = CPU_STACK_SWITCH_EXCEPTION_NUMBER * CPU_KNOWN_GOOD_STACK_SIZE +
+ CPU_TSS_DESC_SIZE + Gdtr.Limit + 1 +
+ CPU_TSS_SIZE +
+ sizeof (IA32_TSS_DESCRIPTOR);
+ if (*BufferSize < NeedBufferSize) {
+ *BufferSize = NeedBufferSize;
+ return EFI_BUFFER_TOO_SMALL;
+ }
+
+ if (Buffer == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ StackTop = (UINTN)Buffer + CPU_STACK_SWITCH_EXCEPTION_NUMBER * CPU_KNOWN_GOOD_STACK_SIZE;
+ NewGdtTable = ALIGN_POINTER (StackTop, sizeof (IA32_TSS_DESCRIPTOR));
}
- return ArchSetupExceptionStack (InitData);
+ AsmReadIdtr (&Idtr);
+ EssData.X64.Revision = CPU_EXCEPTION_INIT_DATA_REV;
+ EssData.X64.KnownGoodStackTop = StackTop;
+ EssData.X64.KnownGoodStackSize = CPU_KNOWN_GOOD_STACK_SIZE;
+ EssData.X64.StackSwitchExceptions = CPU_STACK_SWITCH_EXCEPTION_LIST;
+ EssData.X64.StackSwitchExceptionNumber = CPU_STACK_SWITCH_EXCEPTION_NUMBER;
+ EssData.X64.IdtTable = (VOID *)Idtr.Base;
+ EssData.X64.IdtTableSize = Idtr.Limit + 1;
+ EssData.X64.GdtTable = NewGdtTable;
+ EssData.X64.GdtTableSize = CPU_TSS_DESC_SIZE + Gdtr.Limit + 1;
+ EssData.X64.ExceptionTssDesc = NewGdtTable + Gdtr.Limit + 1;
+ EssData.X64.ExceptionTssDescSize = CPU_TSS_DESC_SIZE;
+ EssData.X64.ExceptionTss = NewGdtTable + Gdtr.Limit + 1 + CPU_TSS_DESC_SIZE;
+ EssData.X64.ExceptionTssSize = CPU_TSS_SIZE;
+
+ return ArchSetupExceptionStack (&EssData);
}
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c
index 494c2ab433..52ec0fb803 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c
@@ -151,25 +151,104 @@ InitializeCpuExceptionHandlers (
/**
Setup separate stacks for certain exception handlers.
+ If the input Buffer and BufferSize are both NULL, use global variable if possible.
- InitData is optional and processor arch dependent.
-
- @param[in] InitData Pointer to data optional for information about how
- to assign stacks for certain exception handlers.
+ @param[in] Buffer Point to buffer used to separate exception stack.
+ @param[in, out] BufferSize On input, it indicates the byte size of Buffer.
+ If the size is not enough, the return status will
+ be EFI_BUFFER_TOO_SMALL, and output BufferSize
+ will be the size it needs.
@retval EFI_SUCCESS The stacks are assigned successfully.
@retval EFI_UNSUPPORTED This function is not supported.
-
+ @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small.
**/
EFI_STATUS
EFIAPI
InitializeSeparateExceptionStacks (
- IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL
+ IN VOID *Buffer,
+ IN OUT UINTN *BufferSize
)
{
- if (InitData == NULL) {
+ CPU_EXCEPTION_INIT_DATA EssData;
+ IA32_DESCRIPTOR Idtr;
+ IA32_DESCRIPTOR Gdtr;
+ UINTN NeedBufferSize;
+ UINTN StackTop;
+ UINT8 *NewGdtTable;
+
+ //
+ // X64 needs only one TSS of current task working for all exceptions
+ // because of its IST feature. IA32 needs one TSS for each exception
+ // in addition to current task. To simplify the code, we report the
+ // needed memory for IA32 case to cover both IA32 and X64 exception
+ // stack switch.
+ //
+ // Layout of memory needed for each processor:
+ // --------------------------------
+ // | Alignment | (just in case)
+ // --------------------------------
+ // | |
+ // | Original GDT |
+ // | |
+ // --------------------------------
+ // | Current task descriptor |
+ // --------------------------------
+ // | |
+ // | Exception task descriptors | X ExceptionNumber
+ // | |
+ // --------------------------------
+ // | Current task-state segment |
+ // --------------------------------
+ // | |
+ // | Exception task-state segment | X ExceptionNumber
+ // | |
+ // --------------------------------
+ //
+
+ if ((Buffer == NULL) && (BufferSize == NULL)) {
return EFI_UNSUPPORTED;
}
- return ArchSetupExceptionStack (InitData);
+ if (BufferSize == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ AsmReadGdtr (&Gdtr);
+ //
+ // Total needed size includes stack size, new GDT table size, TSS size.
+ // Add another DESCRIPTOR size for alignment requiremet.
+ //
+ NeedBufferSize = CPU_STACK_SWITCH_EXCEPTION_NUMBER * CPU_KNOWN_GOOD_STACK_SIZE +
+ CPU_TSS_DESC_SIZE + Gdtr.Limit + 1 +
+ CPU_TSS_SIZE +
+ sizeof (IA32_TSS_DESCRIPTOR);
+ if (*BufferSize < NeedBufferSize) {
+ *BufferSize = NeedBufferSize;
+ return EFI_BUFFER_TOO_SMALL;
+ }
+
+ if (Buffer == NULL) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ StackTop = (UINTN)Buffer + CPU_STACK_SWITCH_EXCEPTION_NUMBER * CPU_KNOWN_GOOD_STACK_SIZE;
+ NewGdtTable = ALIGN_POINTER (StackTop, sizeof (IA32_TSS_DESCRIPTOR));
+
+ AsmReadIdtr (&Idtr);
+ EssData.X64.Revision = CPU_EXCEPTION_INIT_DATA_REV;
+ EssData.X64.KnownGoodStackTop = StackTop;
+ EssData.X64.KnownGoodStackSize = CPU_KNOWN_GOOD_STACK_SIZE;
+ EssData.X64.StackSwitchExceptions = CPU_STACK_SWITCH_EXCEPTION_LIST;
+ EssData.X64.StackSwitchExceptionNumber = CPU_STACK_SWITCH_EXCEPTION_NUMBER;
+ EssData.X64.IdtTable = (VOID *)Idtr.Base;
+ EssData.X64.IdtTableSize = Idtr.Limit + 1;
+ EssData.X64.GdtTable = NewGdtTable;
+ EssData.X64.GdtTableSize = CPU_TSS_DESC_SIZE + Gdtr.Limit + 1;
+ EssData.X64.ExceptionTssDesc = NewGdtTable + Gdtr.Limit + 1;
+ EssData.X64.ExceptionTssDescSize = CPU_TSS_DESC_SIZE;
+ EssData.X64.ExceptionTss = NewGdtTable + Gdtr.Limit + 1 + CPU_TSS_DESC_SIZE;
+ EssData.X64.ExceptionTssSize = CPU_TSS_SIZE;
+
+ return ArchSetupExceptionStack (&EssData);
}
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
index cf5bfe4083..7c2ec3b2db 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
@@ -1,7 +1,7 @@
## @file
# CPU Exception Handler library instance for PEI module.
#
-# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -56,6 +56,8 @@
[Pcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard # CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList
[FeaturePcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## CONSUMES
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c
index 4313cc5582..ad5e0e9ed4 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuException.c
@@ -201,20 +201,23 @@ RegisterCpuInterruptHandler (
/**
Setup separate stacks for certain exception handlers.
+ If the input Buffer and BufferSize are both NULL, use global variable if possible.
- InitData is optional and processor arch dependent.
-
- @param[in] InitData Pointer to data optional for information about how
- to assign stacks for certain exception handlers.
+ @param[in] Buffer Point to buffer used to separate exception stack.
+ @param[in, out] BufferSize On input, it indicates the byte size of Buffer.
+ If the size is not enough, the return status will
+ be EFI_BUFFER_TOO_SMALL, and output BufferSize
+ will be the size it needs.
@retval EFI_SUCCESS The stacks are assigned successfully.
@retval EFI_UNSUPPORTED This function is not supported.
-
+ @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small.
**/
EFI_STATUS
EFIAPI
InitializeSeparateExceptionStacks (
- IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL
+ IN VOID *Buffer,
+ IN OUT UINTN *BufferSize
)
{
return EFI_UNSUPPORTED;
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c
index 1c97dab926..46a86ad2c6 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmException.c
@@ -97,20 +97,23 @@ RegisterCpuInterruptHandler (
/**
Setup separate stacks for certain exception handlers.
+ If the input Buffer and BufferSize are both NULL, use global variable if possible.
- InitData is optional and processor arch dependent.
-
- @param[in] InitData Pointer to data optional for information about how
- to assign stacks for certain exception handlers.
+ @param[in] Buffer Point to buffer used to separate exception stack.
+ @param[in, out] BufferSize On input, it indicates the byte size of Buffer.
+ If the size is not enough, the return status will
+ be EFI_BUFFER_TOO_SMALL, and output BufferSize
+ will be the size it needs.
@retval EFI_SUCCESS The stacks are assigned successfully.
@retval EFI_UNSUPPORTED This function is not supported.
-
+ @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small.
**/
EFI_STATUS
EFIAPI
InitializeSeparateExceptionStacks (
- IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL
+ IN VOID *Buffer,
+ IN OUT UINTN *BufferSize
)
{
return EFI_UNSUPPORTED;
--
2.31.1.windows.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v3 2/3] MdeModulePkg: Move CPU_EXCEPTION_INIT_DATA to UefiCpuPkg
2022-08-09 1:25 [PATCH v3 0/3] Simplify InitializeSeparateExceptionStacks Zhiguang Liu
2022-08-09 1:25 ` [PATCH v3 1/3] UefiCpuPkg: " Zhiguang Liu
@ 2022-08-09 1:25 ` Zhiguang Liu
2022-08-09 1:25 ` [PATCH v3 3/3] UefiCpuPkg: Simplify the struct definition of CPU_EXCEPTION_INIT_DATA Zhiguang Liu
2022-08-09 3:14 ` [edk2-devel] [PATCH v3 0/3] Simplify InitializeSeparateExceptionStacks Ni, Ray
3 siblings, 0 replies; 5+ messages in thread
From: Zhiguang Liu @ 2022-08-09 1:25 UTC (permalink / raw)
To: devel
Cc: Zhiguang Liu, Eric Dong, Ray Ni, Rahul Kumar, Leif Lindholm,
Dandan Bi, Liming Gao, Jian J Wang
Since the API InitializeSeparateExceptionStacks is simplified and does't
use the struct CPU_EXCEPTION_INIT_DATA, CPU_EXCEPTION_INIT_DATA become
a inner implementation of CpuExcetionHandlerLib.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jian J Wang <jian.j.wang@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
---
.../Include/Library/CpuExceptionHandlerLib.h | 67 ------------------
.../CpuExceptionCommon.h | 69 ++++++++++++++++++-
2 files changed, 68 insertions(+), 68 deletions(-)
diff --git a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h
index 8d44ed916a..94e9b20ae1 100644
--- a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h
+++ b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h
@@ -13,73 +13,6 @@
#include <Ppi/VectorHandoffInfo.h>
#include <Protocol/Cpu.h>
-#define CPU_EXCEPTION_INIT_DATA_REV 1
-
-typedef union {
- struct {
- //
- // Revision number of this structure.
- //
- UINT32 Revision;
- //
- // The address of top of known good stack reserved for *ALL* exceptions
- // listed in field StackSwitchExceptions.
- //
- UINTN KnownGoodStackTop;
- //
- // The size of known good stack for *ONE* exception only.
- //
- UINTN KnownGoodStackSize;
- //
- // Buffer of exception vector list for stack switch.
- //
- UINT8 *StackSwitchExceptions;
- //
- // Number of exception vectors in StackSwitchExceptions.
- //
- UINTN StackSwitchExceptionNumber;
- //
- // Buffer of IDT table. It must be type of IA32_IDT_GATE_DESCRIPTOR.
- // Normally there's no need to change IDT table size.
- //
- VOID *IdtTable;
- //
- // Size of buffer for IdtTable.
- //
- UINTN IdtTableSize;
- //
- // Buffer of GDT table. It must be type of IA32_SEGMENT_DESCRIPTOR.
- //
- VOID *GdtTable;
- //
- // Size of buffer for GdtTable.
- //
- UINTN GdtTableSize;
- //
- // Pointer to start address of descriptor of exception task gate in the
- // GDT table. It must be type of IA32_TSS_DESCRIPTOR.
- //
- VOID *ExceptionTssDesc;
- //
- // Size of buffer for ExceptionTssDesc.
- //
- UINTN ExceptionTssDescSize;
- //
- // Buffer of task-state segment for exceptions. It must be type of
- // IA32_TASK_STATE_SEGMENT.
- //
- VOID *ExceptionTss;
- //
- // Size of buffer for ExceptionTss.
- //
- UINTN ExceptionTssSize;
- //
- // Flag to indicate if default handlers should be initialized or not.
- //
- BOOLEAN InitDefaultHandlers;
- } Ia32, X64;
-} CPU_EXCEPTION_INIT_DATA;
-
/**
Initializes all CPU exceptions entries and provides the default exception handlers.
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
index fd42c4be0f..443eaf359b 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
@@ -1,7 +1,7 @@
/** @file
Common header file for CPU Exception Handler Library.
- Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -49,6 +49,73 @@
#define CPU_TSS_GDT_SIZE (SIZE_2KB + CPU_TSS_DESC_SIZE + CPU_TSS_SIZE)
+#define CPU_EXCEPTION_INIT_DATA_REV 1
+
+typedef union {
+ struct {
+ //
+ // Revision number of this structure.
+ //
+ UINT32 Revision;
+ //
+ // The address of top of known good stack reserved for *ALL* exceptions
+ // listed in field StackSwitchExceptions.
+ //
+ UINTN KnownGoodStackTop;
+ //
+ // The size of known good stack for *ONE* exception only.
+ //
+ UINTN KnownGoodStackSize;
+ //
+ // Buffer of exception vector list for stack switch.
+ //
+ UINT8 *StackSwitchExceptions;
+ //
+ // Number of exception vectors in StackSwitchExceptions.
+ //
+ UINTN StackSwitchExceptionNumber;
+ //
+ // Buffer of IDT table. It must be type of IA32_IDT_GATE_DESCRIPTOR.
+ // Normally there's no need to change IDT table size.
+ //
+ VOID *IdtTable;
+ //
+ // Size of buffer for IdtTable.
+ //
+ UINTN IdtTableSize;
+ //
+ // Buffer of GDT table. It must be type of IA32_SEGMENT_DESCRIPTOR.
+ //
+ VOID *GdtTable;
+ //
+ // Size of buffer for GdtTable.
+ //
+ UINTN GdtTableSize;
+ //
+ // Pointer to start address of descriptor of exception task gate in the
+ // GDT table. It must be type of IA32_TSS_DESCRIPTOR.
+ //
+ VOID *ExceptionTssDesc;
+ //
+ // Size of buffer for ExceptionTssDesc.
+ //
+ UINTN ExceptionTssDescSize;
+ //
+ // Buffer of task-state segment for exceptions. It must be type of
+ // IA32_TASK_STATE_SEGMENT.
+ //
+ VOID *ExceptionTss;
+ //
+ // Size of buffer for ExceptionTss.
+ //
+ UINTN ExceptionTssSize;
+ //
+ // Flag to indicate if default handlers should be initialized or not.
+ //
+ BOOLEAN InitDefaultHandlers;
+ } Ia32, X64;
+} CPU_EXCEPTION_INIT_DATA;
+
//
// Record exception handler information
//
--
2.31.1.windows.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v3 3/3] UefiCpuPkg: Simplify the struct definition of CPU_EXCEPTION_INIT_DATA
2022-08-09 1:25 [PATCH v3 0/3] Simplify InitializeSeparateExceptionStacks Zhiguang Liu
2022-08-09 1:25 ` [PATCH v3 1/3] UefiCpuPkg: " Zhiguang Liu
2022-08-09 1:25 ` [PATCH v3 2/3] MdeModulePkg: Move CPU_EXCEPTION_INIT_DATA to UefiCpuPkg Zhiguang Liu
@ 2022-08-09 1:25 ` Zhiguang Liu
2022-08-09 3:14 ` [edk2-devel] [PATCH v3 0/3] Simplify InitializeSeparateExceptionStacks Ni, Ray
3 siblings, 0 replies; 5+ messages in thread
From: Zhiguang Liu @ 2022-08-09 1:25 UTC (permalink / raw)
To: devel; +Cc: Zhiguang Liu, Eric Dong, Ray Ni, Rahul Kumar
CPU_EXCEPTION_INIT_DATA is now an internal implementation of
CpuExceptionHandlerLib. Union can be removed since Ia32 and X64 have the
same definition. Also, two fields (Revision and InitDefaultHandlers)are
useless, can be removed.
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
---
.../CpuExceptionCommon.h | 118 ++++++++----------
.../CpuExceptionHandlerLib/DxeException.c | 25 ++--
.../Ia32/ArchExceptionHandler.c | 71 ++++++-----
.../CpuExceptionHandlerLib/PeiCpuException.c | 25 ++--
.../X64/ArchExceptionHandler.c | 67 +++++-----
5 files changed, 145 insertions(+), 161 deletions(-)
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
index 443eaf359b..11a5624f51 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h
@@ -49,71 +49,59 @@
#define CPU_TSS_GDT_SIZE (SIZE_2KB + CPU_TSS_DESC_SIZE + CPU_TSS_SIZE)
-#define CPU_EXCEPTION_INIT_DATA_REV 1
-
-typedef union {
- struct {
- //
- // Revision number of this structure.
- //
- UINT32 Revision;
- //
- // The address of top of known good stack reserved for *ALL* exceptions
- // listed in field StackSwitchExceptions.
- //
- UINTN KnownGoodStackTop;
- //
- // The size of known good stack for *ONE* exception only.
- //
- UINTN KnownGoodStackSize;
- //
- // Buffer of exception vector list for stack switch.
- //
- UINT8 *StackSwitchExceptions;
- //
- // Number of exception vectors in StackSwitchExceptions.
- //
- UINTN StackSwitchExceptionNumber;
- //
- // Buffer of IDT table. It must be type of IA32_IDT_GATE_DESCRIPTOR.
- // Normally there's no need to change IDT table size.
- //
- VOID *IdtTable;
- //
- // Size of buffer for IdtTable.
- //
- UINTN IdtTableSize;
- //
- // Buffer of GDT table. It must be type of IA32_SEGMENT_DESCRIPTOR.
- //
- VOID *GdtTable;
- //
- // Size of buffer for GdtTable.
- //
- UINTN GdtTableSize;
- //
- // Pointer to start address of descriptor of exception task gate in the
- // GDT table. It must be type of IA32_TSS_DESCRIPTOR.
- //
- VOID *ExceptionTssDesc;
- //
- // Size of buffer for ExceptionTssDesc.
- //
- UINTN ExceptionTssDescSize;
- //
- // Buffer of task-state segment for exceptions. It must be type of
- // IA32_TASK_STATE_SEGMENT.
- //
- VOID *ExceptionTss;
- //
- // Size of buffer for ExceptionTss.
- //
- UINTN ExceptionTssSize;
- //
- // Flag to indicate if default handlers should be initialized or not.
- //
- BOOLEAN InitDefaultHandlers;
- } Ia32, X64;
+typedef struct {
+ //
+ // The address of top of known good stack reserved for *ALL* exceptions
+ // listed in field StackSwitchExceptions.
+ //
+ UINTN KnownGoodStackTop;
+ //
+ // The size of known good stack for *ONE* exception only.
+ //
+ UINTN KnownGoodStackSize;
+ //
+ // Buffer of exception vector list for stack switch.
+ //
+ UINT8 *StackSwitchExceptions;
+ //
+ // Number of exception vectors in StackSwitchExceptions.
+ //
+ UINTN StackSwitchExceptionNumber;
+ //
+ // Buffer of IDT table. It must be type of IA32_IDT_GATE_DESCRIPTOR.
+ // Normally there's no need to change IDT table size.
+ //
+ VOID *IdtTable;
+ //
+ // Size of buffer for IdtTable.
+ //
+ UINTN IdtTableSize;
+ //
+ // Buffer of GDT table. It must be type of IA32_SEGMENT_DESCRIPTOR.
+ //
+ VOID *GdtTable;
+ //
+ // Size of buffer for GdtTable.
+ //
+ UINTN GdtTableSize;
+ //
+ // Pointer to start address of descriptor of exception task gate in the
+ // GDT table. It must be type of IA32_TSS_DESCRIPTOR.
+ //
+ VOID *ExceptionTssDesc;
+ //
+ // Size of buffer for ExceptionTssDesc.
+ //
+ UINTN ExceptionTssDescSize;
+ //
+ // Buffer of task-state segment for exceptions. It must be type of
+ // IA32_TASK_STATE_SEGMENT.
+ //
+ VOID *ExceptionTss;
+ //
+ // Size of buffer for ExceptionTss.
+ //
+ UINTN ExceptionTssSize;
} CPU_EXCEPTION_INIT_DATA;
//
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c
index 04e8409922..d90c607bd7 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c
@@ -190,19 +190,18 @@ InitializeSeparateExceptionStacks (
}
AsmReadIdtr (&Idtr);
- EssData.X64.Revision = CPU_EXCEPTION_INIT_DATA_REV;
- EssData.X64.KnownGoodStackTop = StackTop;
- EssData.X64.KnownGoodStackSize = CPU_KNOWN_GOOD_STACK_SIZE;
- EssData.X64.StackSwitchExceptions = CPU_STACK_SWITCH_EXCEPTION_LIST;
- EssData.X64.StackSwitchExceptionNumber = CPU_STACK_SWITCH_EXCEPTION_NUMBER;
- EssData.X64.IdtTable = (VOID *)Idtr.Base;
- EssData.X64.IdtTableSize = Idtr.Limit + 1;
- EssData.X64.GdtTable = NewGdtTable;
- EssData.X64.GdtTableSize = CPU_TSS_DESC_SIZE + Gdtr.Limit + 1;
- EssData.X64.ExceptionTssDesc = NewGdtTable + Gdtr.Limit + 1;
- EssData.X64.ExceptionTssDescSize = CPU_TSS_DESC_SIZE;
- EssData.X64.ExceptionTss = NewGdtTable + Gdtr.Limit + 1 + CPU_TSS_DESC_SIZE;
- EssData.X64.ExceptionTssSize = CPU_TSS_SIZE;
+ EssData.KnownGoodStackTop = StackTop;
+ EssData.KnownGoodStackSize = CPU_KNOWN_GOOD_STACK_SIZE;
+ EssData.StackSwitchExceptions = CPU_STACK_SWITCH_EXCEPTION_LIST;
+ EssData.StackSwitchExceptionNumber = CPU_STACK_SWITCH_EXCEPTION_NUMBER;
+ EssData.IdtTable = (VOID *)Idtr.Base;
+ EssData.IdtTableSize = Idtr.Limit + 1;
+ EssData.GdtTable = NewGdtTable;
+ EssData.GdtTableSize = CPU_TSS_DESC_SIZE + Gdtr.Limit + 1;
+ EssData.ExceptionTssDesc = NewGdtTable + Gdtr.Limit + 1;
+ EssData.ExceptionTssDescSize = CPU_TSS_DESC_SIZE;
+ EssData.ExceptionTss = NewGdtTable + Gdtr.Limit + 1 + CPU_TSS_DESC_SIZE;
+ EssData.ExceptionTssSize = CPU_TSS_SIZE;
return ArchSetupExceptionStack (&EssData);
}
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
index f13e8e7020..194d3a499b 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
@@ -1,7 +1,7 @@
/** @file
IA32 CPU Exception Handler functons.
- Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -132,16 +132,15 @@ ArchSetupExceptionStack (
EXCEPTION_HANDLER_TEMPLATE_MAP TemplateMap;
if ((StackSwitchData == NULL) ||
- (StackSwitchData->Ia32.Revision != CPU_EXCEPTION_INIT_DATA_REV) ||
- (StackSwitchData->Ia32.KnownGoodStackTop == 0) ||
- (StackSwitchData->Ia32.KnownGoodStackSize == 0) ||
- (StackSwitchData->Ia32.StackSwitchExceptions == NULL) ||
- (StackSwitchData->Ia32.StackSwitchExceptionNumber == 0) ||
- (StackSwitchData->Ia32.StackSwitchExceptionNumber > CPU_EXCEPTION_NUM) ||
- (StackSwitchData->Ia32.GdtTable == NULL) ||
- (StackSwitchData->Ia32.IdtTable == NULL) ||
- (StackSwitchData->Ia32.ExceptionTssDesc == NULL) ||
- (StackSwitchData->Ia32.ExceptionTss == NULL))
+ (StackSwitchData->KnownGoodStackTop == 0) ||
+ (StackSwitchData->KnownGoodStackSize == 0) ||
+ (StackSwitchData->StackSwitchExceptions == NULL) ||
+ (StackSwitchData->StackSwitchExceptionNumber == 0) ||
+ (StackSwitchData->StackSwitchExceptionNumber > CPU_EXCEPTION_NUM) ||
+ (StackSwitchData->GdtTable == NULL) ||
+ (StackSwitchData->IdtTable == NULL) ||
+ (StackSwitchData->ExceptionTssDesc == NULL) ||
+ (StackSwitchData->ExceptionTss == NULL))
{
return EFI_INVALID_PARAMETER;
}
@@ -151,16 +150,16 @@ ArchSetupExceptionStack (
// one or newly allocated, has enough space to hold descriptors for exception
// task-state segments.
//
- if (((UINTN)StackSwitchData->Ia32.GdtTable & (IA32_GDT_ALIGNMENT - 1)) != 0) {
+ if (((UINTN)StackSwitchData->GdtTable & (IA32_GDT_ALIGNMENT - 1)) != 0) {
return EFI_INVALID_PARAMETER;
}
- if ((UINTN)StackSwitchData->Ia32.ExceptionTssDesc < (UINTN)(StackSwitchData->Ia32.GdtTable)) {
+ if ((UINTN)StackSwitchData->ExceptionTssDesc < (UINTN)(StackSwitchData->GdtTable)) {
return EFI_INVALID_PARAMETER;
}
- if ((UINTN)StackSwitchData->Ia32.ExceptionTssDesc + StackSwitchData->Ia32.ExceptionTssDescSize >
- ((UINTN)(StackSwitchData->Ia32.GdtTable) + StackSwitchData->Ia32.GdtTableSize))
+ if ((UINTN)StackSwitchData->ExceptionTssDesc + StackSwitchData->ExceptionTssDescSize >
+ ((UINTN)(StackSwitchData->GdtTable) + StackSwitchData->GdtTableSize))
{
return EFI_INVALID_PARAMETER;
}
@@ -169,20 +168,20 @@ ArchSetupExceptionStack (
// We need one descriptor and one TSS for current task and every exception
// specified.
//
- if (StackSwitchData->Ia32.ExceptionTssDescSize <
- sizeof (IA32_TSS_DESCRIPTOR) * (StackSwitchData->Ia32.StackSwitchExceptionNumber + 1))
+ if (StackSwitchData->ExceptionTssDescSize <
+ sizeof (IA32_TSS_DESCRIPTOR) * (StackSwitchData->StackSwitchExceptionNumber + 1))
{
return EFI_INVALID_PARAMETER;
}
- if (StackSwitchData->Ia32.ExceptionTssSize <
- sizeof (IA32_TASK_STATE_SEGMENT) * (StackSwitchData->Ia32.StackSwitchExceptionNumber + 1))
+ if (StackSwitchData->ExceptionTssSize <
+ sizeof (IA32_TASK_STATE_SEGMENT) * (StackSwitchData->StackSwitchExceptionNumber + 1))
{
return EFI_INVALID_PARAMETER;
}
- TssDesc = StackSwitchData->Ia32.ExceptionTssDesc;
- Tss = StackSwitchData->Ia32.ExceptionTss;
+ TssDesc = StackSwitchData->ExceptionTssDesc;
+ Tss = StackSwitchData->ExceptionTss;
//
// Initialize new GDT table and/or IDT table, if any
@@ -192,20 +191,20 @@ ArchSetupExceptionStack (
GdtSize = (UINTN)TssDesc +
sizeof (IA32_TSS_DESCRIPTOR) *
- (StackSwitchData->Ia32.StackSwitchExceptionNumber + 1) -
- (UINTN)(StackSwitchData->Ia32.GdtTable);
- if ((UINTN)StackSwitchData->Ia32.GdtTable != Gdtr.Base) {
- CopyMem (StackSwitchData->Ia32.GdtTable, (VOID *)Gdtr.Base, Gdtr.Limit + 1);
- Gdtr.Base = (UINTN)StackSwitchData->Ia32.GdtTable;
+ (StackSwitchData->StackSwitchExceptionNumber + 1) -
+ (UINTN)(StackSwitchData->GdtTable);
+ if ((UINTN)StackSwitchData->GdtTable != Gdtr.Base) {
+ CopyMem (StackSwitchData->GdtTable, (VOID *)Gdtr.Base, Gdtr.Limit + 1);
+ Gdtr.Base = (UINTN)StackSwitchData->GdtTable;
Gdtr.Limit = (UINT16)GdtSize - 1;
}
- if ((UINTN)StackSwitchData->Ia32.IdtTable != Idtr.Base) {
- Idtr.Base = (UINTN)StackSwitchData->Ia32.IdtTable;
+ if ((UINTN)StackSwitchData->IdtTable != Idtr.Base) {
+ Idtr.Base = (UINTN)StackSwitchData->IdtTable;
}
- if (StackSwitchData->Ia32.IdtTableSize > 0) {
- Idtr.Limit = (UINT16)(StackSwitchData->Ia32.IdtTableSize - 1);
+ if (StackSwitchData->IdtTableSize > 0) {
+ Idtr.Limit = (UINT16)(StackSwitchData->IdtTableSize - 1);
}
//
@@ -227,10 +226,10 @@ ArchSetupExceptionStack (
// Fixup exception task descriptor and task-state segment
//
AsmGetTssTemplateMap (&TemplateMap);
- StackTop = StackSwitchData->Ia32.KnownGoodStackTop - CPU_STACK_ALIGNMENT;
+ StackTop = StackSwitchData->KnownGoodStackTop - CPU_STACK_ALIGNMENT;
StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);
- IdtTable = StackSwitchData->Ia32.IdtTable;
- for (Index = 0; Index < StackSwitchData->Ia32.StackSwitchExceptionNumber; ++Index) {
+ IdtTable = StackSwitchData->IdtTable;
+ for (Index = 0; Index < StackSwitchData->StackSwitchExceptionNumber; ++Index) {
TssDesc += 1;
Tss += 1;
@@ -251,7 +250,7 @@ ArchSetupExceptionStack (
//
// Fixup TSS
//
- Vector = StackSwitchData->Ia32.StackSwitchExceptions[Index];
+ Vector = StackSwitchData->StackSwitchExceptions[Index];
if ((Vector >= CPU_EXCEPTION_NUM) ||
(Vector >= (Idtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR)))
{
@@ -271,7 +270,7 @@ ArchSetupExceptionStack (
Tss->FS = AsmReadFs ();
Tss->GS = AsmReadGs ();
- StackTop -= StackSwitchData->Ia32.KnownGoodStackSize;
+ StackTop -= StackSwitchData->KnownGoodStackSize;
//
// Update IDT to use Task Gate for given exception
@@ -291,7 +290,7 @@ ArchSetupExceptionStack (
//
// Load current task
//
- AsmWriteTr ((UINT16)((UINTN)StackSwitchData->Ia32.ExceptionTssDesc - Gdtr.Base));
+ AsmWriteTr ((UINT16)((UINTN)StackSwitchData->ExceptionTssDesc - Gdtr.Base));
//
// Publish IDT
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c
index 52ec0fb803..5952295126 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuException.c
@@ -236,19 +236,18 @@ InitializeSeparateExceptionStacks (
NewGdtTable = ALIGN_POINTER (StackTop, sizeof (IA32_TSS_DESCRIPTOR));
AsmReadIdtr (&Idtr);
- EssData.X64.Revision = CPU_EXCEPTION_INIT_DATA_REV;
- EssData.X64.KnownGoodStackTop = StackTop;
- EssData.X64.KnownGoodStackSize = CPU_KNOWN_GOOD_STACK_SIZE;
- EssData.X64.StackSwitchExceptions = CPU_STACK_SWITCH_EXCEPTION_LIST;
- EssData.X64.StackSwitchExceptionNumber = CPU_STACK_SWITCH_EXCEPTION_NUMBER;
- EssData.X64.IdtTable = (VOID *)Idtr.Base;
- EssData.X64.IdtTableSize = Idtr.Limit + 1;
- EssData.X64.GdtTable = NewGdtTable;
- EssData.X64.GdtTableSize = CPU_TSS_DESC_SIZE + Gdtr.Limit + 1;
- EssData.X64.ExceptionTssDesc = NewGdtTable + Gdtr.Limit + 1;
- EssData.X64.ExceptionTssDescSize = CPU_TSS_DESC_SIZE;
- EssData.X64.ExceptionTss = NewGdtTable + Gdtr.Limit + 1 + CPU_TSS_DESC_SIZE;
- EssData.X64.ExceptionTssSize = CPU_TSS_SIZE;
+ EssData.KnownGoodStackTop = StackTop;
+ EssData.KnownGoodStackSize = CPU_KNOWN_GOOD_STACK_SIZE;
+ EssData.StackSwitchExceptions = CPU_STACK_SWITCH_EXCEPTION_LIST;
+ EssData.StackSwitchExceptionNumber = CPU_STACK_SWITCH_EXCEPTION_NUMBER;
+ EssData.IdtTable = (VOID *)Idtr.Base;
+ EssData.IdtTableSize = Idtr.Limit + 1;
+ EssData.GdtTable = NewGdtTable;
+ EssData.GdtTableSize = CPU_TSS_DESC_SIZE + Gdtr.Limit + 1;
+ EssData.ExceptionTssDesc = NewGdtTable + Gdtr.Limit + 1;
+ EssData.ExceptionTssDescSize = CPU_TSS_DESC_SIZE;
+ EssData.ExceptionTss = NewGdtTable + Gdtr.Limit + 1 + CPU_TSS_DESC_SIZE;
+ EssData.ExceptionTssSize = CPU_TSS_SIZE;
return ArchSetupExceptionStack (&EssData);
}
diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
index cd7dccd481..c14ac66c43 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
@@ -1,7 +1,7 @@
/** @file
x64 CPU Exception Handler.
- Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -136,16 +136,15 @@ ArchSetupExceptionStack (
UINTN GdtSize;
if ((StackSwitchData == NULL) ||
- (StackSwitchData->Ia32.Revision != CPU_EXCEPTION_INIT_DATA_REV) ||
- (StackSwitchData->X64.KnownGoodStackTop == 0) ||
- (StackSwitchData->X64.KnownGoodStackSize == 0) ||
- (StackSwitchData->X64.StackSwitchExceptions == NULL) ||
- (StackSwitchData->X64.StackSwitchExceptionNumber == 0) ||
- (StackSwitchData->X64.StackSwitchExceptionNumber > CPU_EXCEPTION_NUM) ||
- (StackSwitchData->X64.GdtTable == NULL) ||
- (StackSwitchData->X64.IdtTable == NULL) ||
- (StackSwitchData->X64.ExceptionTssDesc == NULL) ||
- (StackSwitchData->X64.ExceptionTss == NULL))
+ (StackSwitchData->KnownGoodStackTop == 0) ||
+ (StackSwitchData->KnownGoodStackSize == 0) ||
+ (StackSwitchData->StackSwitchExceptions == NULL) ||
+ (StackSwitchData->StackSwitchExceptionNumber == 0) ||
+ (StackSwitchData->StackSwitchExceptionNumber > CPU_EXCEPTION_NUM) ||
+ (StackSwitchData->GdtTable == NULL) ||
+ (StackSwitchData->IdtTable == NULL) ||
+ (StackSwitchData->ExceptionTssDesc == NULL) ||
+ (StackSwitchData->ExceptionTss == NULL))
{
return EFI_INVALID_PARAMETER;
}
@@ -155,16 +154,16 @@ ArchSetupExceptionStack (
// one or newly allocated, has enough space to hold descriptors for exception
// task-state segments.
//
- if (((UINTN)StackSwitchData->X64.GdtTable & (IA32_GDT_ALIGNMENT - 1)) != 0) {
+ if (((UINTN)StackSwitchData->GdtTable & (IA32_GDT_ALIGNMENT - 1)) != 0) {
return EFI_INVALID_PARAMETER;
}
- if ((UINTN)StackSwitchData->X64.ExceptionTssDesc < (UINTN)(StackSwitchData->X64.GdtTable)) {
+ if ((UINTN)StackSwitchData->ExceptionTssDesc < (UINTN)(StackSwitchData->GdtTable)) {
return EFI_INVALID_PARAMETER;
}
- if (((UINTN)StackSwitchData->X64.ExceptionTssDesc + StackSwitchData->X64.ExceptionTssDescSize) >
- ((UINTN)(StackSwitchData->X64.GdtTable) + StackSwitchData->X64.GdtTableSize))
+ if (((UINTN)StackSwitchData->ExceptionTssDesc + StackSwitchData->ExceptionTssDescSize) >
+ ((UINTN)(StackSwitchData->GdtTable) + StackSwitchData->GdtTableSize))
{
return EFI_INVALID_PARAMETER;
}
@@ -172,20 +171,20 @@ ArchSetupExceptionStack (
//
// One task gate descriptor and one task-state segment are needed.
//
- if (StackSwitchData->X64.ExceptionTssDescSize < sizeof (IA32_TSS_DESCRIPTOR)) {
+ if (StackSwitchData->ExceptionTssDescSize < sizeof (IA32_TSS_DESCRIPTOR)) {
return EFI_INVALID_PARAMETER;
}
- if (StackSwitchData->X64.ExceptionTssSize < sizeof (IA32_TASK_STATE_SEGMENT)) {
+ if (StackSwitchData->ExceptionTssSize < sizeof (IA32_TASK_STATE_SEGMENT)) {
return EFI_INVALID_PARAMETER;
}
//
// Interrupt stack table supports only 7 vectors.
//
- TssDesc = StackSwitchData->X64.ExceptionTssDesc;
- Tss = StackSwitchData->X64.ExceptionTss;
- if (StackSwitchData->X64.StackSwitchExceptionNumber > ARRAY_SIZE (Tss->IST)) {
+ TssDesc = StackSwitchData->ExceptionTssDesc;
+ Tss = StackSwitchData->ExceptionTss;
+ if (StackSwitchData->StackSwitchExceptionNumber > ARRAY_SIZE (Tss->IST)) {
return EFI_INVALID_PARAMETER;
}
@@ -196,19 +195,19 @@ ArchSetupExceptionStack (
AsmReadGdtr (&Gdtr);
GdtSize = (UINTN)TssDesc + sizeof (IA32_TSS_DESCRIPTOR) -
- (UINTN)(StackSwitchData->X64.GdtTable);
- if ((UINTN)StackSwitchData->X64.GdtTable != Gdtr.Base) {
- CopyMem (StackSwitchData->X64.GdtTable, (VOID *)Gdtr.Base, Gdtr.Limit + 1);
- Gdtr.Base = (UINTN)StackSwitchData->X64.GdtTable;
+ (UINTN)(StackSwitchData->GdtTable);
+ if ((UINTN)StackSwitchData->GdtTable != Gdtr.Base) {
+ CopyMem (StackSwitchData->GdtTable, (VOID *)Gdtr.Base, Gdtr.Limit + 1);
+ Gdtr.Base = (UINTN)StackSwitchData->GdtTable;
Gdtr.Limit = (UINT16)GdtSize - 1;
}
- if ((UINTN)StackSwitchData->X64.IdtTable != Idtr.Base) {
- Idtr.Base = (UINTN)StackSwitchData->X64.IdtTable;
+ if ((UINTN)StackSwitchData->IdtTable != Idtr.Base) {
+ Idtr.Base = (UINTN)StackSwitchData->IdtTable;
}
- if (StackSwitchData->X64.IdtTableSize > 0) {
- Idtr.Limit = (UINT16)(StackSwitchData->X64.IdtTableSize - 1);
+ if (StackSwitchData->IdtTableSize > 0) {
+ Idtr.Limit = (UINT16)(StackSwitchData->IdtTableSize - 1);
}
//
@@ -232,20 +231,20 @@ ArchSetupExceptionStack (
// Fixup exception task descriptor and task-state segment
//
ZeroMem (Tss, sizeof (*Tss));
- StackTop = StackSwitchData->X64.KnownGoodStackTop - CPU_STACK_ALIGNMENT;
+ StackTop = StackSwitchData->KnownGoodStackTop - CPU_STACK_ALIGNMENT;
StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);
- IdtTable = StackSwitchData->X64.IdtTable;
- for (Index = 0; Index < StackSwitchData->X64.StackSwitchExceptionNumber; ++Index) {
+ IdtTable = StackSwitchData->IdtTable;
+ for (Index = 0; Index < StackSwitchData->StackSwitchExceptionNumber; ++Index) {
//
// Fixup IST
//
Tss->IST[Index] = StackTop;
- StackTop -= StackSwitchData->X64.KnownGoodStackSize;
+ StackTop -= StackSwitchData->KnownGoodStackSize;
//
// Set the IST field to enable corresponding IST
//
- Vector = StackSwitchData->X64.StackSwitchExceptions[Index];
+ Vector = StackSwitchData->StackSwitchExceptions[Index];
if ((Vector >= CPU_EXCEPTION_NUM) ||
(Vector >= (Idtr.Limit + 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR)))
{
@@ -263,7 +262,7 @@ ArchSetupExceptionStack (
//
// Load current task
//
- AsmWriteTr ((UINT16)((UINTN)StackSwitchData->X64.ExceptionTssDesc - Gdtr.Base));
+ AsmWriteTr ((UINT16)((UINTN)StackSwitchData->ExceptionTssDesc - Gdtr.Base));
//
// Publish IDT
--
2.31.1.windows.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [edk2-devel] [PATCH v3 0/3] Simplify InitializeSeparateExceptionStacks
2022-08-09 1:25 [PATCH v3 0/3] Simplify InitializeSeparateExceptionStacks Zhiguang Liu
` (2 preceding siblings ...)
2022-08-09 1:25 ` [PATCH v3 3/3] UefiCpuPkg: Simplify the struct definition of CPU_EXCEPTION_INIT_DATA Zhiguang Liu
@ 2022-08-09 3:14 ` Ni, Ray
3 siblings, 0 replies; 5+ messages in thread
From: Ni, Ray @ 2022-08-09 3:14 UTC (permalink / raw)
To: devel@edk2.groups.io, Liu, Zhiguang
Cc: Dong, Eric, Kumar, Rahul R, Leif Lindholm, Bi, Dandan,
Gao, Liming, Wang, Jian J, Ard Biesheuvel, Sami Mujawar
Reviewed-by: Ray Ni <ray.ni@intel.com>
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
> Zhiguang Liu
> Sent: Tuesday, August 9, 2022 9:26 AM
> To: devel@edk2.groups.io
> Cc: Liu, Zhiguang <zhiguang.liu@intel.com>; Dong, Eric
> <eric.dong@intel.com>; Ni, Ray <ray.ni@intel.com>; Kumar, Rahul R
> <rahul.r.kumar@intel.com>; Leif Lindholm <quic_llindhol@quicinc.com>; Bi,
> Dandan <dandan.bi@intel.com>; Gao, Liming <gaoliming@byosoft.com.cn>;
> Wang, Jian J <jian.j.wang@intel.com>; Ard Biesheuvel
> <ardb+tianocore@kernel.org>; Sami Mujawar <sami.mujawar@arm.com>
> Subject: [edk2-devel] [PATCH v3 0/3] Simplify
> InitializeSeparateExceptionStacks
>
> The patch set is to hide the exception implementation details,
> so that caller don't need to know anything about IDT when separate stack
> for it. However, this patch set changes a library API, so I have to
> change multiple packages inside one patch. Otherwise, I can make sure
> every single commit can build and boot fine. If anyone has good idea to
> separate the first big patch, please tell me. Thanks in advance.
>
> V2:
> Add another patch to Simplify the CPU_EXCEPTION_INIT_DATA definition
> Keep the memory layout picture in CpuExceptionHandlerLib.
> Fix some code and comment issue according to Ray's comment
>
> V3:
> Change the code behavior when the needed size is zero: skip instead of
> assert
> Fix the bug that treating the TSS as part of GDT
> Reorder the modification in the patch set.
> Code can be seen at https://github.com/tianocore/edk2/pull/3124
>
> Cc: Eric Dong <eric.dong@intel.com>
> Cc: Ray Ni <ray.ni@intel.com>
> Cc: Rahul Kumar <rahul1.kumar@intel.com>
> Cc: Leif Lindholm <quic_llindhol@quicinc.com>
> Cc: Dandan Bi <dandan.bi@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Jian J Wang <jian.j.wang@intel.com>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Sami Mujawar <sami.mujawar@arm.com>
> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
>
> Zhiguang Liu (3):
> UefiCpuPkg: Simplify InitializeSeparateExceptionStacks
> MdeModulePkg: Move CPU_EXCEPTION_INIT_DATA to UefiCpuPkg
> UefiCpuPkg: Simplify the struct definition of CPU_EXCEPTION_INIT_DATA
>
> .../Library/ArmExceptionLib/ArmExceptionLib.c | 15 +-
> MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c | 4 +-
> .../Include/Library/CpuExceptionHandlerLib.h | 82 +-------
> .../CpuExceptionHandlerLibNull.c | 15 +-
> UefiCpuPkg/CpuDxe/CpuMp.c | 162 ++++------------
> UefiCpuPkg/CpuMpPei/CpuMpPei.c | 176 ++++--------------
> .../CpuExceptionCommon.h | 57 +++++-
> .../CpuExceptionHandlerLib/DxeException.c | 112 ++++++++---
> .../Ia32/ArchExceptionHandler.c | 71 ++++---
> .../CpuExceptionHandlerLib/PeiCpuException.c | 94 +++++++++-
> .../PeiCpuExceptionHandlerLib.inf | 4 +-
> .../SecPeiCpuException.c | 15 +-
> .../CpuExceptionHandlerLib/SmmException.c | 15 +-
> .../X64/ArchExceptionHandler.c | 67 ++++---
> 14 files changed, 411 insertions(+), 478 deletions(-)
>
> --
> 2.31.1.windows.1
>
>
>
>
>
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2022-08-09 1:25 [PATCH v3 0/3] Simplify InitializeSeparateExceptionStacks Zhiguang Liu
2022-08-09 1:25 ` [PATCH v3 1/3] UefiCpuPkg: " Zhiguang Liu
2022-08-09 1:25 ` [PATCH v3 2/3] MdeModulePkg: Move CPU_EXCEPTION_INIT_DATA to UefiCpuPkg Zhiguang Liu
2022-08-09 1:25 ` [PATCH v3 3/3] UefiCpuPkg: Simplify the struct definition of CPU_EXCEPTION_INIT_DATA Zhiguang Liu
2022-08-09 3:14 ` [edk2-devel] [PATCH v3 0/3] Simplify InitializeSeparateExceptionStacks Ni, Ray
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