From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by mx.groups.io with SMTP id smtpd.web12.6742.1660008368004129018 for ; Mon, 08 Aug 2022 18:26:12 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=JiEJuEJl; spf=pass (domain: intel.com, ip: 192.55.52.43, mailfrom: zhiguang.liu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660008372; x=1691544372; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=G/1bPJlnqb9oPp32MiS7UdQr698saBd9P77/Hh5CbSM=; b=JiEJuEJlsRaP39Vr7vDN+JSIN+OAwOGv0VLfTywsiZBYPbKW317l1MyH rz5tFviehw0Ma66fM7ICBlzKuaMGq5WiFzDPt8y90VFnB1wqwQsB3AGge YWI4atj6ClLeFYfCbd2go4vBT+zjtlFtdl60MhaoKVYxAbCSamIXgIZyY Da8ijauIZyFeNVnOGQ8Fi1fXcadr+NLmH+ChsJz0N96z15b+dHMxKeM7+ fD79U53VGmqDwW0X8s+K8K0tuaFehDSRO2YNt+RByyj3MQgQbGBVlKpiq NXNZrdwZwzme0ccQ7VbRDPcCxXM8nvP9au/KWToONEwPgiu/00zCIJ3qR A==; X-IronPort-AV: E=McAfee;i="6400,9594,10433"; a="377020615" X-IronPort-AV: E=Sophos;i="5.93,223,1654585200"; d="scan'208";a="377020615" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Aug 2022 18:26:12 -0700 X-IronPort-AV: E=Sophos;i="5.93,223,1654585200"; d="scan'208";a="932291965" Received: from unknown (HELO shwdesfp01.ccr.corp.intel.com) ([10.239.158.151]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Aug 2022 18:26:10 -0700 From: "Zhiguang Liu" To: devel@edk2.groups.io Cc: Zhiguang Liu , Eric Dong , Ray Ni , Rahul Kumar , Leif Lindholm , Dandan Bi , Liming Gao , Jian J Wang Subject: [PATCH v3 2/3] MdeModulePkg: Move CPU_EXCEPTION_INIT_DATA to UefiCpuPkg Date: Tue, 9 Aug 2022 09:25:36 +0800 Message-Id: <20220809012537.1513-3-zhiguang.liu@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20220809012537.1513-1-zhiguang.liu@intel.com> References: <20220809012537.1513-1-zhiguang.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Since the API InitializeSeparateExceptionStacks is simplified and does't use the struct CPU_EXCEPTION_INIT_DATA, CPU_EXCEPTION_INIT_DATA become a inner implementation of CpuExcetionHandlerLib. Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Leif Lindholm Cc: Dandan Bi Cc: Liming Gao Cc: Jian J Wang Signed-off-by: Zhiguang Liu --- .../Include/Library/CpuExceptionHandlerLib.h | 67 ------------------ .../CpuExceptionCommon.h | 69 ++++++++++++++++++- 2 files changed, 68 insertions(+), 68 deletions(-) diff --git a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h index 8d44ed916a..94e9b20ae1 100644 --- a/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h +++ b/MdeModulePkg/Include/Library/CpuExceptionHandlerLib.h @@ -13,73 +13,6 @@ #include #include -#define CPU_EXCEPTION_INIT_DATA_REV 1 - -typedef union { - struct { - // - // Revision number of this structure. - // - UINT32 Revision; - // - // The address of top of known good stack reserved for *ALL* exceptions - // listed in field StackSwitchExceptions. - // - UINTN KnownGoodStackTop; - // - // The size of known good stack for *ONE* exception only. - // - UINTN KnownGoodStackSize; - // - // Buffer of exception vector list for stack switch. - // - UINT8 *StackSwitchExceptions; - // - // Number of exception vectors in StackSwitchExceptions. - // - UINTN StackSwitchExceptionNumber; - // - // Buffer of IDT table. It must be type of IA32_IDT_GATE_DESCRIPTOR. - // Normally there's no need to change IDT table size. - // - VOID *IdtTable; - // - // Size of buffer for IdtTable. - // - UINTN IdtTableSize; - // - // Buffer of GDT table. It must be type of IA32_SEGMENT_DESCRIPTOR. - // - VOID *GdtTable; - // - // Size of buffer for GdtTable. - // - UINTN GdtTableSize; - // - // Pointer to start address of descriptor of exception task gate in the - // GDT table. It must be type of IA32_TSS_DESCRIPTOR. - // - VOID *ExceptionTssDesc; - // - // Size of buffer for ExceptionTssDesc. - // - UINTN ExceptionTssDescSize; - // - // Buffer of task-state segment for exceptions. It must be type of - // IA32_TASK_STATE_SEGMENT. - // - VOID *ExceptionTss; - // - // Size of buffer for ExceptionTss. - // - UINTN ExceptionTssSize; - // - // Flag to indicate if default handlers should be initialized or not. - // - BOOLEAN InitDefaultHandlers; - } Ia32, X64; -} CPU_EXCEPTION_INIT_DATA; - /** Initializes all CPU exceptions entries and provides the default exception handlers. diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h index fd42c4be0f..443eaf359b 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/CpuExceptionCommon.h @@ -1,7 +1,7 @@ /** @file Common header file for CPU Exception Handler Library. - Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2022, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -49,6 +49,73 @@ #define CPU_TSS_GDT_SIZE (SIZE_2KB + CPU_TSS_DESC_SIZE + CPU_TSS_SIZE) +#define CPU_EXCEPTION_INIT_DATA_REV 1 + +typedef union { + struct { + // + // Revision number of this structure. + // + UINT32 Revision; + // + // The address of top of known good stack reserved for *ALL* exceptions + // listed in field StackSwitchExceptions. + // + UINTN KnownGoodStackTop; + // + // The size of known good stack for *ONE* exception only. + // + UINTN KnownGoodStackSize; + // + // Buffer of exception vector list for stack switch. + // + UINT8 *StackSwitchExceptions; + // + // Number of exception vectors in StackSwitchExceptions. + // + UINTN StackSwitchExceptionNumber; + // + // Buffer of IDT table. It must be type of IA32_IDT_GATE_DESCRIPTOR. + // Normally there's no need to change IDT table size. + // + VOID *IdtTable; + // + // Size of buffer for IdtTable. + // + UINTN IdtTableSize; + // + // Buffer of GDT table. It must be type of IA32_SEGMENT_DESCRIPTOR. + // + VOID *GdtTable; + // + // Size of buffer for GdtTable. + // + UINTN GdtTableSize; + // + // Pointer to start address of descriptor of exception task gate in the + // GDT table. It must be type of IA32_TSS_DESCRIPTOR. + // + VOID *ExceptionTssDesc; + // + // Size of buffer for ExceptionTssDesc. + // + UINTN ExceptionTssDescSize; + // + // Buffer of task-state segment for exceptions. It must be type of + // IA32_TASK_STATE_SEGMENT. + // + VOID *ExceptionTss; + // + // Size of buffer for ExceptionTss. + // + UINTN ExceptionTssSize; + // + // Flag to indicate if default handlers should be initialized or not. + // + BOOLEAN InitDefaultHandlers; + } Ia32, X64; +} CPU_EXCEPTION_INIT_DATA; + // // Record exception handler information // -- 2.31.1.windows.1