From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f44.google.com (mail-pj1-f44.google.com [209.85.216.44]) by mx.groups.io with SMTP id smtpd.web12.15862.1660657848194115233 for ; Tue, 16 Aug 2022 06:50:48 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@ventanamicro.com header.s=google header.b=TzNBZFyg; spf=pass (domain: ventanamicro.com, ip: 209.85.216.44, mailfrom: sunilvl@ventanamicro.com) Received: by mail-pj1-f44.google.com with SMTP id gp7so9799368pjb.4 for ; Tue, 16 Aug 2022 06:50:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc; bh=yuVLDtrB+xdbmve+gOpZy2DpzuCkHQzuTrDhQE2QC1g=; b=TzNBZFygB/Q568klxo2wcOxcQduYnDqrwaddzVpGfqXYuSmbz+gg7jJAGx2RWN/GbL 3/spWHbuYA8YsaRYZK3LXbiXmWoidZbGKnk8YebJmUwy3ik4NDlPjiMT+/43DMG0Gxco uyvLGJdKrv5U5QWvB1Ry9dqvTdAAtYQd5+CPNtdQ9hdZxR8yaPCL1rsFNZ3XLbnlNbS/ nxM4HRGhf9jo/SFeMH5W95rXKuoHTy2BqutaP7w40WrcIk8dFgCa6IypxBybqo+Qae3C OH9zg24XAluOMbCIxveIXsvOaX/ZlnRRIfyOkng0wGheUCLo2V6+6VFSyL0C/s+qq0DZ v5+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc; bh=yuVLDtrB+xdbmve+gOpZy2DpzuCkHQzuTrDhQE2QC1g=; b=d4rQZoN+SnipprHI1C5H8yjWTqsbijztkGkrUKRh+CVLgTTe6Zs/sZqL76LtNz+9Dw Qo6JXODE1x60+OwBu3SJFCqNpHXNk22kSfeDm/GmF+Ng3aOsP+stUwnkKpzx91g/EIbc oRZ1lZ1iyqockz2GDnVAMclEINHOFyiUv6XF/zYJit6jJDu4EFboY+mLz67QXblZLHbC GsPyCreXow19WNDeAXY/svmeve3A4w69JaNg3wQqLUDxrYiJFy5v1NjXSDf6h6ypLZr/ /uPDgzXEDkfrS6DLhEbnaS0BOR9PXUF3UIOOt7fEk1U19FqByDA6LTkvo4nmzn5NNSuG hdSg== X-Gm-Message-State: ACgBeo2RTYFbaiNxJIL6yzQYfN+Gv/2HT+YrF+V6wsgqqYVzNY6yFmNX XhVpXjJ8BMEVsMlYTt4cmUeOQg== X-Google-Smtp-Source: AA6agR6H8Z3w9WJU4QDaTD1UIaWM3gA6sp5LMOBH0r+G5P/oddH2Yl67TULJCoKDAjQUiVKF3+DG7w== X-Received: by 2002:a17:90b:3ec9:b0:1f5:62d5:4157 with SMTP id rm9-20020a17090b3ec900b001f562d54157mr32579361pjb.183.1660657847661; Tue, 16 Aug 2022 06:50:47 -0700 (PDT) Return-Path: Received: from sunil-laptop ([49.206.15.34]) by smtp.gmail.com with ESMTPSA id z4-20020a1709027e8400b001726d843053sm4410284pla.308.2022.08.16.06.50.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Aug 2022 06:50:47 -0700 (PDT) Date: Tue, 16 Aug 2022 19:20:42 +0530 From: "Sunil V L" To: Daniel Schaefer Cc: devel@edk2.groups.io Subject: Re: [edk2-platforms PATCH v1 1/1] RISC-V/RiscVExceptionLib: Follow new CpuExceptionHandlerLib APIs Message-ID: <20220816135042.GA35002@sunil-laptop> References: <20220811064057.1833908-1-daniel.schaefer@hpe.com> MIME-Version: 1.0 In-Reply-To: <20220811064057.1833908-1-daniel.schaefer@hpe.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Thu, Aug 11, 2022 at 02:40:57PM +0800, Daniel Schaefer wrote: > CpuExceptionHandlerLib (in EDK2) has been refactored with following changes > 1. Removed InitializeCpuInterruptHandlers in 2a09527ebcb459b40 > 2. Removed InitializeCpuExceptionHandlersEx and > added InitializeSeparateExceptionStacks in e7abb94d1fb8a0e7 > > The patch updates RISC-V version of CpuExceptionHandlerLib to follow > the API changes, based on the ARM changes in e2ae0bed29ca0900bd35. > > The functionality to RISC-V platforms should be none. > > Signed-off-by: Daniel Schaefer > Cc: Sunil V L > --- > Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c | 82 ++++++-------------- > 1 file changed, 24 insertions(+), 58 deletions(-) > > diff --git a/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c b/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c > index 93fbde619f..c3ced4a4c2 100644 > --- a/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c > +++ b/Silicon/RISC-V/ProcessorPkg/Library/RiscVExceptionLib/CpuExceptionHandlerLib.c > @@ -44,31 +44,6 @@ InitializeCpuExceptionHandlers ( > return EFI_SUCCESS; > } > > -/** > - Initializes all CPU interrupt/exceptions entries and provides the default interrupt/exception handlers. > - > - Caller should try to get an array of interrupt and/or exception vectors that are in use and need to > - persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification. > - If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL. > - If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly. > - > - @param[in] VectorInfo Pointer to reserved vector list. > - > - @retval EFI_SUCCESS All CPU interrupt/exception entries have been successfully initialized > - with default interrupt/exception handlers. > - @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL. > - @retval EFI_UNSUPPORTED This function is not supported. > - > -**/ > -EFI_STATUS > -EFIAPI > -InitializeCpuInterruptHandlers ( > - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL > - ) > -{ > - return EFI_SUCCESS; > -} > - > /** > Registers a function to be called from the processor interrupt handler. > > @@ -134,39 +109,6 @@ RiscVSupervisorModeTrapHandler ( > } > } > > -/** > - Initializes all CPU exceptions entries with optional extra initializations. > - > - By default, this method should include all functionalities implemented by > - InitializeCpuExceptionHandlers(), plus extra initialization works, if any. > - This could be done by calling InitializeCpuExceptionHandlers() directly > - in this method besides the extra works. > - > - InitData is optional and its use and content are processor arch dependent. > - The typical usage of it is to convey resources which have to be reserved > - elsewhere and are necessary for the extra initializations of exception. > - > - @param[in] VectorInfo Pointer to reserved vector list. > - @param[in] InitData Pointer to data optional for extra initializations > - of exception. > - > - @retval EFI_SUCCESS The exceptions have been successfully > - initialized. > - @retval EFI_INVALID_PARAMETER VectorInfo or InitData contains invalid > - content. > - @retval EFI_UNSUPPORTED This function is not supported. > - > -**/ > -EFI_STATUS > -EFIAPI > -InitializeCpuExceptionHandlersEx ( > - IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL, > - IN CPU_EXCEPTION_INIT_DATA *InitData OPTIONAL > - ) > -{ > - return InitializeCpuExceptionHandlers (VectorInfo); > -} > - > /** > The constructor function to initial interrupt handlers in > RISCV_MACHINE_MODE_CONTEXT. > @@ -192,3 +134,27 @@ CpuExceptionHandlerLibConstructor ( > > return EFI_SUCCESS; > } > + > +/** > + Setup separate stacks for certain exception handlers. > + If the input Buffer and BufferSize are both NULL, use global variable if possible. > + > + @param[in] Buffer Point to buffer used to separate exception stack. > + @param[in, out] BufferSize On input, it indicates the byte size of Buffer. > + If the size is not enough, the return status will > + be EFI_BUFFER_TOO_SMALL, and output BufferSize > + will be the size it needs. > + > + @retval EFI_SUCCESS The stacks are assigned successfully. > + @retval EFI_UNSUPPORTED This function is not supported. > + @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small. > +**/ > +EFI_STATUS > +EFIAPI > +InitializeSeparateExceptionStacks ( > + IN VOID *Buffer, > + IN OUT UINTN *BufferSize > + ) > +{ > + return EFI_SUCCESS; > +} Looks good to me. Reviewed-by: Sunil V L > -- > 2.36.0 >