From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web11.247.1662476808583684008 for ; Tue, 06 Sep 2022 08:06:48 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="body hash did not verify" header.i=@kernel.org header.s=k20201202 header.b=YuqtYugp; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 91FD76154C; Tue, 6 Sep 2022 15:06:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9720AC433D6; Tue, 6 Sep 2022 15:06:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1662476807; bh=OW11eoUomeX4CmEf56OMPIDOMGLlEPwDsRr+9/KG/TM=; h=From:To:Cc:Subject:Date:From; b=YuqtYugpe2917Owcoiv02l9nCGlK9oOjrjrmS2Z67y8+3Zs22Bcy7s5Q7b8bLvn3O zp4c5pxCwEnh8fzNFhFr5lqL6VyZRpRuRG+yC0OOMkV4xFsDVVNFbOBXPR+7b4SnxI Z/XsyKZYdB2GPrQbwVK7rofrF/Jjls+RZYBZsfCKHWt+NcjT3obx3DZb6AxIup3mET XoOIfV6XOtkr3k96EUQCklVqaJmkXR/p+Rio3OTnsi5EOXjHz4aL+VL3pqJ15vgYym K3zbYhYJqugbs6EZFBHtJSykANdG8N9P/1nQARBqawi/YWFvxWENblz2ETb1iCpVjb hdZX6snvOxvzQ== From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: quic_llindhol@quicinc.com, sami.mujawar@arm.com, Ard Biesheuvel , Marc Zyngier , Alexander Graf Subject: [PATCH v2 0/7] ArmVirtPkg/ArmVirtQemu: avoid stores with MMU off Date: Tue, 6 Sep 2022 17:06:32 +0200 Message-Id: <20220906150639.157227-1-ardb@kernel.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable We currently do a substantial amount of processing before enabling the MMU and caches, which is bad for performance, but also fragile, as it requires cache coherency to be managed by hand. This also means that when running under virtualization, the hypervisor must do a non-trivial amount of work to ensure that the host's cached view of memory is consistent with the guest's uncached view. So let's update the ArmVirtQemu early boot sequence to improve the situation: - instead of switching the MMU off and on again to meet break-before-make (BBM) requirements when running at EL1, use two sets of page tables and switch between them using different ASIDs; - use a compile time generated ID map that covers the first bank of NOR flash, the first MMIO region (for the UART), and the first 128 MiB of DRAM, and switch to it straight out of reset. The resulting build no longer performs any non-coherent memory accesses via the data side, and only relies on instruction fetches before the MMU is enabled. Changes since v1: - coding style tweaks to placate our CI overlord - drop -mstrict-align which is no longer needed now that all C code runs with the MMU and caches on Cc: Marc Zyngier Cc: Alexander Graf Ard Biesheuvel (7): ArmPkg/ArmMmuLib: don't replace table entries with block entries ArmPkg/ArmMmuLib: use shadow page tables for break-before-make at EL1 ArmPkg/ArmMmuLib: permit initial configuration with MMU enabled ArmPlatformPkg/PrePeiCore: permit entry with the MMU enabled ArmVirtPkg/ArmVirtQemu: implement ArmPlatformLib with static ID map ArmVirtPkg/ArmVirtQemu: use first 128 MiB as permanent PEI memory ArmVirtPkg/ArmVirtQemu: enable initial ID map at early boot ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c | 4 = + ArmPkg/Include/Chipset/AArch64Mmu.h | 1 = + ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 204 = +++++++++++++------- ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S | 15 = +- ArmPlatformPkg/PrePeiCore/PrePeiCore.c | 22 = ++- ArmVirtPkg/ArmVirtQemu.dsc | 12 = +- ArmVirtPkg/ArmVirtQemu.fdf | 2 = +- ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S | 111 = +++++++++++ ArmVirtPkg/Library/ArmPlatformLibQemu/ArmPlatformLibQemu.c | 64 = ++++++ ArmVirtPkg/Library/ArmPlatformLibQemu/ArmPlatformLibQemu.inf | 40 = ++++ ArmVirtPkg/Library/ArmPlatformLibQemu/IdMap.S | 57 = ++++++ ArmVirtPkg/MemoryInitPei/MemoryInitPeim.c | 105 = ++++++++++ ArmVirtPkg/MemoryInitPei/MemoryInitPeim.inf | 68 = +++++++ 13 files changed, 624 insertions(+), 81 deletions(-) create mode 100644 ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlat= formHelper.S create mode 100644 ArmVirtPkg/Library/ArmPlatformLibQemu/ArmPlatformLibQ= emu.c create mode 100644 ArmVirtPkg/Library/ArmPlatformLibQemu/ArmPlatformLibQ= emu.inf create mode 100644 ArmVirtPkg/Library/ArmPlatformLibQemu/IdMap.S create mode 100644 ArmVirtPkg/MemoryInitPei/MemoryInitPeim.c create mode 100644 ArmVirtPkg/MemoryInitPei/MemoryInitPeim.inf --=20 2.35.1