From: "Sunil V L" <sunilvl@ventanamicro.com>
To: devel@edk2.groups.io
Cc: Jian J Wang <jian.j.wang@intel.com>,
Liming Gao <gaoliming@byosoft.com.cn>,
Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
Rahul Kumar <rahul1.kumar@intel.com>,
Debkumar De <debkumar.de@intel.com>,
Catharine West <catharine.west@intel.com>,
Daniel Schaefer <git@danielschaefer.me>,
Abner Chang <Abner.Chang@amd.com>,
Leif Lindholm <quic_llindhol@quicinc.com>,
Ard Biesheuvel <ardb@kernel.org>,
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
Anup Patel <apatel@ventanamicro.com>,
Sunil V L <sunilvl@ventanamicro.com>
Subject: [RFC PATCH 05/17] UefiCpuPkg.dec: Add PCD variable for RISC-V
Date: Tue, 6 Sep 2022 22:38:25 +0530 [thread overview]
Message-ID: <20220906170837.491525-6-sunilvl@ventanamicro.com> (raw)
In-Reply-To: <20220906170837.491525-1-sunilvl@ventanamicro.com>
RISC-V platforms need PCD variable to indicate the mtimer
frequency which will be consumed by CpuDxe and TimerLib.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
UefiCpuPkg/UefiCpuPkg.dec | 3 +++
1 file changed, 3 insertions(+)
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 718323d904..5e94bde5fe 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -350,6 +350,9 @@
# @Prompt Access to non-SMRAM memory is restricted to reserved, runtime and ACPI NVS type after SmmReadyToLock.
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmRestrictedMemoryAccess|TRUE|BOOLEAN|0x3213210F
+[PcdsFixedAtBuild.RISCV64]
+ gUefiCpuPkgTokenSpaceGuid.PcdRiscVTimerFrequencyInHz|0|UINT32|0x50000000
+
[PcdsDynamic, PcdsDynamicEx]
## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.
# @Prompt The pointer to a CPU S3 data buffer.
--
2.25.1
next prev parent reply other threads:[~2022-09-06 17:09 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-06 17:08 [RFC PATCH 00/17] Refactor and add RISC-V support in edk2 repo Sunil V L
2022-09-06 17:08 ` [RFC PATCH 01/17] MdePkg/Register: Add register definition header files for RISC-V Sunil V L
2022-09-06 17:08 ` [RFC PATCH 02/17] MdePkg/MdePkg.dec: Add RISCV_EFI_BOOT_PROTOCOL GUID Sunil V L
2022-09-06 17:08 ` [RFC PATCH 03/17] MdePkg/Protocol: Add RiscVBootProtocol.h Sunil V L
2022-09-06 17:08 ` [RFC PATCH 04/17] MdeModulePkg/MdeModulePkg.dec: Add PCD variables for RISC-V Sunil V L
2022-09-06 17:08 ` Sunil V L [this message]
2022-09-06 17:08 ` [RFC PATCH 06/17] MdePkg/BaseLib: RISC-V: Add generic CPU related functions Sunil V L
2022-09-06 17:08 ` [RFC PATCH 07/17] MdePkg: Add ArchTimerLib library Sunil V L
2022-09-06 17:08 ` [RFC PATCH 08/17] MdePkg: Add RiscVSbiLib Library for RISC-V Sunil V L
2022-09-06 17:08 ` [RFC PATCH 09/17] UefiCpuPkg/DxeCpuExceptionHandlerLib: Refactor to add other architectures Sunil V L
2022-09-06 17:08 ` [RFC PATCH 10/17] UefiCpuPkg: Add RISC-V support in DxeCpuExceptionHandlerLib Sunil V L
2022-09-06 17:08 ` [RFC PATCH 11/17] MdePkg/Library: Add ResetSystemLib library Sunil V L
2022-09-06 17:08 ` [RFC PATCH 12/17] UefiCpuPkg/SecCore: Add SEC startup code for RISC-V Sunil V L
2022-09-06 17:08 ` [RFC PATCH 13/17] MdePkg: Add PlatformPeiLib library Sunil V L
2022-09-06 17:08 ` [RFC PATCH 14/17] MdeModulePkg/Universal: Add PlatformPei module for RISC-V Sunil V L
2022-09-06 17:08 ` [RFC PATCH 15/17] UefiCpuPkg/CpuDxe: Refactor to allow other CPU architectures Sunil V L
2022-09-06 17:08 ` [RFC PATCH 16/17] UefiCpuPkg/CpuDxe: Add RISC-V support in CpuDxe module Sunil V L
2022-09-07 9:32 ` Chang, Abner
2022-09-07 11:22 ` Sunil V L
2022-09-07 12:46 ` Chang, Abner
2022-09-08 10:53 ` Sunil V L
2022-09-08 12:02 ` Chang, Abner
2022-09-06 17:08 ` [RFC PATCH 17/17] MdeModulePkg/Universal: Add TimerDxe module Sunil V L
2022-09-07 5:54 ` [edk2-devel] [RFC PATCH 00/17] Refactor and add RISC-V support in edk2 repo Gerd Hoffmann
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