From: "Sunil V L" <sunilvl@ventanamicro.com>
To: devel@edk2.groups.io
Cc: Jian J Wang <jian.j.wang@intel.com>,
Liming Gao <gaoliming@byosoft.com.cn>,
Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
Rahul Kumar <rahul1.kumar@intel.com>,
Debkumar De <debkumar.de@intel.com>,
Catharine West <catharine.west@intel.com>,
Daniel Schaefer <git@danielschaefer.me>,
Abner Chang <Abner.Chang@amd.com>,
Leif Lindholm <quic_llindhol@quicinc.com>,
Ard Biesheuvel <ardb@kernel.org>,
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
Anup Patel <apatel@ventanamicro.com>,
Sunil V L <sunilvl@ventanamicro.com>
Subject: [RFC PATCH 2/2] Maintainers.txt: Add entry for new RiscVVirt
Date: Tue, 6 Sep 2022 22:40:20 +0530 [thread overview]
Message-ID: <20220906171020.491573-2-sunilvl@ventanamicro.com> (raw)
In-Reply-To: <20220906171020.491573-1-sunilvl@ventanamicro.com>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
Maintainers.txt | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Maintainers.txt b/Maintainers.txt
index a4a0e4b907..6fac3369dd 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -381,6 +381,11 @@ F: Silicon/RISC-V/ProcessorPkg/
M: Sunil V L <sunilvl@ventanamicro.com>
R: Daniel Schaefer <git@danielschaefer.me>
+QEMU RISC-V virt platform
+F: Platform/Qemu/RiscVVirt/
+M: Sunil V L <sunilvl@ventanamicro.com>
+R: Daniel Schaefer <git@danielschaefer.me>
+
Silicon/SiFive
F: Silicon/SiFive/
M: Daniel Schaefer <git@danielschaefer.me>
--
2.25.1
next prev parent reply other threads:[~2022-09-06 17:10 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-06 17:10 [RFC PATCH 1/2] RISC-V: Add Qemu Virt platform support Sunil V L
2022-09-06 17:10 ` Sunil V L [this message]
2022-09-07 5:34 ` [RFC PATCH 2/2] Maintainers.txt: Add entry for new RiscVVirt Heinrich Schuchardt
2022-09-07 5:50 ` [RFC PATCH 1/2] RISC-V: Add Qemu Virt platform support Heinrich Schuchardt
2022-09-07 6:20 ` Heinrich Schuchardt
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