From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f54.google.com (mail-pj1-f54.google.com [209.85.216.54]) by mx.groups.io with SMTP id smtpd.web11.6314.1662549134125279691 for ; Wed, 07 Sep 2022 04:12:14 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@ventanamicro.com header.s=google header.b=WWWub20I; spf=pass (domain: ventanamicro.com, ip: 209.85.216.54, mailfrom: sunilvl@ventanamicro.com) Received: by mail-pj1-f54.google.com with SMTP id pj10so3755118pjb.2 for ; Wed, 07 Sep 2022 04:12:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=6zTOvgBjhOXigb6u8oQF1MEFvIYjNlwmhoST2vBEYR4=; b=WWWub20IRXGNfl1D1kGGK4oPTPQs5LDIW5Tdc4gu/zQU2LGF11d5Jc0V0qr0cyoT9f T0GQAzEjGby0wSN0FErzUUtsTeXdVgL+y3krT/6wFakzHa9k0/1cs2CP1NPBbkEF/6GP Sl5eVsZsQrXRhRKUyMairRrNYsOpFyj82PgI+87pdbjdRO09Y/ZPcCR3kDRPEtG1Mf+k kUDjdgJfxR7NX8lGTjb7JtKKDMDvYlXXhd8kmlwo8Hz2RiXHn97oRAtHU9zbfA9xyNMY g3/DhIiSpOsEO04KZ3pQfcV2y8zRa++pLTDu5OhHUo2F10dMkGCTZmW2qIrVAjsc0Be2 xaOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=6zTOvgBjhOXigb6u8oQF1MEFvIYjNlwmhoST2vBEYR4=; b=avtXn8i6BKxw+XSNJE4y77+BFLFW9CgroXM+h3eIaGR245PT2/K5D6mVGDCcYRMdlU wWeKVlL2inQ6NhNV0P8oD3v9RFldQSa0QouQsHF3/gRWbybgffC4fPfzu3vdHUzSpoZg QzZOB7w3LplZzPIJBXa1W/w8z/gFimT6OA3G4V4IkJKFvrF3MPmzwO4WfZQNJ9qGFPrn ywbgliQerwrUrGard+7xTDCtxeXRMgB2ElPhnLE/yy7TuVoisaoMUg0R9xjmsgP9AolJ d7kjDKXGb6Y12XIyw+OCXJeKcyYgGigIbHcSFfYm7k9MRYMsrWjRsJzVzRVszGxC7j33 VURA== X-Gm-Message-State: ACgBeo3nwcX/lMJbajGuBb80WvX4BINAO2pcnAgo9w2e4XDxIR5PKV+L aTVFJr/dAK/rW9EI+ymMwC8CCMjCVY44hHG+ X-Google-Smtp-Source: AA6agR79jA3hpGgL6q6u/flN8TSRVCHdeGme5p0BQgR35Mvamq8LpYziZKaUPeiZhP8Ue58eyBW2lw== X-Received: by 2002:a17:90b:35c5:b0:1fd:9087:6a70 with SMTP id nb5-20020a17090b35c500b001fd90876a70mr3506029pjb.158.1662549132691; Wed, 07 Sep 2022 04:12:12 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([49.206.11.92]) by smtp.gmail.com with ESMTPSA id y5-20020aa79ae5000000b0052b84ca900csm12208518pfp.62.2022.09.07.04.12.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Sep 2022 04:12:11 -0700 (PDT) From: "Sunil V L" To: devel@edk2.groups.io Cc: Jian J Wang , Liming Gao , Eric Dong , Ray Ni , Rahul Kumar , Debkumar De , Catharine West , Daniel Schaefer , Abner Chang , Leif Lindholm , Andrew Fish , Ard Biesheuvel , Heinrich Schuchardt , Anup Patel , Sunil V L Subject: [RFC PATCH V2 08/19] MdePkg: Add RiscVSbiLib Library for RISC-V Date: Wed, 7 Sep 2022 16:41:14 +0530 Message-Id: <20220907111125.539698-9-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220907111125.539698-1-sunilvl@ventanamicro.com> References: <20220907111125.539698-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable This library is required to make SBI ecalls from the S-mode EDK2. Signed-off-by: Sunil V L --- MdePkg/Library/RiscVSbiLib/RiscVSbiLib.inf | 27 +++ MdePkg/Include/Library/RiscVSbiLib.h | 129 +++++++++++ MdePkg/Library/RiscVSbiLib/RiscVSbiLib.c | 228 ++++++++++++++++++++ 3 files changed, 384 insertions(+) diff --git a/MdePkg/Library/RiscVSbiLib/RiscVSbiLib.inf b/MdePkg/Library/Ri= scVSbiLib/RiscVSbiLib.inf new file mode 100644 index 000000000000..a621243a1a99 --- /dev/null +++ b/MdePkg/Library/RiscVSbiLib/RiscVSbiLib.inf @@ -0,0 +1,27 @@ +## @file=0D +# RISC-V Library to call SBI ecalls=0D +#=0D +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D +# Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
= =0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +##=0D +=0D +[Defines]=0D + INF_VERSION =3D 0x0001001b=0D + BASE_NAME =3D RiscVSbiLib=0D + FILE_GUID =3D D742CF3D-E600-4009-8FB5-318073008508=0D + MODULE_TYPE =3D BASE=0D + VERSION_STRING =3D 1.0=0D + LIBRARY_CLASS =3D RiscVSbiLib=0D +=0D +[Sources]=0D + RiscVSbiLib.c=0D +=0D +[Packages]=0D + MdePkg/MdePkg.dec=0D + UefiCpuPkg/UefiCpuPkg.dec=0D +=0D +[LibraryClasses]=0D + BaseLib=0D diff --git a/MdePkg/Include/Library/RiscVSbiLib.h b/MdePkg/Include/Library/= RiscVSbiLib.h new file mode 100644 index 000000000000..e94adb08fd40 --- /dev/null +++ b/MdePkg/Include/Library/RiscVSbiLib.h @@ -0,0 +1,129 @@ +/** @file=0D + Library to call the RISC-V SBI ecalls=0D +=0D + Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights rese= rved.
=0D + Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
= =0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D + @par Glossary:=0D + - Hart - Hardware Thread, similar to a CPU core=0D +=0D + Currently, EDK2 needs to call SBI only to set the time and to do system = reset.=0D +=0D +**/=0D +=0D +#ifndef RISCV_SBI_LIB_H_=0D +#define RISCV_SBI_LIB_H_=0D +=0D +#include =0D +=0D +/* SBI Extension IDs */=0D +#define SBI_EXT_TIME 0x54494D45=0D +#define SBI_EXT_SRST 0x53525354=0D +=0D +/* SBI function IDs for TIME extension*/=0D +#define SBI_EXT_TIME_SET_TIMER 0x0=0D +=0D +/* SBI function IDs for SRST extension */=0D +#define SBI_EXT_SRST_RESET 0x0=0D +=0D +#define SBI_SRST_RESET_TYPE_SHUTDOWN 0x0=0D +#define SBI_SRST_RESET_TYPE_COLD_REBOOT 0x1=0D +#define SBI_SRST_RESET_TYPE_WARM_REBOOT 0x2=0D +#define SBI_SRST_RESET_TYPE_LAST SBI_SRST_RESET_TYPE_WARM_REBOOT=0D +=0D +#define SBI_SRST_RESET_REASON_NONE 0x0=0D +#define SBI_SRST_RESET_REASON_SYSFAIL 0x1=0D +=0D +/* SBI return error codes */=0D +#define SBI_SUCCESS 0=0D +#define SBI_ERR_FAILED -1=0D +#define SBI_ERR_NOT_SUPPORTED -2=0D +#define SBI_ERR_INVALID_PARAM -3=0D +#define SBI_ERR_DENIED -4=0D +#define SBI_ERR_INVALID_ADDRESS -5=0D +#define SBI_ERR_ALREADY_AVAILABLE -6=0D +#define SBI_ERR_ALREADY_STARTED -7=0D +#define SBI_ERR_ALREADY_STOPPED -8=0D +=0D +#define SBI_LAST_ERR SBI_ERR_ALREADY_STOPPED=0D +=0D +typedef struct {=0D + UINT64 BootHartId;=0D + VOID *PeiServiceTable; // PEI Service table=0D + UINT64 FlattenedDeviceTree; // Pointer to Flattened Device tree=0D +} EFI_RISCV_FIRMWARE_CONTEXT;=0D +=0D +=0D +//=0D +// EDK2 OpenSBI firmware extension return status.=0D +//=0D +typedef struct {=0D + UINTN Error; ///< SBI status code=0D + UINTN Value; ///< Value returned=0D +} SBI_RET;=0D +=0D +VOID=0D +EFIAPI=0D +SbiSetTimer (=0D + IN UINT64 Time=0D + );=0D +=0D +EFI_STATUS=0D +EFIAPI=0D +SbiSystemReset (=0D + IN UINTN ResetType,=0D + IN UINTN ResetReason=0D + );=0D +=0D +/**=0D + Get firmware context of the calling hart.=0D +=0D + @param[out] FirmwareContext The firmware context pointer.=0D +**/=0D +VOID=0D +EFIAPI=0D +GetFirmwareContext (=0D + OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContext=0D + );=0D +=0D +/**=0D + Set firmware context of the calling hart.=0D +=0D + @param[in] FirmwareContext The firmware context pointer.=0D +**/=0D +VOID=0D +EFIAPI=0D +SetFirmwareContext (=0D + IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext=0D + );=0D +=0D +/**=0D + Get pointer to OpenSBI Firmware Context=0D +=0D + Get the pointer of firmware context.=0D +=0D + @param FirmwareContextPtr Pointer to retrieve pointer to the=0D + Firmware Context.=0D +**/=0D +VOID=0D +EFIAPI=0D +GetFirmwareContextPointer (=0D + IN OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContextPtr=0D + );=0D +=0D +/**=0D + Set pointer to OpenSBI Firmware Context=0D +=0D + Set the pointer of firmware context.=0D +=0D + @param FirmwareContextPtr Pointer to Firmware Context.=0D +**/=0D +VOID=0D +EFIAPI=0D +SetFirmwareContextPointer (=0D + IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContextPtr=0D + );=0D +=0D +#endif=0D diff --git a/MdePkg/Library/RiscVSbiLib/RiscVSbiLib.c b/MdePkg/Library/Risc= VSbiLib/RiscVSbiLib.c new file mode 100644 index 000000000000..39cc6628be6c --- /dev/null +++ b/MdePkg/Library/RiscVSbiLib/RiscVSbiLib.c @@ -0,0 +1,228 @@ +/** @file=0D + Instance of the SBI ecall library.=0D +=0D + It allows calling an SBI function via an ecall from S-Mode.=0D +=0D + Copyright (c) 2021-2022, Hewlett Packard Development LP. All rights rese= rved.
=0D + Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
= =0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +=0D +#include =0D +#include =0D +#include =0D +#include =0D +=0D +//=0D +// Maximum arguments for SBI ecall=0D +// It's possible to pass more but no SBI call uses more as of SBI 0.2.=0D +// The additional arguments would have to be passed on the stack instead o= f as=0D +// registers, like it's done now.=0D +//=0D +#define SBI_CALL_MAX_ARGS 6=0D +=0D +/**=0D + Call SBI call using ecall instruction.=0D +=0D + Asserts when NumArgs exceeds SBI_CALL_MAX_ARGS.=0D +=0D + @param[in] ExtId SBI extension ID.=0D + @param[in] FuncId SBI function ID.=0D + @param[in] NumArgs Number of arguments to pass to the ecall.=0D + @param[in] ... Argument list for the ecall.=0D +=0D + @retval Returns SBI_RET structure with value and error code.=0D +=0D +**/=0D +STATIC=0D +SBI_RET=0D +EFIAPI=0D +SbiCall (=0D + IN UINTN ExtId,=0D + IN UINTN FuncId,=0D + IN UINTN NumArgs,=0D + ...=0D + )=0D +{=0D + UINTN I;=0D + SBI_RET Ret;=0D + UINTN Args[SBI_CALL_MAX_ARGS];=0D + VA_LIST ArgList;=0D +=0D + VA_START (ArgList, NumArgs);=0D +=0D + ASSERT (NumArgs <=3D SBI_CALL_MAX_ARGS);=0D +=0D + for (I =3D 0; I < SBI_CALL_MAX_ARGS; I++) {=0D + if (I < NumArgs) {=0D + Args[I] =3D VA_ARG (ArgList, UINTN);=0D + } else {=0D + // Default to 0 for all arguments that are not given=0D + Args[I] =3D 0;=0D + }=0D + }=0D +=0D + VA_END (ArgList);=0D +=0D + register UINTN a0 asm ("a0") =3D Args[0];=0D + register UINTN a1 asm ("a1") =3D Args[1];=0D + register UINTN a2 asm ("a2") =3D Args[2];=0D + register UINTN a3 asm ("a3") =3D Args[3];=0D + register UINTN a4 asm ("a4") =3D Args[4];=0D + register UINTN a5 asm ("a5") =3D Args[5];=0D + register UINTN a6 asm ("a6") =3D (UINTN)(FuncId);=0D + register UINTN a7 asm ("a7") =3D (UINTN)(ExtId);=0D +=0D + asm volatile ("ecall" \=0D + : "+r" (a0), "+r" (a1) \=0D + : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7) \=0D + : "memory"); \=0D + Ret.Error =3D a0;=0D + Ret.Value =3D a1;=0D + return Ret;=0D +}=0D +=0D +/**=0D + Translate SBI error code to EFI status.=0D +=0D + @param[in] SbiError SBI error code=0D + @retval EFI_STATUS=0D +**/=0D +STATIC=0D +EFI_STATUS=0D +EFIAPI=0D +TranslateError (=0D + IN UINTN SbiError=0D + )=0D +{=0D + switch (SbiError) {=0D + case SBI_SUCCESS:=0D + return EFI_SUCCESS;=0D + case SBI_ERR_FAILED:=0D + return EFI_DEVICE_ERROR;=0D + break;=0D + case SBI_ERR_NOT_SUPPORTED:=0D + return EFI_UNSUPPORTED;=0D + break;=0D + case SBI_ERR_INVALID_PARAM:=0D + return EFI_INVALID_PARAMETER;=0D + break;=0D + case SBI_ERR_DENIED:=0D + return EFI_ACCESS_DENIED;=0D + break;=0D + case SBI_ERR_INVALID_ADDRESS:=0D + return EFI_LOAD_ERROR;=0D + break;=0D + case SBI_ERR_ALREADY_AVAILABLE:=0D + return EFI_ALREADY_STARTED;=0D + break;=0D + default:=0D + //=0D + // Reaches here only if SBI has defined a new error type=0D + //=0D + ASSERT (FALSE);=0D + return EFI_UNSUPPORTED;=0D + break;=0D + }=0D +}=0D +=0D +/**=0D + Clear pending timer interrupt bit and set timer for next event after Tim= e.=0D +=0D + To clear the timer without scheduling a timer event, set Time to a=0D + practically infinite value or mask the timer interrupt by clearing sie.S= TIE.=0D +=0D + @param[in] Time The time offset to the next scheduled t= imer interrupt.=0D +**/=0D +VOID=0D +EFIAPI=0D +SbiSetTimer (=0D + IN UINT64 Time=0D + )=0D +{=0D + SbiCall (SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, 1, Time);=0D +}=0D +=0D +EFI_STATUS=0D +EFIAPI=0D +SbiSystemReset (=0D + IN UINTN ResetType,=0D + IN UINTN ResetReason=0D + )=0D +{=0D + SBI_RET Ret;=0D +=0D + Ret =3D SbiCall (=0D + SBI_EXT_SRST,=0D + SBI_EXT_SRST_RESET,=0D + 2,=0D + ResetType,=0D + ResetReason=0D + );=0D +=0D + return TranslateError (Ret.Error);=0D +}=0D +=0D +/**=0D + Get firmware context of the calling hart.=0D +=0D + @param[out] FirmwareContext The firmware context pointer.=0D + @retval EFI_SUCCESS The operation succeeds.=0D +**/=0D +VOID=0D +EFIAPI=0D +GetFirmwareContext (=0D + OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContext=0D + )=0D +{=0D + *FirmwareContext =3D (EFI_RISCV_FIRMWARE_CONTEXT *)csr_read(CSR_SSCRATCH= );=0D +}=0D +=0D +/**=0D + Set firmware context of the calling hart.=0D +=0D + @param[in] FirmwareContext The firmware context pointer.=0D +**/=0D +VOID=0D +EFIAPI=0D +SetFirmwareContext (=0D + IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContext=0D + )=0D +{=0D + csr_write(CSR_SSCRATCH, FirmwareContext);=0D +}=0D +=0D +/**=0D + Get pointer to OpenSBI Firmware Context=0D +=0D + Get the pointer of firmware context through OpenSBI FW Extension SBI.=0D +=0D + @param FirmwareContextPtr Pointer to retrieve pointer to the=0D + Firmware Context.=0D +**/=0D +VOID=0D +EFIAPI=0D +GetFirmwareContextPointer (=0D + IN OUT EFI_RISCV_FIRMWARE_CONTEXT **FirmwareContextPtr=0D + )=0D +{=0D + GetFirmwareContext (FirmwareContextPtr);=0D +}=0D +=0D +/**=0D + Set the pointer to OpenSBI Firmware Context=0D +=0D + Set the pointer of firmware context through OpenSBI FW Extension SBI.=0D +=0D + @param FirmwareContextPtr Pointer to Firmware Context.=0D +**/=0D +VOID=0D +EFIAPI=0D +SetFirmwareContextPointer (=0D + IN EFI_RISCV_FIRMWARE_CONTEXT *FirmwareContextPtr=0D + )=0D +{=0D + SetFirmwareContext (FirmwareContextPtr);=0D +}=0D --=20 2.25.1