From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web10.1700.1662612726338243909 for ; Wed, 07 Sep 2022 21:52:06 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from code-server.gen (unknown [10.2.9.245]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cx72v0dBljdygUAA--.13279S2; Thu, 08 Sep 2022 12:52:04 +0800 (CST) From: "Chao Li" To: devel@edk2.groups.io Cc: Michael D Kinney , Liming Gao , Zhiguang Liu Subject: [PATCH v1 27/34] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation. Date: Thu, 8 Sep 2022 12:52:04 +0800 Message-Id: <20220908045204.1192051-1-lichao@loongson.cn> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cx72v0dBljdygUAA--.13279S2 X-Coremail-Antispam: 1UD129KBjvJXoWxGrW8ZrW8Jr4Uur47Jr1fJFb_yoWrKw47pr n3GwsxGw17JrWxXrZxG3WUJrs8G3WkGr9rJFsYyrn7ZF4DAw1kCw17tw18GFy5Aryj93yv gr4YgwnxuF4kAF7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkIb7Iv0xC_Zr1lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIE14v26r4UJVWxJr1l84ACjc xK6I8E87Iv6xkF7I0E14v26rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVAC Y4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv67AKxVW8JV WxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41lc2xSY4AK6svPMxAIw28I cxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2 IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI 42IY6xIIjxv20xvE14v26ryj6F1UMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8Jr0_Cr1UMI IF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E 87Iv6xkF7I0E14v26r4UJVWxJrUvcSsGvfC2KfnxnUUI43ZEXa7IU0eBT5UUUUU== X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQADCGMYidshUQA3sk Content-Transfer-Encoding: quoted-printable Implement LoongArch CPU related functions in BaseCpuLib. Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Signed-off-by: Chao Li --- MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++++++- MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++-- MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15 +++++++++++++++ MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S | 15 +++++++++++++++ 4 files changed, 39 insertions(+), 3 deletions(-) create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/Base= CpuLib/BaseCpuLib.inf index c4cd29a783..6b230f6e6d 100644 --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf @@ -8,6 +8,7 @@ # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= =0D # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
=0D # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. A= ll rights reserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -25,7 +26,7 @@ =0D =0D #=0D -# VALID_ARCHITECTURES =3D IA32 X64 EBC ARM AARCH64 RISCV64=0D +# VALID_ARCHITECTURES =3D IA32 X64 EBC ARM AARCH64 RISCV64 LOON= GARCH64=0D #=0D =0D [Sources.IA32]=0D @@ -61,6 +62,10 @@ [Sources.RISCV64]=0D RiscV/Cpu.S=0D =0D +[Sources.LOONGARCH64]=0D + LoongArch/CpuFlushTlb.S | GCC=0D + LoongArch/CpuSleep.S | GCC=0D +=0D [Packages]=0D MdePkg/MdePkg.dec=0D =0D diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni b/MdePkg/Library/Base= CpuLib/BaseCpuLib.uni index 80dc495786..7c5c8dfb37 100644 --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni @@ -1,13 +1,14 @@ // /** @file=0D // Instance of CPU Library for various architecture.=0D //=0D -// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,= =0D +// CPU Library implemented using ASM functions for IA-32, X64, RISCV64 and= LoongArch64,=0D // PAL CALLs for IPF, and empty functions for EBC.=0D //=0D // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
= =0D // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= =0D // Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
=0D // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
=0D +// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. A= ll rights reserved.
=0D //=0D // SPDX-License-Identifier: BSD-2-Clause-Patent=0D //=0D @@ -16,5 +17,5 @@ =0D #string STR_MODULE_ABSTRACT #language en-US "Instance of CPU L= ibrary for various architectures"=0D =0D -#string STR_MODULE_DESCRIPTION #language en-US "CPU Library imple= mented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for IPF, a= nd empty functions for EBC."=0D +#string STR_MODULE_DESCRIPTION #language en-US "CPU Library imple= mented using ASM functions for IA-32, X64, RISCV64 and LoongArch64, PAL CAL= Ls for IPF, and empty functions for EBC."=0D =0D diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S b/MdePkg/Lib= rary/BaseCpuLib/LoongArch/CpuFlushTlb.S new file mode 100644 index 0000000000..8b792f0a37 --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S @@ -0,0 +1,15 @@ +#-------------------------------------------------------------------------= -----=0D +#=0D +# CpuFlushTlb() for LoongArch64=0D +#=0D +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#-------------------------------------------------------------------------= -----=0D +ASM_GLOBAL ASM_PFX(CpuFlushTlb)=0D +=0D +ASM_PFX(CpuFlushTlb):=0D + tlbflush=0D + jirl $zero, $ra, 0=0D + .end=0D diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S b/MdePkg/Librar= y/BaseCpuLib/LoongArch/CpuSleep.S new file mode 100644 index 0000000000..eb31b10714 --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S @@ -0,0 +1,15 @@ +#-------------------------------------------------------------------------= -----=0D +#=0D +# CpuSleep() for LoongArch64=0D +#=0D +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#-------------------------------------------------------------------------= -----=0D +ASM_GLOBAL ASM_PFX(CpuSleep)=0D +=0D +ASM_PFX(CpuSleep):=0D + idle 0=0D + jirl $zero, $ra, 0=0D + .end=0D --=20 2.27.0