From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web12.4307.1663148473775308264 for ; Wed, 14 Sep 2022 02:41:14 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from code-server.gen (unknown [10.2.9.245]) by localhost.localdomain (Coremail) with SMTP id AQAAf8AxFeK3oSFjKgEZAA--.32817S2; Wed, 14 Sep 2022 17:41:11 +0800 (CST) From: "Chao Li" To: devel@edk2.groups.io Cc: Michael D Kinney , Liming Gao , Zhiguang Liu , Baoqi Zhang Subject: [PATCH v2 23/34] MdePkg/BaseLib: BaseLib for LOONGARCH64 architecture. Date: Wed, 14 Sep 2022 17:41:11 +0800 Message-Id: <20220914094111.3696725-1-lichao@loongson.cn> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8AxFeK3oSFjKgEZAA--.32817S2 X-Coremail-Antispam: 1UD129KBjvAXoWfGw4kWr1xGFy5Gw45ZrWfAFb_yoW8Wry5Jo WUZr97uw4UAr18ArykZrsxJw12qr1xWF45Jr40gFy8GF45t3WDGr4DJw18Gw13GF98GFn8 G34UJws7ta9rtr18n29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUY87k0a2IF6w4kM7kC6x804xWl14x267AKxVWUJVW8JwAFc2x0 x2IEx4CE42xK8VAvwI8IcIk0rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj4 1l84x0c7CEw4AK67xGY2AK021l84ACjcxK6xIIjxv20xvE14v26F1j6w1UM28EF7xvwVC0 I7IYx2IY6xkF7I0E14v26r4UJVWxJr1l84ACjcxK6I8E87Iv67AKxVWxJr0_GcWl84ACjc xK6I8E87Iv6xkF7I0E14v26rxl6s0DM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVAC Y4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv67AKxVW8JV WxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41lc2xSY4AK6svPMxAIw28I cxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2 IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI 42IY6xIIjxv20xvE14v26ryj6F1UMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8Jr0_Cr1UMI IF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E 87Iv6xkF7I0E14v26r4UJVWxJrUvcSsGvfC2KfnxnUUI43ZEXa7IU5AR67UUUUU== X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAJCGMgctwUuAAtss Content-Transfer-Encoding: quoted-printable REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4053 Add LoongArch LOONGARCH64 BaseLib functions. Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Signed-off-by: Chao Li Co-authored-by: Baoqi Zhang --- MdePkg/Include/Library/BaseLib.h | 24 ++++++++ MdePkg/Library/BaseLib/BaseLib.inf | 16 ++++- MdePkg/Library/BaseLib/LoongArch64/Barrier.S | 28 +++++++++ .../BaseLib/LoongArch64/CpuBreakpoint.S | 24 ++++++++ MdePkg/Library/BaseLib/LoongArch64/CpuPause.S | 31 ++++++++++ .../BaseLib/LoongArch64/DisableInterrupts.S | 21 +++++++ .../BaseLib/LoongArch64/EnableInterrupts.S | 21 +++++++ .../BaseLib/LoongArch64/GetInterruptState.S | 35 +++++++++++ .../BaseLib/LoongArch64/InternalSwitchStack.c | 58 +++++++++++++++++++ .../Library/BaseLib/LoongArch64/MemoryFence.S | 18 ++++++ .../BaseLib/LoongArch64/SetJumpLongJump.S | 49 ++++++++++++++++ .../Library/BaseLib/LoongArch64/SwitchStack.S | 39 +++++++++++++ 12 files changed, 363 insertions(+), 1 deletion(-) create mode 100644 MdePkg/Library/BaseLib/LoongArch64/Barrier.S create mode 100644 MdePkg/Library/BaseLib/LoongArch64/CpuBreakpoint.S create mode 100644 MdePkg/Library/BaseLib/LoongArch64/CpuPause.S create mode 100644 MdePkg/Library/BaseLib/LoongArch64/DisableInterrupts.S create mode 100644 MdePkg/Library/BaseLib/LoongArch64/EnableInterrupts.S create mode 100644 MdePkg/Library/BaseLib/LoongArch64/GetInterruptState.S create mode 100644 MdePkg/Library/BaseLib/LoongArch64/InternalSwitchStack.c create mode 100644 MdePkg/Library/BaseLib/LoongArch64/MemoryFence.S create mode 100644 MdePkg/Library/BaseLib/LoongArch64/SetJumpLongJump.S create mode 100644 MdePkg/Library/BaseLib/LoongArch64/SwitchStack.S diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/Base= Lib.h index a6f9a194ef..f3f59f21c2 100644 --- a/MdePkg/Include/Library/BaseLib.h +++ b/MdePkg/Include/Library/BaseLib.h @@ -6,6 +6,7 @@ Copyright (c) 2006 - 2021, Intel Corporation. All rights re= served.
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
=0D Copyright (c) Microsoft Corporation.
=0D Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. Al= l rights reserved.
=0D +Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All = rights reserved.
=0D =0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D @@ -152,6 +153,29 @@ typedef struct { =0D #endif // defined (MDE_CPU_RISCV64)=0D =0D +#if defined (MDE_CPU_LOONGARCH64)=0D +///=0D +/// The LoongArch architecture context buffer used by SetJump() and LongJu= mp()=0D +///=0D +typedef struct {=0D + UINT64 S0;=0D + UINT64 S1;=0D + UINT64 S2;=0D + UINT64 S3;=0D + UINT64 S4;=0D + UINT64 S5;=0D + UINT64 S6;=0D + UINT64 S7;=0D + UINT64 S8;=0D + UINT64 SP;=0D + UINT64 FP;=0D + UINT64 RA;=0D +} BASE_LIBRARY_JUMP_BUFFER;=0D +=0D +#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8=0D +=0D +#endif // defined (MDE_CPU_LOONGARCH64)=0D +=0D //=0D // String Services=0D //=0D diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/Ba= seLib.inf index 6be5be9428..9ed46a584a 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -21,7 +21,7 @@ LIBRARY_CLASS =3D BaseLib=0D =0D #=0D -# VALID_ARCHITECTURES =3D IA32 X64 EBC ARM AARCH64 RISCV64=0D +# VALID_ARCHITECTURES =3D IA32 X64 EBC ARM AARCH64 RISCV64 LOON= GARCH64=0D #=0D =0D [Sources]=0D @@ -402,6 +402,20 @@ RiscV64/RiscVInterrupt.S | GCC=0D RiscV64/FlushCache.S | GCC=0D =0D +[Sources.LOONGARCH64]=0D + Math64.c=0D + Unaligned.c=0D + LoongArch64/InternalSwitchStack.c=0D + LoongArch64/GetInterruptState.S | GCC=0D + LoongArch64/EnableInterrupts.S | GCC=0D + LoongArch64/DisableInterrupts.S | GCC=0D + LoongArch64/Barrier.S | GCC=0D + LoongArch64/MemoryFence.S | GCC=0D + LoongArch64/CpuBreakpoint.S | GCC=0D + LoongArch64/CpuPause.S | GCC=0D + LoongArch64/SetJumpLongJump.S | GCC=0D + LoongArch64/SwitchStack.S | GCC=0D +=0D [Packages]=0D MdePkg/MdePkg.dec=0D =0D diff --git a/MdePkg/Library/BaseLib/LoongArch64/Barrier.S b/MdePkg/Library/= BaseLib/LoongArch64/Barrier.S new file mode 100644 index 0000000000..58f21ad725 --- /dev/null +++ b/MdePkg/Library/BaseLib/LoongArch64/Barrier.S @@ -0,0 +1,28 @@ +#-------------------------------------------------------------------------= ----- +# +# LoongArch Barrier Operations +# +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#-------------------------------------------------------------------------= ----- + +ASM_GLOBAL ASM_PFX(AsmDataBarrierLoongArch) +ASM_GLOBAL ASM_PFX(AsmInstructionBarrierLoongArch) + +# +# Data barrier operation for LoongArch. +# +ASM_PFX(AsmDataBarrierLoongArch): + dbar 0 + jirl $zero, $ra, 0 + +# +# Instruction barrier operation for LoongArch. +# +ASM_PFX(AsmInstructionBarrierLoongArch): + ibar 0 + jirl $zero, $ra, 0 + + .end diff --git a/MdePkg/Library/BaseLib/LoongArch64/CpuBreakpoint.S b/MdePkg/Li= brary/BaseLib/LoongArch64/CpuBreakpoint.S new file mode 100644 index 0000000000..4e022e9bb5 --- /dev/null +++ b/MdePkg/Library/BaseLib/LoongArch64/CpuBreakpoint.S @@ -0,0 +1,24 @@ +#-------------------------------------------------------------------------= -----=0D +#=0D +# CpuBreakpoint for LoongArch=0D +#=0D +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#-------------------------------------------------------------------------= -----=0D +=0D +ASM_GLOBAL ASM_PFX(CpuBreakpoint)=0D +=0D +#/**=0D +# Generates a breakpoint on the CPU.=0D +#=0D +# Generates a breakpoint on the CPU. The breakpoint must be implemented s= uch=0D +# that code can resume normal execution after the breakpoint.=0D +#=0D +#**/=0D +=0D +ASM_PFX(CpuBreakpoint):=0D + break 3=0D + jirl $zero, $ra, 0=0D + .end=0D diff --git a/MdePkg/Library/BaseLib/LoongArch64/CpuPause.S b/MdePkg/Library= /BaseLib/LoongArch64/CpuPause.S new file mode 100644 index 0000000000..e9140e8742 --- /dev/null +++ b/MdePkg/Library/BaseLib/LoongArch64/CpuPause.S @@ -0,0 +1,31 @@ +#-------------------------------------------------------------------------= -----=0D +#=0D +# CpuPause for LoongArch=0D +#=0D +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#-------------------------------------------------------------------------= -----=0D +=0D +ASM_GLOBAL ASM_PFX(CpuPause)=0D +=0D +#/**=0D +# Requests CPU to pause for a short period of time.=0D +#=0D +# Requests CPU to pause for a short period of time. Typically used in MP= =0D +# systems to prevent memory starvation while waiting for a spin lock.=0D +#=0D +#**/=0D +=0D +ASM_PFX(CpuPause):=0D + nop=0D + nop=0D + nop=0D + nop=0D + nop=0D + nop=0D + nop=0D + nop=0D + jirl $zero, $ra, 0=0D + .end=0D diff --git a/MdePkg/Library/BaseLib/LoongArch64/DisableInterrupts.S b/MdePk= g/Library/BaseLib/LoongArch64/DisableInterrupts.S new file mode 100644 index 0000000000..0f228339af --- /dev/null +++ b/MdePkg/Library/BaseLib/LoongArch64/DisableInterrupts.S @@ -0,0 +1,21 @@ +#-------------------------------------------------------------------------= -----=0D +#=0D +# LoongArch interrupt disable=0D +#=0D +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#-------------------------------------------------------------------------= -----=0D +=0D +ASM_GLOBAL ASM_PFX(DisableInterrupts)=0D +=0D +#/**=0D +# Disables CPU interrupts.=0D +#**/=0D +=0D +ASM_PFX(DisableInterrupts):=0D + li.w $t0, 0x4=0D + csrxchg $zero, $t0, 0x0=0D + jirl $zero, $ra, 0=0D + .end=0D diff --git a/MdePkg/Library/BaseLib/LoongArch64/EnableInterrupts.S b/MdePkg= /Library/BaseLib/LoongArch64/EnableInterrupts.S new file mode 100644 index 0000000000..3c34fb2cdd --- /dev/null +++ b/MdePkg/Library/BaseLib/LoongArch64/EnableInterrupts.S @@ -0,0 +1,21 @@ +#-------------------------------------------------------------------------= -----=0D +#=0D +# LoongArch interrupt enable=0D +#=0D +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#-------------------------------------------------------------------------= -----=0D +=0D +ASM_GLOBAL ASM_PFX(EnableInterrupts)=0D +=0D +#/**=0D +# Enables CPU interrupts.=0D +#**/=0D +=0D +ASM_PFX(EnableInterrupts):=0D + li.w $t0, 0x4=0D + csrxchg $t0, $t0, 0x0=0D + jirl $zero, $ra, 0=0D + .end=0D diff --git a/MdePkg/Library/BaseLib/LoongArch64/GetInterruptState.S b/MdePk= g/Library/BaseLib/LoongArch64/GetInterruptState.S new file mode 100644 index 0000000000..bfd1f2d5f7 --- /dev/null +++ b/MdePkg/Library/BaseLib/LoongArch64/GetInterruptState.S @@ -0,0 +1,35 @@ +#-------------------------------------------------------------------------= -----=0D +#=0D +# Get LoongArch interrupt status=0D +#=0D +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#-------------------------------------------------------------------------= -----=0D +=0D +ASM_GLOBAL ASM_PFX(GetInterruptState)=0D +=0D +#/**=0D +# Retrieves the current CPU interrupt state.=0D +#=0D +# Returns TRUE means interrupts are currently enabled. Otherwise,=0D +# returns FALSE.=0D +#=0D +# @retval TRUE CPU interrupts are enabled.=0D +# @retval FALSE CPU interrupts are disabled.=0D +#=0D +#**/=0D +=0D +ASM_PFX(GetInterruptState):=0D + li.w $t1, 0x4=0D + csrrd $t0, 0x0=0D + and $t0, $t0, $t1=0D + beqz $t0, 1f=0D + li.w $a0, 0x1=0D + b 2f=0D +1:=0D + li.w $a0, 0x0=0D +2:=0D + jirl $zero, $ra, 0=0D + .end=0D diff --git a/MdePkg/Library/BaseLib/LoongArch64/InternalSwitchStack.c b/Mde= Pkg/Library/BaseLib/LoongArch64/InternalSwitchStack.c new file mode 100644 index 0000000000..859bc96329 --- /dev/null +++ b/MdePkg/Library/BaseLib/LoongArch64/InternalSwitchStack.c @@ -0,0 +1,58 @@ +/** @file=0D + SwitchStack() function for LoongArch.=0D +=0D + Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +**/=0D +=0D +#include "BaseLibInternals.h"=0D +=0D +UINTN=0D +EFIAPI=0D +InternalSwitchStackAsm (=0D + IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer=0D + );=0D +=0D +/**=0D + Transfers control to a function starting with a new stack.=0D +=0D + Transfers control to the function specified by EntryPoint using the=0D + new stack specified by NewStack and passing in the parameters specified= =0D + by Context1 and Context2. Context1 and Context2 are optional and may=0D + be NULL. The function EntryPoint must never return.=0D +=0D + If EntryPoint is NULL, then ASSERT().=0D + If NewStack is NULL, then ASSERT().=0D +=0D + @param[in] EntryPoint A pointer to function to call with the new stack= .=0D + @param[in] Context1 A pointer to the context to pass into the EntryP= oint=0D + function.=0D + @param[in] Context2 A pointer to the context to pass into the EntryP= oint=0D + function.=0D + @param[in] NewStack A pointer to the new stack to use for the EntryP= oint=0D + function.=0D + @param[in] Marker VA_LIST marker for the variable argument list.=0D +=0D +**/=0D +VOID=0D +EFIAPI=0D +InternalSwitchStack (=0D + IN SWITCH_STACK_ENTRY_POINT EntryPoint,=0D + IN VOID *Context1 OPTIONAL,=0D + IN VOID *Context2 OPTIONAL,=0D + IN VOID *NewStack,=0D + IN VA_LIST Marker=0D + )=0D +=0D +{=0D + BASE_LIBRARY_JUMP_BUFFER JumpBuffer;=0D +=0D + JumpBuffer.RA =3D (UINTN)EntryPoint;=0D + JumpBuffer.SP =3D (UINTN)NewStack - sizeof (VOID *)= ;=0D + JumpBuffer.SP -=3D sizeof (Context1) + sizeof (Conte= xt2);=0D + ((VOID **)(UINTN)JumpBuffer.SP)[0] =3D Context1;=0D + ((VOID **)(UINTN)JumpBuffer.SP)[1] =3D Context2;=0D +=0D + InternalSwitchStackAsm (&JumpBuffer);=0D +}=0D diff --git a/MdePkg/Library/BaseLib/LoongArch64/MemoryFence.S b/MdePkg/Libr= ary/BaseLib/LoongArch64/MemoryFence.S new file mode 100644 index 0000000000..2b3d34366f --- /dev/null +++ b/MdePkg/Library/BaseLib/LoongArch64/MemoryFence.S @@ -0,0 +1,18 @@ +#-------------------------------------------------------------------------= -----=0D +#=0D +# MemoryFence() for LoongArch=0D +#=0D +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#-------------------------------------------------------------------------= -----=0D +=0D +ASM_GLOBAL ASM_PFX(MemoryFence)=0D +=0D +#=0D +# Memory fence for LoongArch=0D +#=0D +ASM_PFX(MemoryFence):=0D + b AsmDataBarrierLoongArch=0D + .end=0D diff --git a/MdePkg/Library/BaseLib/LoongArch64/SetJumpLongJump.S b/MdePkg/= Library/BaseLib/LoongArch64/SetJumpLongJump.S new file mode 100644 index 0000000000..1c6ee54b6f --- /dev/null +++ b/MdePkg/Library/BaseLib/LoongArch64/SetJumpLongJump.S @@ -0,0 +1,49 @@ +#-------------------------------------------------------------------------= -----=0D +#=0D +# Set/Long jump for LoongArch=0D +#=0D +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#-------------------------------------------------------------------------= -----=0D +=0D +#define STORE st.d /* 64 bit mode regsave instruction */=0D +#define LOAD ld.d /* 64 bit mode regload instruction */=0D +#define RSIZE 8 /* 64 bit mode register size */=0D +=0D +ASM_GLOBAL ASM_PFX(SetJump)=0D +ASM_GLOBAL ASM_PFX(InternalLongJump)=0D +=0D +ASM_PFX(SetJump):=0D + STORE $s0, $a0, RSIZE * 0=0D + STORE $s1, $a0, RSIZE * 1=0D + STORE $s2, $a0, RSIZE * 2=0D + STORE $s3, $a0, RSIZE * 3=0D + STORE $s4, $a0, RSIZE * 4=0D + STORE $s5, $a0, RSIZE * 5=0D + STORE $s6, $a0, RSIZE * 6=0D + STORE $s7, $a0, RSIZE * 7=0D + STORE $s8, $a0, RSIZE * 8=0D + STORE $sp, $a0, RSIZE * 9=0D + STORE $fp, $a0, RSIZE * 10=0D + STORE $ra, $a0, RSIZE * 11=0D + li.w $a0, 0 # Setjmp return=0D + jirl $zero, $ra, 0=0D +=0D +ASM_PFX(InternalLongJump):=0D + LOAD $ra, $a0, RSIZE * 11=0D + LOAD $s0, $a0, RSIZE * 0=0D + LOAD $s1, $a0, RSIZE * 1=0D + LOAD $s2, $a0, RSIZE * 2=0D + LOAD $s3, $a0, RSIZE * 3=0D + LOAD $s4, $a0, RSIZE * 4=0D + LOAD $s5, $a0, RSIZE * 5=0D + LOAD $s6, $a0, RSIZE * 6=0D + LOAD $s7, $a0, RSIZE * 7=0D + LOAD $s8, $a0, RSIZE * 8=0D + LOAD $sp, $a0, RSIZE * 9=0D + LOAD $fp, $a0, RSIZE * 10=0D + move $a0, $a1=0D + jirl $zero, $ra, 0=0D + .end=0D diff --git a/MdePkg/Library/BaseLib/LoongArch64/SwitchStack.S b/MdePkg/Libr= ary/BaseLib/LoongArch64/SwitchStack.S new file mode 100644 index 0000000000..ad9aa8b343 --- /dev/null +++ b/MdePkg/Library/BaseLib/LoongArch64/SwitchStack.S @@ -0,0 +1,39 @@ +#-------------------------------------------------------------------------= -----=0D +#=0D +# InternalSwitchStackAsm for LoongArch=0D +#=0D +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#-------------------------------------------------------------------------= -----=0D +=0D +#define STORE st.d /* 64 bit mode regsave instruction */=0D +#define LOAD ld.d /* 64 bit mode regload instruction */=0D +#define RSIZE 8 /* 64 bit mode register size */=0D +=0D +ASM_GLOBAL ASM_PFX(InternalSwitchStackAsm)=0D +=0D +/**=0D + This allows the caller to switch the stack and goes to the new entry poi= nt=0D +=0D + @param JumpBuffer A pointer to CPU context buffer.=0D +**/=0D +=0D +ASM_PFX(InternalSwitchStackAsm):=0D + LOAD $ra, $a0, RSIZE * 11=0D + LOAD $s0, $a0, RSIZE * 0=0D + LOAD $s1, $a0, RSIZE * 1=0D + LOAD $s2, $a0, RSIZE * 2=0D + LOAD $s3, $a0, RSIZE * 3=0D + LOAD $s4, $a0, RSIZE * 4=0D + LOAD $s5, $a0, RSIZE * 5=0D + LOAD $s6, $a0, RSIZE * 6=0D + LOAD $s7, $a0, RSIZE * 7=0D + LOAD $s8, $a0, RSIZE * 8=0D + LOAD $sp, $a0, RSIZE * 9=0D + LOAD $fp, $a0, RSIZE * 10=0D + LOAD $a0, $sp, 0=0D + LOAD $a1, $sp, 8=0D + jirl $zero, $ra, 0=0D + .end=0D --=20 2.27.0