From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web12.4318.1663148552945461917 for ; Wed, 14 Sep 2022 02:42:33 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from code-server.gen (unknown [10.2.9.245]) by localhost.localdomain (Coremail) with SMTP id AQAAf8DxX+AHoiFjkwEZAA--.32149S2; Wed, 14 Sep 2022 17:42:31 +0800 (CST) From: "Chao Li" To: devel@edk2.groups.io Cc: Bob Feng , Liming Gao , Yuwei Chen , Baoqi Zhang Subject: [PATCH v2 34/34] BaseTools: Add LoongArch64 binding. Date: Wed, 14 Sep 2022 17:42:31 +0800 Message-Id: <20220914094231.3700667-1-lichao@loongson.cn> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-CM-TRANSID: AQAAf8DxX+AHoiFjkwEZAA--.32149S2 X-Coremail-Antispam: 1UD129KBjvJXoWxXFW3Xr4UAFyUWF13JFyxKrg_yoW5ur1fpa nI9F4fG3y0grW3CryfKFW5Wr4fGr40kayxtrWav343ArWDGw1xW34agF45GFWUJwsYg34r XF1Yg3W2kasrA3DanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUk2b7Iv0xC_Cr1lb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I2 0VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r1j6r18M28lY4IEw2IIxxk0rw A2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Ar0_tr1l84ACjcxK6xII jxv20xvEc7CjxVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIE14v26F4UJVW0owA2z4x0Y4 vEx4A2jsIEc7CjxVAFwI0_GcCE3s1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xv F2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jw0_WrylYx0Ex4A2jsIE14v26r4j6F 4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCY02Avz4vE-syl42xK82IY c2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s 026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF 0xvE2Ix0cI8IcVAFwI0_Xr0_Ar1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4UJVWxJr1lIx AIcVCF04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2 jsIEc7CjxVAFwI0_Gr1j6F4UJbIYCTnIWIevJa73UjIFyTuYvjxU4hL0UUUUU X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAJCGMgctwUuAA4s5 Content-Transfer-Encoding: quoted-printable REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4053 Add LoongArch64 ProcessorBin.h and add LoongArch to Makefiles. Cc: Bob Feng Cc: Liming Gao Cc: Yuwei Chen Signed-off-by: Chao Li Co-authored-by: Baoqi Zhang --- BaseTools/Source/C/GNUmakefile | 3 + .../C/Include/LoongArch64/ProcessorBind.h | 80 +++++++++++++++++++ 2 files changed, 83 insertions(+) create mode 100644 BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h diff --git a/BaseTools/Source/C/GNUmakefile b/BaseTools/Source/C/GNUmakefile index 8c191e0c38..5275f657ef 100644 --- a/BaseTools/Source/C/GNUmakefile +++ b/BaseTools/Source/C/GNUmakefile @@ -29,6 +29,9 @@ ifndef HOST_ARCH ifneq (,$(findstring riscv64,$(uname_m)))=0D HOST_ARCH=3DRISCV64=0D endif=0D + ifneq (,$(findstring loongarch64,$(uname_m)))=0D + HOST_ARCH=3DLOONGARCH64=0D + endif=0D ifndef HOST_ARCH=0D $(info Could not detected HOST_ARCH from uname results)=0D $(error HOST_ARCH is not defined!)=0D diff --git a/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h b/BaseT= ools/Source/C/Include/LoongArch64/ProcessorBind.h new file mode 100644 index 0000000000..0267859dee --- /dev/null +++ b/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h @@ -0,0 +1,80 @@ +/** @file=0D + Processor or Compiler specific defines and types for LoongArch=0D +=0D + Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +=0D +**/=0D +#ifndef PROCESSOR_BIND_H_=0D +#define PROCESSOR_BIND_H_=0D +=0D +//=0D +// Define the processor type so other code can make processor based choice= s=0D +//=0D +#define MDE_CPU_LOONGARCH64=0D +=0D +#define EFIAPI=0D +=0D +//=0D +// Make sure we are using the correct packing rules per EFI specification= =0D +//=0D +#ifndef __GNUC__=0D +#pragma pack()=0D +#endif=0D +=0D +//=0D +// Use ANSI C 2000 stdint.h integer width declarations=0D +//=0D +#include =0D +typedef uint8_t BOOLEAN;=0D +typedef int8_t INT8;=0D +typedef uint8_t UINT8;=0D +typedef int16_t INT16;=0D +typedef uint16_t UINT16;=0D +typedef int32_t INT32;=0D +typedef uint32_t UINT32;=0D +typedef int64_t INT64;=0D +typedef uint64_t UINT64;=0D +typedef char CHAR8;=0D +typedef uint16_t CHAR16;=0D +=0D +//=0D +// Unsigned value of native width. (4 bytes on supported 32-bit processor= instructions,=0D +// 8 bytes on supported 64-bit processor instructions)=0D +//=0D +typedef UINT64 UINTN;=0D +=0D +//=0D +// Signed value of native width. (4 bytes on supported 32-bit processor i= nstructions,=0D +// 8 bytes on supported 64-bit processor instructions)=0D +//=0D +typedef INT64 INTN;=0D +=0D +//=0D +// Processor specific defines=0D +//=0D +=0D +//=0D +// A value of native width with the highest bit set.=0D +//=0D +#define MAX_BIT 0x8000000000000000ULL=0D +//=0D +// A value of native width with the two highest bits set.=0D +//=0D +#define MAX_2_BITS 0xC000000000000000ULL=0D +=0D +#if defined (__GNUC__)=0D +//=0D +// For GNU assembly code, .global or .globl can declare global symbols.=0D +// Define this macro to unify the usage.=0D +//=0D +#define ASM_GLOBAL .globl=0D +#endif=0D +=0D +//=0D +// The stack alignment required for LoongArch=0D +//=0D +#define CPU_STACK_ALIGNMENT 16=0D +=0D +#endif=0D --=20 2.27.0