From: "Sunil V L" <sunilvl@ventanamicro.com>
To: devel@edk2.groups.io
Cc: Sunil V L <sunilvl@ventanamicro.com>,
Bob Feng <bob.c.feng@intel.com>,
Liming Gao <gaoliming@byosoft.com.cn>,
Yuwei Chen <yuwei.chen@intel.com>
Subject: [PATCH 1/1] BaseTools: Fix RISC-V build failure with binutils 2.38+
Date: Thu, 15 Sep 2022 18:47:31 +0530 [thread overview]
Message-ID: <20220915131731.50958-1-sunilvl@ventanamicro.com> (raw)
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4061
>From version 2.38, binutils adheres to RISC-V ISA spec version
20191213. This means that the csr read/write (csrr*/csrw*)
instructions and fence.i instruction are separated from the
`I` extension, become two standalone extensions: Zicsr and
Zifencei. As the edk2 uses those instructions, this causes the
following build failure:
.../RiscV64/FlushCache.iiii:16: Error: unrecognized opcode `fence.i'
Hence, different -march strings are needed for different versions of
the toolchain. To support both types of the toolchains, detect
the capability of the toolchain while creating tools_def.txt from
the template and update the tools_def.txt with a different -march
string matching the toolchain capabilities.
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
BaseTools/BuildEnv | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/BaseTools/BuildEnv b/BaseTools/BuildEnv
index 275f4c5901aa..08ab28107d89 100755
--- a/BaseTools/BuildEnv
+++ b/BaseTools/BuildEnv
@@ -213,6 +213,26 @@ AddEdkToolsToPath() {
}
+UpdateRiscVToolsDefFile() {
+
+ # binutils 2.38+ needs zicsr_zifencei in -march
+ # To support older toolchain, run gcc with latest -march
+ # and check if it succeeds
+ ${GCC5_RISCV64_PREFIX}gcc -march=rv64imafdc_zicsr_zifencei -x c -c /dev/null \
+ -o $CONF_PATH/TmpZicsrZifencei > /dev/null 2>&1
+ ZicsrZifenceiNeeded=$?
+
+ if [ $ZicsrZifenceiNeeded -eq 0 ]
+ then
+ echo "Updating $CONF_PATH/tools_def.txt"
+ sed -i 's/rv64imafdc/rv64imafdc_zicsr_zifencei/g' $CONF_PATH/tools_def.txt
+
+ # Remove the temporary file
+ rm $CONF_PATH/TmpZicsrZifencei
+ fi
+
+}
+
CopySingleTemplateFile() {
SRC_FILENAME=Conf/$1.template
@@ -228,6 +248,15 @@ CopySingleTemplateFile() {
SRC_FILENAME=$EDK_TOOLS_PATH/$SRC_FILENAME
cp $SRC_FILENAME $DST_FILENAME
+ # Update RISC-V definitions based on toolchain capabilities
+ if [ "$1" = "tools_def" ]
+ then
+ if ! [ -z ${GCC5_RISCV64_PREFIX} ]
+ then
+ UpdateRiscVToolsDefFile
+ fi
+ fi
+
}
CopyTemplateFiles() {
--
2.34.1
reply other threads:[~2022-09-15 13:17 UTC|newest]
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