From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web11.9757.1664277280584332444 for ; Tue, 27 Sep 2022 04:14:41 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from code-server.gen (unknown [10.2.9.245]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cxrmv02jJjirsiAA--.49762S29; Tue, 27 Sep 2022 19:14:39 +0800 (CST) From: "Chao Li" To: devel@edk2.groups.io Cc: Michael D Kinney , Liming Gao , Zhiguang Liu , Baoqi Zhang Subject: [PATCH v3 27/34] MdePkg/BasePeCoff: Add LoongArch PE/Coff related code. Date: Tue, 27 Sep 2022 19:13:47 +0800 Message-Id: <20220927111354.4107719-28-lichao@loongson.cn> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220927111354.4107719-1-lichao@loongson.cn> References: <20220927111354.4107719-1-lichao@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cxrmv02jJjirsiAA--.49762S29 X-Coremail-Antispam: 1UD129KBjvJXoW3GryxCr4xuw13AF4rGF1rJFb_yoWfGryDpa 9rKan8GwnrJw4fArW5K3W3GrsYgFsrWasxCFWq9r48ZFsxXanY9w4UtF15trWUZryDA348 uFsI9r47ua1kJr7anT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UUUUUUUUU== X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQACCGMxll4dbgAosK Content-Transfer-Encoding: quoted-printable REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4053 Add LoongArch image relocation. Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Signed-off-by: Chao Li Co-authored-by: Baoqi Zhang Reviewed-by: Michael D Kinney --- MdePkg/Library/BasePeCoffLib/BasePeCoff.c | 3 +- .../Library/BasePeCoffLib/BasePeCoffLib.inf | 5 + .../Library/BasePeCoffLib/BasePeCoffLib.uni | 2 + .../BasePeCoffLib/LoongArch/PeCoffLoaderEx.c | 137 ++++++++++++++++++ 4 files changed, 146 insertions(+), 1 deletion(-) create mode 100644 MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c b/MdePkg/Library/Bas= ePeCoffLib/BasePeCoff.c index 6d8d9faeb8..97a8aaf8c7 100644 --- a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c @@ -1,6 +1,6 @@ /** @file=0D Base PE/COFF loader supports loading any PE32/PE32+ or TE image, but=0D - only supports relocating IA32, x64, IPF, ARM, RISC-V and EBC images.=0D + only supports relocating IA32, x64, IPF, ARM, RISC-V, LoongArch and EBC = images.=0D =0D Caution: This file requires additional review when modified.=0D This library will have external input - PE/COFF image.=0D @@ -18,6 +18,7 @@ Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
=0D Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= =0D Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. = All rights reserved.
=0D + Portions Copyright (c) 2022, Loongson Technology Corporation Limited. Al= l rights reserved.
=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf b/MdePkg/Librar= y/BasePeCoffLib/BasePeCoffLib.inf index 110b6d5a09..3b8b8eb191 100644 --- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf @@ -4,6 +4,7 @@ # The IA32 version library support loading IA32, X64 and EBC PE/COFF imag= es.=0D # The X64 version library support loading IA32, X64 and EBC PE/COFF image= s.=0D # The RISC-V version library support loading RISC-V images.=0D +# The LoongArch version library support loading LoongArch images.=0D #=0D # Caution: This module requires additional review when modified.=0D # This library will have external input - PE/COFF image.=0D @@ -13,6 +14,7 @@ # Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
= =0D # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= =0D # Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP.= All rights reserved.
=0D +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. A= ll rights reserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D #=0D @@ -46,6 +48,9 @@ [Sources.RISCV64]=0D RiscV/PeCoffLoaderEx.c=0D =0D +[Sources.LOONGARCH64]=0D + LoongArch/PeCoffLoaderEx.c=0D +=0D [Packages]=0D MdePkg/MdePkg.dec=0D =0D diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni b/MdePkg/Librar= y/BasePeCoffLib/BasePeCoffLib.uni index 55417029f2..1f731344e1 100644 --- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni +++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni @@ -5,6 +5,7 @@ // The IA32 version library support loading IA32, X64 and EBC PE/COFF imag= es.=0D // The X64 version library support loading IA32, X64 and EBC PE/COFF image= s.=0D // The RISC-V version library support loading RISC-V32 and RISC-V64 PE/COF= F images.=0D +// The LoongArch version library support loading LoongArch32 and LoongArch= 64 PE/COFF images.=0D //=0D // Caution: This module requires additional review when modified.=0D // This library will have external input - PE/COFF image.=0D @@ -14,6 +15,7 @@ // Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
= =0D // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= =0D // Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP.= All rights reserved.
=0D +// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. A= ll rights reserved.
=0D //=0D // SPDX-License-Identifier: BSD-2-Clause-Patent=0D //=0D diff --git a/MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c b/MdeP= kg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c new file mode 100644 index 0000000000..417096f334 --- /dev/null +++ b/MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c @@ -0,0 +1,137 @@ +/** @file=0D + PE/Coff loader for LoongArch PE image=0D +=0D + Copyright (c) 2022, Loongson Technology Corporation Limited. All rights = reserved.
=0D +=0D + SPDX-License-Identifier: BSD-2-Clause-Patent=0D +**/=0D +=0D +#include "BasePeCoffLibInternals.h"=0D +#include =0D +=0D +/**=0D + Performs an LoongArch specific relocation fixup and is a no-op on other= =0D + instruction sets.=0D +=0D + @param[in] Reloc Pointer to the relocation record.=0D + @param[in, out] Fixup Pointer to the address to fix up.=0D + @param[in, out] FixupData Pointer to a buffer to log the fixups.=0D + @param[in] Adjust The offset to adjust the fixup.=0D +=0D + @return Status code.=0D +=0D +**/=0D +RETURN_STATUS=0D +PeCoffLoaderRelocateImageEx (=0D + IN UINT16 *Reloc,=0D + IN OUT CHAR8 *Fixup,=0D + IN OUT CHAR8 **FixupData,=0D + IN UINT64 Adjust=0D + )=0D +{=0D + UINT8 RelocType;=0D + UINT64 Value;=0D + UINT64 Tmp1;=0D + UINT64 Tmp2;=0D +=0D + RelocType =3D (*Reloc) >> 12;=0D + Value =3D 0;=0D + Tmp1 =3D 0;=0D + Tmp2 =3D 0;=0D +=0D + switch (RelocType) {=0D + case EFI_IMAGE_REL_BASED_LOONGARCH64_MARK_LA:=0D + // The next four instructions are used to load a 64 bit address, rel= ocate all of them=0D + Value =3D (*(UINT32 *)Fixup & 0x1ffffe0) << 7 | // lu12i.w 20b= its from bit5=0D + (*((UINT32 *)Fixup + 1) & 0x3ffc00) >> 10; // ori 12bit= s from bit10=0D + Tmp1 =3D *((UINT32 *)Fixup + 2) & 0x1ffffe0; // lu32i.d 20b= its from bit5=0D + Tmp2 =3D *((UINT32 *)Fixup + 3) & 0x3ffc00; // lu52i.d 12b= its from bit10=0D + Value =3D Value | (Tmp1 << 27) | (Tmp2 << 42);=0D + Value +=3D Adjust;=0D +=0D + *(UINT32 *)Fixup =3D (*(UINT32 *)Fixup & ~0x1ffffe0) | (((Value >> 1= 2) & 0xfffff) << 5);=0D + if (*FixupData !=3D NULL) {=0D + *FixupData =3D ALIGN_POINTER (*FixupData, sizeof (UIN= T32));=0D + *(UINT32 *)(*FixupData) =3D *(UINT32 *)Fixup;=0D + *FixupData =3D *FixupData + sizeof (UINT32);=0D + }=0D +=0D + Fixup +=3D sizeof (UINT32);=0D + *(UINT32 *)Fixup =3D (*(UINT32 *)Fixup & ~0x3ffc00) | ((Value & 0xff= f) << 10);=0D + if (*FixupData !=3D NULL) {=0D + *FixupData =3D ALIGN_POINTER (*FixupData, sizeof (UIN= T32));=0D + *(UINT32 *)(*FixupData) =3D *(UINT32 *)Fixup;=0D + *FixupData =3D *FixupData + sizeof (UINT32);=0D + }=0D +=0D + Fixup +=3D sizeof (UINT32);=0D + *(UINT32 *)Fixup =3D (*(UINT32 *)Fixup & ~0x1ffffe0) | (((Value >> 3= 2) & 0xfffff) << 5);=0D + if (*FixupData !=3D NULL) {=0D + *FixupData =3D ALIGN_POINTER (*FixupData, sizeof (UIN= T32));=0D + *(UINT32 *)(*FixupData) =3D *(UINT32 *)Fixup;=0D + *FixupData =3D *FixupData + sizeof (UINT32);=0D + }=0D +=0D + Fixup +=3D sizeof (UINT32);=0D + *(UINT32 *)Fixup =3D (*(UINT32 *)Fixup & ~0x3ffc00) | (((Value >> 52= ) & 0xfff) << 10);=0D + if (*FixupData !=3D NULL) {=0D + *FixupData =3D ALIGN_POINTER (*FixupData, sizeof (UIN= T32));=0D + *(UINT32 *)(*FixupData) =3D *(UINT32 *)Fixup;=0D + *FixupData =3D *FixupData + sizeof (UINT32);=0D + }=0D +=0D + break;=0D + default:=0D + return RETURN_UNSUPPORTED;=0D + }=0D +=0D + return RETURN_SUCCESS;=0D +}=0D +=0D +/**=0D + Returns TRUE if the machine type of PE/COFF image is supported. Supporte= d=0D + does not mean the image can be executed it means the PE/COFF loader supp= orts=0D + loading and relocating of the image type. It's up to the caller to suppo= rt=0D + the entry point.=0D +=0D + @param[in] Machine Machine type from the PE Header.=0D +=0D + @return TRUE if this PE/COFF loader can load the image=0D +=0D +**/=0D +BOOLEAN=0D +PeCoffLoaderImageFormatSupported (=0D + IN UINT16 Machine=0D + )=0D +{=0D + if (Machine =3D=3D IMAGE_FILE_MACHINE_LOONGARCH64) {=0D + return TRUE;=0D + }=0D +=0D + return FALSE;=0D +}=0D +=0D +/**=0D + Performs an LOONGARCH-based specific re-relocation fixup and is a no-op = on other=0D + instruction sets. This is used to re-relocated the image into the EFI vi= rtual=0D + space for runtime calls.=0D +=0D + @param[in] Reloc The pointer to the relocation record.=0D + @param[in, out] Fixup The pointer to the address to fix up.=0D + @param[in, out] FixupData The pointer to a buffer to log the fixups.= =0D + @param[in] Adjust The offset to adjust the fixup.=0D +=0D + @return Status code.=0D +=0D +**/=0D +RETURN_STATUS=0D +PeHotRelocateImageEx (=0D + IN UINT16 *Reloc,=0D + IN OUT CHAR8 *Fixup,=0D + IN OUT CHAR8 **FixupData,=0D + IN UINT64 Adjust=0D + )=0D +{=0D + // To check=0D + return PeCoffLoaderRelocateImageEx (Reloc, Fixup, FixupData, Adjust);=0D +}=0D --=20 2.27.0