From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web12.8194.1664442435179364249 for ; Thu, 29 Sep 2022 02:07:15 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=XSqZwsKR; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: dun.tan@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664442435; x=1695978435; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=sgur+KzqrvQ9Qi1Uhry+09s8mHE7iYzqNm2/Ea7E474=; b=XSqZwsKRFOIkzNrrXDn4ieOhwDyqf86ltT3znChKmeLPR2ftYCbV50DP kdqAXHonj+FrCAMjEAPdKNX0W6I//9FLh2GIYCWYpg6CI3uOkE5gj8CDG zozXXgAOhRYF55Seh+e08ARPymzaa1e/QeeFFWakG9ERBy61qUXr958aV L8ULSlY5EdstjY3Y2njZJqPeFvvkIRm+8tViOCc4fonCMEh3lhFEKvmhA 5/OfHk0mEmqkcuJ/D3a88WYpKsU5XRv+sxVH1M1GolDrnkxxMGVK54xbK Cd4Umd9qzt4r/EDYcpLdlUH8JoU5D8pr3ejyyNnnVzTnvl2nZlhpbxIWU w==; X-IronPort-AV: E=McAfee;i="6500,9779,10484"; a="284974253" X-IronPort-AV: E=Sophos;i="5.93,354,1654585200"; d="scan'208";a="284974253" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2022 02:07:14 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10484"; a="867313731" X-IronPort-AV: E=Sophos;i="5.93,354,1654585200"; d="scan'208";a="867313731" Received: from duntan-mobl.ccr.corp.intel.com ([10.239.157.52]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2022 02:07:13 -0700 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar Subject: [Patch V2] UefiCpuPkg/CpuExceptionHandlerLib: Code optimization to allow bigger stack Date: Thu, 29 Sep 2022 17:06:51 +0800 Message-Id: <20220929090651.1438-1-dun.tan@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This commit is a code optimization to allow bigger seperate stack size in ArchSetupExceptionStack. In previous code logic, CPU_STACK_ALIGNMENT bytes will be wasted if StackTop is already CPU_STACK_ALIGNMENT aligned. Signed-off-by: Dun Tan Cc: Eric Dong Reviewed-by: Ray Ni Cc: Rahul Kumar --- UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c | 5 ++++- UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c | 5 ++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c index 8c398ebc5b..c30ece1dc9 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c @@ -215,7 +215,10 @@ ArchSetupExceptionStack ( // Fixup exception task descriptor and task-state segment // AsmGetTssTemplateMap (&TemplateMap); - StackTop = StackTop - CPU_STACK_ALIGNMENT; + // + // Plus 1 byte is for compact stack layout in case StackTop is already aligned. + // + StackTop = StackTop - CPU_STACK_ALIGNMENT + 1; StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT); IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)Idtr.Base; for (Index = 0; Index < CPU_STACK_SWITCH_EXCEPTION_NUMBER; ++Index) { diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c index 80e9f08e5b..4e85880ed4 100644 --- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c +++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c @@ -223,7 +223,10 @@ ArchSetupExceptionStack ( // Fixup exception task descriptor and task-state segment // ZeroMem (Tss, sizeof (*Tss)); - StackTop = StackTop - CPU_STACK_ALIGNMENT; + // + // Plus 1 byte is for compact stack layout in case StackTop is already aligned. + // + StackTop = StackTop - CPU_STACK_ALIGNMENT + 1; StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT); IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)Idtr.Base; for (Index = 0; Index < CPU_STACK_SWITCH_EXCEPTION_NUMBER; ++Index) { -- 2.31.1.windows.1