[edk2-platforms][PATCH V1 1/2] Platform/Sgi: add SSDT table for Virtio-P9

["Vivek Kumar Gautam" <vivek.gautam@arm.com>]

Some of the Arm reference design FVP platforms support the Virtio-p9
device as part of the RoS subsystem. Add an entry for this device in
the SSDT acpi table.

The device entry is listed in a new SSDT file as only some of the
reference design FVP platforms support it and so this file is included
in the build for only the supported platforms.

Signed-off-by: Vivek Gautam <vivek.gautam@arm.com>
---
 Platform/ARM/SgiPkg/SgiPlatform.dec                |  5 +++
 Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc          |  5 +++
 Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl | 43 ++++++++++++++++++++
 3 files changed, 53 insertions(+)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec b/Platform/ARM/SgiPkg/SgiPlatform.dec
index b9be5c9060b6..d99773044d68 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -46,6 +46,11 @@
   gArmSgiTokenSpaceGuid.PcdVirtioNetSize|0x00000000|UINT32|0x00000008
   gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|0x00000000|UINT32|0x00000009
 
+  # Virtio P9
+  gArmSgiTokenSpaceGuid.PcdVirtioP9BaseAddress|0x00000000|UINT32|0x00000028
+  gArmSgiTokenSpaceGuid.PcdVirtioP9Size|0x00000000|UINT32|0x00000029
+  gArmSgiTokenSpaceGuid.PcdVirtioP9Interrupt|0x00000000|UINT32|0x0000002A
+
   # Chip count on the platform
   gArmSgiTokenSpaceGuid.PcdChipCount|1|UINT32|0x0000000B
 
diff --git a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc b/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc
index 78ee48e354a8..1539dca9ceec 100644
--- a/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc
@@ -38,6 +38,11 @@
   gArmSgiTokenSpaceGuid.PcdVirtioNetBaseAddress|0x0C150000
   gArmSgiTokenSpaceGuid.PcdVirtioNetInterrupt|460
 
+  # Virtio P9
+  gArmSgiTokenSpaceGuid.PcdVirtioP9BaseAddress|0x0C190000
+  gArmSgiTokenSpaceGuid.PcdVirtioP9Size|0x10000
+  gArmSgiTokenSpaceGuid.PcdVirtioP9Interrupt|459
+
   # PCIe
   gArmTokenSpaceGuid.PcdPciMmio32Base|0x60000000
   gArmTokenSpaceGuid.PcdPciMmio32Size|0x10000000
diff --git a/Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl b/Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl
new file mode 100644
index 000000000000..187183c3e94a
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/SsdtRosVirtioP9.asl
@@ -0,0 +1,43 @@
+/** @file
+* Secondary System Description Table Fields (SSDT) for Virtio-P9 device.
+*
+* Some of the Arm Reference Design FVP platforms support the Virtio-P9 device
+* as part of the RoS subsystem. The Virtio-P9 device implements a subset of the
+* Plan 9 file protocol over a virtio transport. It enables accessing a shared
+* directory on the host's filesystem from a running FVP platform.
+* This file describes the SSDT entry for this Virtio-P9 device
+*
+* Copyright (c) 2022, Arm Ltd. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+* @par Specification Reference:
+*   - ACPI 6.4, Chapter 5, Section 5.2.11.2, Secondary System Description Table
+**/
+
+
+#include "SgiAcpiHeader.h"
+#include "SgiPlatform.h"
+
+DefinitionBlock ("SsdtRosVirtioP9Table.aml", "SSDT", 2, "ARMLTD", "ARMSGI",
+                 EFI_ACPI_ARM_OEM_REVISION) {
+  Scope (_SB) {
+    // VIRTIO P9 device
+    Device (VP90) {
+      Name (_HID, "LNRO0005")
+      Name (_UID, 2)
+      Name (_CCA, 1)    // mark the device coherent
+
+      Name (_CRS, ResourceTemplate() {
+        Memory32Fixed (
+          ReadWrite,
+          FixedPcdGet32 (PcdVirtioP9BaseAddress),
+          FixedPcdGet32 (PcdVirtioP9Size)
+        )
+        Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) {
+          FixedPcdGet32 (PcdVirtioP9Interrupt)
+        }
+      })
+    }
+  } // Scope(_SB)
+}
-- 
2.17.1