From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f170.google.com (mail-pl1-f170.google.com [209.85.214.170]) by mx.groups.io with SMTP id smtpd.web10.18657.1665571507202528514 for ; Wed, 12 Oct 2022 03:45:07 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@ventanamicro.com header.s=google header.b=mI2Ng7Aj; spf=pass (domain: ventanamicro.com, ip: 209.85.214.170, mailfrom: sunilvl@ventanamicro.com) Received: by mail-pl1-f170.google.com with SMTP id n7so15904864plp.1 for ; Wed, 12 Oct 2022 03:45:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=yDVY6gz2tQLl3A35MDKyomnoDHw2KhWrvlfAkky7muQ=; b=mI2Ng7AjcYznRPC8FyNrMpKhAzLMDyxVwd55CqbgIqGXEnzfSaxVfHbxJ8TxE/OWTG VCVyrTLct02SCsgL5Fj6Zx0yJ9rmJw8Sg0KPPQNz6dBccWkIMh27y03YZTNCoyRYFAl/ yt0FLQIfjc9QPYjA41C2sfrhUCAqR5MV6c/p2Kmve/xwi/qnjfzY3CUsSh9M03rW7EB2 /5lAvcf2m/hT2uLJioSNcflNHETeNY64V+/4NFJiVeInlOy6wQnFJA5Cno+4CxHQtNIQ 7DiQ+LxP7Zv/DRl6BG9QAxfdGXfAYOcXcX3XuYGwhOcUB4M3TaCVblk5x8w/t95GNPco CW5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=yDVY6gz2tQLl3A35MDKyomnoDHw2KhWrvlfAkky7muQ=; b=ugTaNUgg0/3yEoJ7EgP/9SCNccpem4UEfkqYqnV+9vL92ldg5NjHSzZesKh7RilCiS jjD89oHVA3y7yBiHVqMiFzjYUEGdUuCVSyNpXMvvL/8O89tvYnth5Ea46Fz7p9akUspX 67q9iUygOAAgJERaZ/9ZiSv0bK70huCazLqwyNzusPUgdXdWb9+qGyEVG9pA9qEQPO0w Vde+Q4xm62H3yEJWpIOPYOaUqkCQZPv7sPmgNupzwGnkOdJIkMyoyu6rMJe2rv0Unw1Y aYmlxmmhCDAqZuCuyLXT1emR04fKdHDYhYD7wcFviD06XRoCIpbokz6z8ypMpldwsI81 CCmw== X-Gm-Message-State: ACrzQf3YLfQhgCN3H6NTgeF7Hgt62+8Ut+7Pca/BuCTW5eKHSsWjzz8s Ml/PB/m51eKY1eTBR0qiokjtA9mWK2F+b0Dc X-Google-Smtp-Source: AMsMyM7kxMGZ+CJ/uTABDURIhp8fgUrnQIT3OcfnLlRXvGHDydE/EmEi8sZz0G47cHLFfeMBCqw1Ag== X-Received: by 2002:a17:90b:1e03:b0:20d:7f0:7671 with SMTP id pg3-20020a17090b1e0300b0020d07f07671mr4337023pjb.174.1665571506184; Wed, 12 Oct 2022 03:45:06 -0700 (PDT) Return-Path: Received: from localhost.localdomain ([49.206.13.138]) by smtp.gmail.com with ESMTPSA id z4-20020aa79e44000000b0054223a0185asm10812221pfq.161.2022.10.12.03.44.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Oct 2022 03:45:05 -0700 (PDT) From: "Sunil V L" To: devel@edk2.groups.io Cc: Abner Chang , Daniel Schaefer , Michael D Kinney , Liming Gao , Zhiguang Liu , Ard Biesheuvel , Jiewen Yao , Jordan Justen , Gerd Hoffmann , Rebecca Cran , Peter Grehan , Brijesh Singh , Erdem Aktas , James Bottomley , Min Xu , Tom Lendacky , Eric Dong , Ray Ni , Rahul Kumar , Leif Lindholm , Sami Mujawar , Andrew Fish , Jian J Wang , Anup Patel , Heinrich Schuchardt Subject: [edk2-staging/RiscV64QemuVirt PATCH V2 00/33] Add support for RISC-V virt machine Date: Wed, 12 Oct 2022 16:14:23 +0530 Message-Id: <20221012104456.1393376-1-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076 Add support for RISC-V qemu virt machine. Most of the changes are migrated from edk2-platforms repo and followed the latest guidelines for EDK2 code structuring. The changes at a high level are, 1) MdePkg: - Add RISC-V register definitions - Add RISCV_EFI_BOOT_PROTOCOL related definitions - Add BaseRiscVSbiLib library to make ecall to machine mode firmware - Created Null instance of the NorFlashPlatformLib library class - Moved NorFlashPlatformLib.h from ArmPlatformPkg 2) UefiCpuPkg: - Refactor modules/libraries as per latest guidelines - Add RISC-V support in below modules/libraries. - CpuTimerLib, CpuExceptionHandlerLib, CpuDxe - Add new CpuTimerDxe module 3) ArmVirtPkg: - Migrate below libraries/modules to OvmfPkg - PlatformBootManagerLib, PlatformHasAcpiDtDxe - Fix up the consumers of these modules 4) OvmfPkg: - Refactor the libraries/modules as per latest guidelines - Add RISC-V support for below libraries/modules. - Sec, ResetSystemLib, PlatformInitLib, PlatformPei - Add optimized version of NorFlashDxe driver - Add NorFlashQemuLib (Copied from ArmVirtPkg and SbsaQemu) - Add new DSC/FDF files to build for RISC-V virt machine 5) MdeModulePkg/EmbeddedPkg: - Migrated NvVarStoreFormattedLib from EmbeddedPkg to MdeModulePkg Changes since V1: 1) Added couple of patches from Ard to optimize the NorFlashDxe in Ovmf. Note: There will be a separate patch series in future to update existing consumers of NorFlashDxe driver. 2) Migrated NvVarStoreFormattedLib from EmbeddedPkg to MdeModulePkg 3) Created Null instance of the NorFlashPlatformLib library class 4) Moved NorFlashPlatformLib.h from ArmPlatformPkg The changes are tested on risc-v qemu with an additional patch series to enable pflash available at https://github.com/vlsunil/qemu/tree/pflash_v3 Cc: Abner Chang Cc: Daniel Schaefer Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Jordan Justen Cc: Gerd Hoffmann Cc: Rebecca Cran Cc: Peter Grehan Cc: Brijesh Singh Cc: Erdem Aktas Cc: James Bottomley Cc: Min Xu Cc: Tom Lendacky Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Leif Lindholm Cc: Sami Mujawar Cc: Andrew Fish Cc: Jian J Wang Cc: Anup Patel Cc: Heinrich Schuchardt Sunil V L (33): MdePkg/Register: Add register definition header files for RISC-V MdePkg: Add RISCV_EFI_BOOT_PROTOCOL related definitions MdePkg/BaseLib: RISC-V: Add few more helper functions MdePkg: Add BaseRiscVSbiLib Library for RISC-V OvmfPkg/PlatformInitLib: Refactor to allow other architectures OvmfPkg/PlatformInitLib: Add support for RISC-V OvmfPkg/ResetSystemLib: Refactor to allow other architectures. OvmfPkg/ResetSystemLib: Add support for RISC-V OvmfPkg/Sec: Refactor to allow other architectures OvmfPkg/Sec: Add RISC-V support OvmfPkg/PlatformPei: Refactor to allow other architectures OvmfPkg/PlatformPei: Add support for RISC-V UefiCpuPkg/CpuTimerLib: Refactor to allow other architectures UefiCpuPkg/CpuTimerLib: Add support for RISC-V UefiCpuPkg/CpuExceptionHandlerLib: Refactor to allow other architectures UefiCpuPkg/CpuExceptionHandlerLib: Add support for RISC-V UefiCpuPkg/CpuDxe: Refactor to allow other architectures UefiCpuPkg/CpuDxe: Add support for RISC-V UefiCpuPkg/CpuDxe: Add RISC-V Boot protocol support UefiCpuPkg: Add CpuTimerDxe module ArmVirtPkg/PlatformHasAcpiDtDxe: Move to OvmfPkg ArmVirtPkg: Fix up the location of PlatformHasAcpiDtDxe ArmVirtPkg/PlatformBootManagerLib: Move to OvmfPkg ArmVirtPkg: Fix up the paths to PlatformBootManagerLib ArmPlatformPkg/NorFlashPlatformLib.h:Move to MdePkg EmbeddedPkg/NvVarStoreFormattedLib: Migrate to MdeModulePkg OvmfPkg: Add NorFlashQemuLib library OvmfPkg: Add Qemu NOR flash DXE driver OvmfPkg/NorFlashDxe: Avoid switching to array mode during writes OvmfPkg/NorFlashDxe: Avoid switching between modes in a tight loop OvmfPkg: RiscVVirt: Add Qemu Virt platform support Maintainers.txt: Add entry for OvmfPkg/RiscVVirt UefiCpuPkg/UefiCpuPkg.ci.yaml: Ignore RISC-V file ArmPlatformPkg/ArmPlatformPkg.dec | 4 - ArmVirtPkg/ArmVirtPkg.dec | 9 - EmbeddedPkg/EmbeddedPkg.dec | 3 - MdeModulePkg/MdeModulePkg.dec | 3 + MdePkg/MdePkg.dec | 14 + OvmfPkg/OvmfPkg.dec | 18 + ArmVirtPkg/ArmVirtCloudHv.dsc | 2 +- ArmVirtPkg/ArmVirtQemu.dsc | 8 +- ArmVirtPkg/ArmVirtQemuKernel.dsc | 6 +- MdeModulePkg/MdeModulePkg.dsc | 2 + MdePkg/MdePkg.dsc | 4 + OvmfPkg/Platforms/RiscVVirt/RiscVVirt.dsc | 726 ++++++++++++++ UefiCpuPkg/UefiCpuPkg.dsc | 15 +- OvmfPkg/Platforms/RiscVVirt/RiscVVirt.fdf | 406 ++++++++ .../CloudHvHasAcpiDtDxe.inf | 2 +- .../KvmtoolPlatformDxe/KvmtoolPlatformDxe.inf | 2 +- .../NvVarStoreFormattedLib.inf | 1 - MdePkg/Library/BaseLib/BaseLib.inf | 2 + .../BaseRiscVSbiLib/BaseRiscVSbiLib.inf | 25 + .../NorFlashPlatformLibNull.inf | 23 + OvmfPkg/Drivers/NorFlashDxe/NorFlashDxe.inf | 67 ++ .../NorFlashDxe/NorFlashStandaloneMm.inf | 61 ++ .../NorFlashQemuLib/NorFlashQemuLib.inf | 40 + .../NorFlashQemuUnifiedLib.inf | 30 + .../PlatformBootManagerLib.inf | 3 +- .../PlatformInitLib/PlatformInitLib.inf | 31 +- .../ResetSystemLib/BaseResetSystemLib.inf | 12 +- .../BaseResetSystemLibBhyve.inf | 4 +- .../BaseResetSystemLibMicrovm.inf | 2 +- .../ResetSystemLib/DxeResetSystemLib.inf | 15 +- .../PlatformHasAcpiDtDxe.inf | 3 +- OvmfPkg/PlatformPei/PlatformPei.inf | 43 +- OvmfPkg/Sec/SecMain.inf | 34 +- UefiCpuPkg/CpuDxe/CpuDxe.inf | 39 +- UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf | 51 + .../DxeCpuExceptionHandlerLib.inf | 21 +- .../PeiCpuExceptionHandlerLib.inf | 8 +- .../SecPeiCpuExceptionHandlerLib.inf | 19 +- .../SmmCpuExceptionHandlerLib.inf | 8 +- .../Xcode5SecPeiCpuExceptionHandlerLib.inf | 6 +- .../Library/CpuTimerLib/BaseCpuTimerLib.inf | 9 +- .../Include/Guid/NvVarStoreFormatted.h | 0 MdePkg/Include/Library/BaseLib.h | 50 + MdePkg/Include/Library/BaseRiscVSbiLib.h | 127 +++ .../Include/Library/NorFlashPlatformLib.h | 0 MdePkg/Include/Protocol/RiscVBootProtocol.h | 32 + .../Include/Register/RiscV64/RiscVEncoding.h | 124 +++ MdePkg/Include/Register/RiscV64/RiscVImpl.h | 24 + OvmfPkg/Drivers/NorFlashDxe/NorFlash.h | 422 ++++++++ OvmfPkg/Include/Library/PlatformInitLib.h | 6 + .../PlatformBootManagerLibVirt}/PlatformBm.h | 0 OvmfPkg/PlatformPei/{ => Ia32_X64}/Platform.h | 0 OvmfPkg/PlatformPei/RiscV64/Platform.h | 97 ++ OvmfPkg/Sec/{ => Ia32_X64}/AmdSev.h | 0 OvmfPkg/Sec/RiscV64/SecMain.h | 65 ++ OvmfPkg/Sec/SecMainCommon.h | 73 ++ UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuDxe.h | 0 UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuGdt.h | 0 UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuMp.h | 0 .../CpuDxe/{ => Ia32_X64}/CpuPageTable.h | 0 UefiCpuPkg/CpuDxe/{ => RiscV64}/CpuDxe.h | 122 +-- UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.h | 177 ++++ .../{ => Ia32_X64}/CpuExceptionCommon.h | 0 .../RiscV64/CpuExceptionHandlerLib.h | 116 +++ .../NvVarStoreFormattedLib.c | 0 .../Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c | 227 +++++ .../NorFlashPlatformLibNull.c | 26 + OvmfPkg/Drivers/NorFlashDxe/NorFlash.c | 908 ++++++++++++++++++ .../Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 123 +++ OvmfPkg/Drivers/NorFlashDxe/NorFlashDxe.c | 509 ++++++++++ OvmfPkg/Drivers/NorFlashDxe/NorFlashFvb.c | 777 +++++++++++++++ .../NorFlashDxe/NorFlashStandaloneMm.c | 386 ++++++++ .../Library/NorFlashQemuLib/NorFlashQemuLib.c | 136 +++ .../NorFlashQemuLib/NorFlashQemuUnifiedLib.c | 40 + .../PlatformBootManagerLibVirt}/PlatformBm.c | 0 .../PlatformBootManagerLibVirt}/QemuKernel.c | 0 .../PlatformInitLib/{ => Ia32_X64}/Cmos.c | 0 .../PlatformInitLib/{ => Ia32_X64}/IntelTdx.c | 0 .../{ => Ia32_X64}/IntelTdxNull.c | 0 .../{ => Ia32_X64}/MemDetect.c | 0 .../PlatformInitLib/{ => Ia32_X64}/Platform.c | 0 .../PlatformInitLib/RiscV64/PlatformPeiLib.c | 73 ++ .../{ => Ia32_X64}/BaseResetShutdown.c | 0 .../{ => Ia32_X64}/BaseResetShutdownBhyve.c | 0 .../{ => Ia32_X64}/DxeResetShutdown.c | 0 .../{ => Ia32_X64}/DxeResetSystemLibMicrovm.c | 0 .../{ => Ia32_X64}/ResetSystemLib.c | 0 .../{ => Ia32_X64}/ResetSystemLibMicrovm.c | 0 .../ResetSystemLib/RiscV64/DxeResetShutdown.c | 20 + .../ResetSystemLib/RiscV64/ResetSystemLib.c | 128 +++ .../PlatformHasAcpiDtDxe.c | 0 OvmfPkg/PlatformPei/{ => Ia32_X64}/AmdSev.c | 0 .../PlatformPei/{ => Ia32_X64}/ClearCache.c | 0 .../{ => Ia32_X64}/FeatureControl.c | 0 OvmfPkg/PlatformPei/{ => Ia32_X64}/Fv.c | 0 OvmfPkg/PlatformPei/{ => Ia32_X64}/IntelTdx.c | 0 .../PlatformPei/{ => Ia32_X64}/MemDetect.c | 0 .../PlatformPei/{ => Ia32_X64}/MemTypeInfo.c | 0 OvmfPkg/PlatformPei/{ => Ia32_X64}/Platform.c | 0 OvmfPkg/PlatformPei/{ => RiscV64}/Fv.c | 43 +- OvmfPkg/PlatformPei/RiscV64/MemDetect.c | 212 ++++ OvmfPkg/PlatformPei/RiscV64/Platform.c | 372 +++++++ OvmfPkg/Sec/{ => Ia32_X64}/AmdSev.c | 0 OvmfPkg/Sec/{ => Ia32_X64}/SecMain.c | 227 +---- OvmfPkg/Sec/RiscV64/SecMain.c | 573 +++++++++++ OvmfPkg/Sec/SecMainCommon.c | 238 +++++ UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuDxe.c | 0 UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuGdt.c | 0 UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuMp.c | 0 .../CpuDxe/{ => Ia32_X64}/CpuPageTable.c | 0 UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c | 365 +++++++ UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.c | 294 ++++++ .../{ => Ia32_X64}/CpuExceptionCommon.c | 0 .../{ => Ia32_X64}/DxeException.c | 0 .../{ => Ia32_X64}/PeiCpuException.c | 0 .../{ => Ia32_X64}/PeiDxeSmmCpuException.c | 0 .../{ => Ia32_X64}/SecPeiCpuException.c | 0 .../{ => Ia32_X64}/SmmException.c | 0 .../CpuExceptionHandlerLib.c} | 83 +- .../{ => Ia32_X64}/BaseCpuTimerLib.c | 0 .../CpuTimerLib/{ => Ia32_X64}/CpuTimerLib.c | 0 .../Library/CpuTimerLib/RiscV64/CpuTimerLib.c | 199 ++++ ArmVirtPkg/ArmVirtPkg.ci.yaml | 1 - ArmVirtPkg/ArmVirtQemuFvMain.fdf.inc | 2 +- Maintainers.txt | 4 + MdePkg/Library/BaseLib/RiscV64/CpuScratch.S | 31 + MdePkg/Library/BaseLib/RiscV64/ReadTimer.S | 24 + .../Library/BaseLib/RiscV64/RiscVInterrupt.S | 53 +- OvmfPkg/OvmfPkg.ci.yaml | 1 + OvmfPkg/Platforms/RiscVVirt/RiscVVirt.fdf.inc | 66 ++ OvmfPkg/Platforms/RiscVVirt/VarStore.fdf.inc | 79 ++ OvmfPkg/Sec/RiscV64/SecEntry.S | 23 + UefiCpuPkg/CpuTimerDxe/CpuTimer.uni | 15 + UefiCpuPkg/CpuTimerDxe/CpuTimerExtra.uni | 13 + .../RiscV64/SupervisorTrapHandler.S | 105 ++ UefiCpuPkg/UefiCpuPkg.ci.yaml | 1 + 136 files changed, 9067 insertions(+), 526 deletions(-) create mode 100644 OvmfPkg/Platforms/RiscVVirt/RiscVVirt.dsc create mode 100644 OvmfPkg/Platforms/RiscVVirt/RiscVVirt.fdf rename {EmbeddedPkg => MdeModulePkg}/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf (96%) create mode 100644 MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.inf create mode 100644 MdePkg/Library/NorFlashPlatformLibNull/NorFlashPlatformLibNull.inf create mode 100644 OvmfPkg/Drivers/NorFlashDxe/NorFlashDxe.inf create mode 100644 OvmfPkg/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf create mode 100644 OvmfPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf create mode 100644 OvmfPkg/Library/NorFlashQemuLib/NorFlashQemuUnifiedLib.inf rename {ArmVirtPkg/Library/PlatformBootManagerLib => OvmfPkg/Library/PlatformBootManagerLibVirt}/PlatformBootManagerLib.inf (92%) rename {ArmVirtPkg => OvmfPkg}/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.inf (89%) create mode 100644 UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf rename {EmbeddedPkg => MdeModulePkg}/Include/Guid/NvVarStoreFormatted.h (100%) create mode 100644 MdePkg/Include/Library/BaseRiscVSbiLib.h rename {ArmPlatformPkg => MdePkg}/Include/Library/NorFlashPlatformLib.h (100%) create mode 100644 MdePkg/Include/Protocol/RiscVBootProtocol.h create mode 100644 MdePkg/Include/Register/RiscV64/RiscVEncoding.h create mode 100644 MdePkg/Include/Register/RiscV64/RiscVImpl.h create mode 100644 OvmfPkg/Drivers/NorFlashDxe/NorFlash.h rename {ArmVirtPkg/Library/PlatformBootManagerLib => OvmfPkg/Library/PlatformBootManagerLibVirt}/PlatformBm.h (100%) rename OvmfPkg/PlatformPei/{ => Ia32_X64}/Platform.h (100%) create mode 100644 OvmfPkg/PlatformPei/RiscV64/Platform.h rename OvmfPkg/Sec/{ => Ia32_X64}/AmdSev.h (100%) create mode 100644 OvmfPkg/Sec/RiscV64/SecMain.h create mode 100644 OvmfPkg/Sec/SecMainCommon.h copy UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuDxe.h (100%) rename UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuGdt.h (100%) rename UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuMp.h (100%) rename UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuPageTable.h (100%) rename UefiCpuPkg/CpuDxe/{ => RiscV64}/CpuDxe.h (69%) create mode 100644 UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.h rename UefiCpuPkg/Library/CpuExceptionHandlerLib/{ => Ia32_X64}/CpuExceptionCommon.h (100%) create mode 100644 UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.h rename {EmbeddedPkg => MdeModulePkg}/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.c (100%) create mode 100644 MdePkg/Library/BaseRiscVSbiLib/BaseRiscVSbiLib.c create mode 100644 MdePkg/Library/NorFlashPlatformLibNull/NorFlashPlatformLibNull.c create mode 100644 OvmfPkg/Drivers/NorFlashDxe/NorFlash.c create mode 100644 OvmfPkg/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c create mode 100644 OvmfPkg/Drivers/NorFlashDxe/NorFlashDxe.c create mode 100644 OvmfPkg/Drivers/NorFlashDxe/NorFlashFvb.c create mode 100644 OvmfPkg/Drivers/NorFlashDxe/NorFlashStandaloneMm.c create mode 100644 OvmfPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c create mode 100644 OvmfPkg/Library/NorFlashQemuLib/NorFlashQemuUnifiedLib.c rename {ArmVirtPkg/Library/PlatformBootManagerLib => OvmfPkg/Library/PlatformBootManagerLibVirt}/PlatformBm.c (100%) rename {ArmVirtPkg/Library/PlatformBootManagerLib => OvmfPkg/Library/PlatformBootManagerLibVirt}/QemuKernel.c (100%) rename OvmfPkg/Library/PlatformInitLib/{ => Ia32_X64}/Cmos.c (100%) rename OvmfPkg/Library/PlatformInitLib/{ => Ia32_X64}/IntelTdx.c (100%) rename OvmfPkg/Library/PlatformInitLib/{ => Ia32_X64}/IntelTdxNull.c (100%) rename OvmfPkg/Library/PlatformInitLib/{ => Ia32_X64}/MemDetect.c (100%) rename OvmfPkg/Library/PlatformInitLib/{ => Ia32_X64}/Platform.c (100%) create mode 100644 OvmfPkg/Library/PlatformInitLib/RiscV64/PlatformPeiLib.c rename OvmfPkg/Library/ResetSystemLib/{ => Ia32_X64}/BaseResetShutdown.c (100%) rename OvmfPkg/Library/ResetSystemLib/{ => Ia32_X64}/BaseResetShutdownBhyve.c (100%) rename OvmfPkg/Library/ResetSystemLib/{ => Ia32_X64}/DxeResetShutdown.c (100%) rename OvmfPkg/Library/ResetSystemLib/{ => Ia32_X64}/DxeResetSystemLibMicrovm.c (100%) rename OvmfPkg/Library/ResetSystemLib/{ => Ia32_X64}/ResetSystemLib.c (100%) rename OvmfPkg/Library/ResetSystemLib/{ => Ia32_X64}/ResetSystemLibMicrovm.c (100%) create mode 100644 OvmfPkg/Library/ResetSystemLib/RiscV64/DxeResetShutdown.c create mode 100644 OvmfPkg/Library/ResetSystemLib/RiscV64/ResetSystemLib.c rename {ArmVirtPkg => OvmfPkg}/PlatformHasAcpiDtDxe/PlatformHasAcpiDtDxe.c (100%) rename OvmfPkg/PlatformPei/{ => Ia32_X64}/AmdSev.c (100%) rename OvmfPkg/PlatformPei/{ => Ia32_X64}/ClearCache.c (100%) rename OvmfPkg/PlatformPei/{ => Ia32_X64}/FeatureControl.c (100%) copy OvmfPkg/PlatformPei/{ => Ia32_X64}/Fv.c (100%) rename OvmfPkg/PlatformPei/{ => Ia32_X64}/IntelTdx.c (100%) rename OvmfPkg/PlatformPei/{ => Ia32_X64}/MemDetect.c (100%) rename OvmfPkg/PlatformPei/{ => Ia32_X64}/MemTypeInfo.c (100%) rename OvmfPkg/PlatformPei/{ => Ia32_X64}/Platform.c (100%) rename OvmfPkg/PlatformPei/{ => RiscV64}/Fv.c (63%) create mode 100644 OvmfPkg/PlatformPei/RiscV64/MemDetect.c create mode 100644 OvmfPkg/PlatformPei/RiscV64/Platform.c rename OvmfPkg/Sec/{ => Ia32_X64}/AmdSev.c (100%) rename OvmfPkg/Sec/{ => Ia32_X64}/SecMain.c (75%) create mode 100644 OvmfPkg/Sec/RiscV64/SecMain.c create mode 100644 OvmfPkg/Sec/SecMainCommon.c rename UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuDxe.c (100%) rename UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuGdt.c (100%) rename UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuMp.c (100%) rename UefiCpuPkg/CpuDxe/{ => Ia32_X64}/CpuPageTable.c (100%) create mode 100644 UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c create mode 100644 UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.c rename UefiCpuPkg/Library/CpuExceptionHandlerLib/{ => Ia32_X64}/CpuExceptionCommon.c (100%) rename UefiCpuPkg/Library/CpuExceptionHandlerLib/{ => Ia32_X64}/DxeException.c (100%) rename UefiCpuPkg/Library/CpuExceptionHandlerLib/{ => Ia32_X64}/PeiCpuException.c (100%) rename UefiCpuPkg/Library/CpuExceptionHandlerLib/{ => Ia32_X64}/PeiDxeSmmCpuException.c (100%) rename UefiCpuPkg/Library/CpuExceptionHandlerLib/{ => Ia32_X64}/SecPeiCpuException.c (100%) copy UefiCpuPkg/Library/CpuExceptionHandlerLib/{ => Ia32_X64}/SmmException.c (100%) rename UefiCpuPkg/Library/CpuExceptionHandlerLib/{SmmException.c => RiscV64/CpuExceptionHandlerLib.c} (67%) rename UefiCpuPkg/Library/CpuTimerLib/{ => Ia32_X64}/BaseCpuTimerLib.c (100%) rename UefiCpuPkg/Library/CpuTimerLib/{ => Ia32_X64}/CpuTimerLib.c (100%) create mode 100644 UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c create mode 100644 MdePkg/Library/BaseLib/RiscV64/CpuScratch.S create mode 100644 MdePkg/Library/BaseLib/RiscV64/ReadTimer.S create mode 100644 OvmfPkg/Platforms/RiscVVirt/RiscVVirt.fdf.inc create mode 100644 OvmfPkg/Platforms/RiscVVirt/VarStore.fdf.inc create mode 100644 OvmfPkg/Sec/RiscV64/SecEntry.S create mode 100644 UefiCpuPkg/CpuTimerDxe/CpuTimer.uni create mode 100644 UefiCpuPkg/CpuTimerDxe/CpuTimerExtra.uni create mode 100644 UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/SupervisorTrapHandler.S -- 2.25.1