[edk2-staging/RiscV64QemuVirt PATCH V4 34/34] UefiCpuPkg/UefiCpuPkg.ci.yaml: Ignore RISC-V file

["Sunil V L" <sunilvl@ventanamicro.com>]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4076

RISC-V register names do not follow the EDK2 formatting.
So, add it to ignore list for now.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
 UefiCpuPkg/UefiCpuPkg.ci.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.ci.yaml b/UefiCpuPkg/UefiCpuPkg.ci.yaml
index bbdc44a45b34..ae963e94c8e6 100644
--- a/UefiCpuPkg/UefiCpuPkg.ci.yaml
+++ b/UefiCpuPkg/UefiCpuPkg.ci.yaml
@@ -19,6 +19,7 @@
         ],
         ## Both file path and directory path are accepted.
         "IgnoreFiles": [
+          "Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerLib.h"
         ]
     },
     "CompilerPlugin": {
-- 
2.38.0