From: "Sheng Wei" <w.sheng@intel.com>
To: devel@edk2.groups.io
Cc: Ray Ni <ray.ni@intel.com>,
Rangasai V Chaganty <rangasai.v.chaganty@intel.com>,
Jenny Huang <jenny.huang@intel.com>,
Robert Kowalewski <robert.kowalewski@intel.com>
Subject: [PATCH] IntelSiliconPkg/VTd: Refine VTd core driver
Date: Tue, 18 Oct 2022 14:43:11 +0800 [thread overview]
Message-ID: <20221018064311.186-1-w.sheng@intel.com> (raw)
Refine the DRHD table print message.
Remove unused variable.
Hsd-es-id: 15012152545
Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Jenny Huang <jenny.huang@intel.com>
Cc: Robert Kowalewski <robert.kowalewski@intel.com>
---
.../Feature/VTd/IntelVTdDmarPei/IntelVTdDmar.c | 3 +--
.../Feature/VTd/IntelVTdDxe/DmarAcpiTable.c | 8 ++++----
.../IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c | 3 +--
3 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDmar.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDmar.c
index 24beccd26..af85a3d8e 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDmar.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDmarPei/IntelVTdDmar.c
@@ -486,7 +486,6 @@ EnableDmar (
IN UINTN RootEntryTable
)
{
- UINT32 Reg32;
UINTN VtdUnitBaseAddress;
BOOLEAN TEWasEnabled;
@@ -529,7 +528,7 @@ EnableDmar (
//
// Init DMAr Fault Event and Data registers
//
- Reg32 = MmioRead32 (VtdUnitBaseAddress + R_FEDATA_REG);
+ MmioRead32 (VtdUnitBaseAddress + R_FEDATA_REG);
//
// Write Buffer Flush before invalidation
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c
index 42e1b1449..a485f4d9a 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/DmarAcpiTable.c
@@ -536,14 +536,14 @@ DumpDmarDrhd (
" Flags ................................................ 0x%02x\n",
Drhd->Flags
));
- DEBUG ((DEBUG_INFO,
- " Size ................................................. 0x%02x\n",
- Drhd->Size
- ));
DEBUG ((DEBUG_INFO,
" INCLUDE_PCI_ALL .................................... 0x%02x\n",
Drhd->Flags & EFI_ACPI_DMAR_DRHD_FLAGS_INCLUDE_PCI_ALL
));
+ DEBUG ((DEBUG_INFO,
+ " Size ................................................. 0x%02x\n",
+ Drhd->Size
+ ));
DEBUG ((DEBUG_INFO,
" Segment Number ....................................... 0x%04x\n",
Drhd->SegmentNumber
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c
index 1b354e850..8e834f4c4 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/VtdReg.c
@@ -573,7 +573,6 @@ EnableDmar (
)
{
UINTN Index;
- UINT32 Reg32;
UINTN VtdUnitBaseAddress;
BOOLEAN TEWasEnabled;
@@ -615,7 +614,7 @@ EnableDmar (
//
// Init DMAr Fault Event and Data registers
//
- Reg32 = MmioRead32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_FEDATA_REG);
+ MmioRead32 (mVtdUnitInformation[Index].VtdUnitBaseAddress + R_FEDATA_REG);
//
// Write Buffer Flush before invalidation
--
2.26.2.windows.1
next reply other threads:[~2022-10-18 6:43 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-18 6:43 Sheng Wei [this message]
2022-10-18 7:21 ` [PATCH] IntelSiliconPkg/VTd: Refine VTd core driver Robert Kowalewski
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