From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mx.groups.io with SMTP id smtpd.web11.2818.1667279643333273629 for ; Mon, 31 Oct 2022 22:14:24 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=B9cFo0sZ; spf=pass (domain: intel.com, ip: 134.134.136.24, mailfrom: min.m.xu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667279664; x=1698815664; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PwYs6VOvIiVGVcS4I8ix3tOHT/AWkFMcgwaAOhZMIYE=; b=B9cFo0sZAYP8fSkiRQkaQ11cHEi4/q03wsTVV556nwz5FrnV0Y8g9OIK Bo9EprJ8JV30JoRBmEGM5Hk/WLQMmr/sIvgwiPCkvGEW928jaKazHGj4R ks5Aov1OM5ZXLum1o5ytsq+czOpqb8Ft3MquB05qxoTydNLMD+GLuKCdK kslWWw9t4us+kstHSh/TOWYNhkOviLt1+l71arPvsEsyrTXUTMLlnPebq b5S7+A8mgtZY736zSCu0lhLHlhWVZYNpmf2yxUrApPzgcCjsWqcmqonqW BRgqgp7lNUd59gJ1n7Md/hfQXuEdxm0KoV/VYgkGYqua9ax2uQxiFJN4i w==; X-IronPort-AV: E=McAfee;i="6500,9779,10517"; a="310162816" X-IronPort-AV: E=Sophos;i="5.95,229,1661842800"; d="scan'208";a="310162816" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2022 22:14:23 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10517"; a="878985564" X-IronPort-AV: E=Sophos;i="5.95,229,1661842800"; d="scan'208";a="878985564" Received: from mxu9-mobl1.ccr.corp.intel.com ([10.255.29.119]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2022 22:14:20 -0700 From: "Min Xu" To: devel@edk2.groups.io Cc: Min M Xu , Erdem Aktas , Gerd Hoffmann , James Bottomley , Jiewen Yao , Tom Lendacky Subject: [PATCH V5 09/10] OvmfPkg: Realize EdkiiMemoryAcceptProtocol in TdxDxe Date: Tue, 1 Nov 2022 13:13:48 +0800 Message-Id: <20221101051349.13-10-min.m.xu@intel.com> X-Mailer: git-send-email 2.29.2.windows.2 In-Reply-To: <20221101051349.13-1-min.m.xu@intel.com> References: <20221101051349.13-1-min.m.xu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Min M Xu RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937 Memory usage may exceed the amount accepted at the begining (SEC), TDVF needs to accept memory dynamically when OUT_OF_RESOURCE occurs. Another usage is in SetOrClearSharedBit. If a memory region is changed from shared to private, it must be accepted again. EdkiiMemoryAcceptProtocol is defined in MdePkg and is implementated / installed in TdxDxe for Intel TDX memory acceptance. Cc: Erdem Aktas Cc: Gerd Hoffmann Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Acked-by: Gerd Hoffmann Signed-off-by: Min Xu --- OvmfPkg/TdxDxe/TdxDxe.c | 103 ++++++++++++++++++++++++++++++++++++++ OvmfPkg/TdxDxe/TdxDxe.inf | 2 + 2 files changed, 105 insertions(+) diff --git a/OvmfPkg/TdxDxe/TdxDxe.c b/OvmfPkg/TdxDxe/TdxDxe.c index 05cfb597dc64..30732f421bb6 100644 --- a/OvmfPkg/TdxDxe/TdxDxe.c +++ b/OvmfPkg/TdxDxe/TdxDxe.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -32,6 +33,95 @@ #include #include +#define ALIGNED_2MB_MASK 0x1fffff +EFI_HANDLE mTdxDxeHandle = NULL; + +EFI_STATUS +EFIAPI +TdxMemoryAccept ( + IN EDKII_MEMORY_ACCEPT_PROTOCOL *This, + IN EFI_PHYSICAL_ADDRESS StartAddress, + IN UINTN Size + ) +{ + EFI_STATUS Status; + UINT32 AcceptPageSize; + UINT64 StartAddress1; + UINT64 StartAddress2; + UINT64 StartAddress3; + UINT64 Length1; + UINT64 Length2; + UINT64 Length3; + UINT64 Pages; + + AcceptPageSize = FixedPcdGet32 (PcdTdxAcceptPageSize); + StartAddress1 = 0; + StartAddress2 = 0; + StartAddress3 = 0; + Length1 = 0; + Length2 = 0; + Length3 = 0; + + if (Size == 0) { + return EFI_SUCCESS; + } + + if (ALIGN_VALUE (StartAddress, SIZE_2MB) != StartAddress) { + StartAddress1 = StartAddress; + Length1 = ALIGN_VALUE (StartAddress, SIZE_2MB) - StartAddress; + if (Length1 >= Size) { + Length1 = Size; + } + + StartAddress += Length1; + Size -= Length1; + } + + if (Size > SIZE_2MB) { + StartAddress2 = StartAddress; + Length2 = Size & ~(UINT64)ALIGNED_2MB_MASK; + StartAddress += Length2; + Size -= Length2; + } + + if (Size) { + StartAddress3 = StartAddress; + Length3 = Size; + } + + Status = EFI_SUCCESS; + if (Length1 > 0) { + Pages = Length1 / SIZE_4KB; + Status = TdAcceptPages (StartAddress1, Pages, SIZE_4KB); + if (EFI_ERROR (Status)) { + return Status; + } + } + + if (Length2 > 0) { + Pages = Length2 / AcceptPageSize; + Status = TdAcceptPages (StartAddress2, Pages, AcceptPageSize); + if (EFI_ERROR (Status)) { + return Status; + } + } + + if (Length3 > 0) { + Pages = Length3 / SIZE_4KB; + Status = TdAcceptPages (StartAddress3, Pages, SIZE_4KB); + ASSERT (!EFI_ERROR (Status)); + if (EFI_ERROR (Status)) { + return Status; + } + } + + return Status; +} + +EDKII_MEMORY_ACCEPT_PROTOCOL mMemoryAcceptProtocol = { + TdxMemoryAccept +}; + VOID SetPcdSettings ( EFI_HOB_PLATFORM_INFO *PlatformInfoHob @@ -279,6 +369,19 @@ TdxDxeEntryPoint ( NULL ); + // + // Install MemoryAccept protocol for TDX + // + Status = gBS->InstallProtocolInterface ( + &mTdxDxeHandle, + &gEdkiiMemoryAcceptProtocolGuid, + EFI_NATIVE_INTERFACE, + &mMemoryAcceptProtocol + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Install EdkiiMemoryAcceptProtocol failed.\n")); + } + // // Call TDINFO to get actual number of cpus in domain // diff --git a/OvmfPkg/TdxDxe/TdxDxe.inf b/OvmfPkg/TdxDxe/TdxDxe.inf index 3ce8a5c32c98..9793562884c7 100644 --- a/OvmfPkg/TdxDxe/TdxDxe.inf +++ b/OvmfPkg/TdxDxe/TdxDxe.inf @@ -52,6 +52,7 @@ gEfiAcpiTableProtocolGuid ## CONSUMES gEfiMpInitLibMpDepProtocolGuid gEfiMpInitLibUpDepProtocolGuid + gEdkiiMemoryAcceptProtocolGuid [Pcd] gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase @@ -69,3 +70,4 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved + gUefiOvmfPkgTokenSpaceGuid.PcdTdxAcceptPageSize -- 2.29.2.windows.2