From: "Gerd Hoffmann" <kraxel@redhat.com>
To: Alexey Kardashevskiy <aik@amd.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>,
devel@edk2.groups.io, Ard Biesheuvel <ardb+tianocore@kernel.org>,
Jiewen Yao <jiewen.yao@intel.com>,
Jordan Justen <jordan.l.justen@intel.com>,
Brijesh Singh <brijesh.singh@amd.com>,
Erdem Aktas <erdemaktas@google.com>,
James Bottomley <jejb@linux.ibm.com>, Min Xu <min.m.xu@intel.com>
Subject: Re: Subject: [PATCH ovmf 2/5] MdePkg: Add AMD SEV features to PcdConfidentialComputingGuestAttr
Date: Fri, 2 Dec 2022 13:59:03 +0100 [thread overview]
Message-ID: <20221202125903.vr735qkmvk7gs2wp@sirius.home.kraxel.org> (raw)
In-Reply-To: <964b4684-3c73-6258-619f-775a953b8498@amd.com>
On Fri, Dec 02, 2022 at 11:26:56PM +1100, Alexey Kardashevskiy wrote:
>
>
> On 2/12/22 01:47, Tom Lendacky wrote:
> > Added the subject as somehow it didn't get set.
> >
> > On 11/30/22 20:35, Alexey Kardashevskiy wrote:
> > > Date: Tue, 22 Nov 2022 16:12:55 +1100
> > > Subject: [PATCH ovmf 2/5] MdePkg: Add AMD SEV features to
> > > PcdConfidentialComputingGuestAttr
> > >
> > > PcdConfidentialComputingGuestAttr so far only contained an SEV mode bit
> > > but there are more other features which do not translate to levels
> > > such as DebugSwap or SecureTsc.
> > >
> > > This adds the features mask and the DebugSwap feature bit to a PCD.
> > >
> > > Signed-off-by: Alexey Kardashevskiy <aik@amd.com>
> > > ---
> > > MdePkg/Include/ConfidentialComputingGuestAttr.h | 5 ++++-
> > > 1 file changed, 4 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/MdePkg/Include/ConfidentialComputingGuestAttr.h
> > > b/MdePkg/Include/ConfidentialComputingGuestAttr.h
> > > index 44e6df800207..1fd09a51ea52 100644
> > > --- a/MdePkg/Include/ConfidentialComputingGuestAttr.h
> > > +++ b/MdePkg/Include/ConfidentialComputingGuestAttr.h
> > > @@ -26,12 +26,15 @@ typedef enum {
> > > CCAttrAmdSev = 0x100,
> > > CCAttrAmdSevEs = 0x101,
> > > CCAttrAmdSevSnp = 0x102,
> > > + CCAttrAmdSevFeatureMask = 0xffff0000,
> >
> > The PCD for this is 64-bits, should this be 0xffffffffffff0000?
>
> True but does not that really depend on how greedy I am? :) For now I like
> 16bits and leave the rest for everyone else.
If we want add feature bits to that PCD it should IMHO not be
AmdSev-specific, i.e. we should have something along the lines of:
CCAttrTypeMask 0x000000000000ffff
CCAttrFeatureMask 0xffffffffffff0000
Alternatively use another pcd for the feature bits.
take care,
Gerd
prev parent reply other threads:[~2022-12-02 12:59 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-01 2:35 [PATCH ovmf 0/5] Enable AMD SEV-ES DebugSwap Alexey Kardashevskiy
2022-12-01 2:35 ` [PATCH ovmf 1/5] MdePkg/Register/Amd: Define all bits from MSR_SEV_STATUS_REGISTER Alexey Kardashevskiy
2022-12-07 2:13 ` 回复: [edk2-devel] " gaoliming
2022-12-07 12:24 ` Alexey Kardashevskiy
2022-12-21 1:01 ` 回复: " gaoliming
2022-12-01 2:35 ` [PATCH ovmf 3/5] OvmfPkg: Add AMD SEV-ES DebugSwap feature support Alexey Kardashevskiy
2022-12-01 2:35 ` [PATCH ovmf 4/5] UefiCpuPkg: Add AMD SEV-ES features support Alexey Kardashevskiy
2022-12-01 2:35 ` [PATCH ovmf 5/5] OvmfPkf: Enable AMD SEV-ES DebugSwap for DXE Alexey Kardashevskiy
2022-12-01 5:36 ` [PATCH ovmf 2/5] MdePkg: Add AMD SEV features to PcdConfidentialComputingGuestAttr Alexey Kardashevskiy
[not found] ` <20221201023521.10028-3-aik@amd.com>
2022-12-01 14:47 ` Subject: " Lendacky, Thomas
2022-12-02 12:26 ` Alexey Kardashevskiy
2022-12-02 12:59 ` Gerd Hoffmann [this message]
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