From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.11672.1670501236840150539 for ; Thu, 08 Dec 2022 04:07:17 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: arm.com, ip: 217.140.110.172, mailfrom: sahil@arm.com) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 29A6323A; Thu, 8 Dec 2022 04:07:23 -0800 (PST) Received: from usa.arm.com (a077434.blr.arm.com [10.162.17.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id ADD643F73B; Thu, 8 Dec 2022 04:07:14 -0800 (PST) From: "sahil" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Sami Mujawar , Sahil Subject: [edk2-platforms][PATCH V3 1/1] Silicon/ARM/NeoverseN1Soc: Update CCIX PNP ID Date: Thu, 8 Dec 2022 17:37:07 +0530 Message-Id: <20221208120707.840656-1-sahil@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable The PNP ID 0x0A09 used for CCIX host bridge in the current code is not defined in any specification and is therefore incorrect. Also, there is no need for a separate ID for CCIX host bridge, for the following reasons: 1. CCIX doesn't have any host specific requirements/ingredients as such. 2. CCIX protocol messages flow over regular PCIe. 3. CCIX devices and root ports are natively discovered using the CCIX DVSEC. Therefore, reuse PCIe PNP ID for CCIX. Signed-off-by: sahil --- Notes: v3: - added more info regarding the change in commit message [Sami Mujawar] v2: - removed licence fix, to be pushed in separate patch [Leif Lindholm] Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c | 4 = ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBrid= geLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeL= ib.c index 1f38f654a8ce..6a154d771126 100644 --- a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c +++ b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c @@ -65,8 +65,8 @@ STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeD= evicePath[ROOT_COMPLEX_ (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)=0D }=0D },=0D - EISA_PNP_ID(0x0A09), // CCIX=0D - 0=0D + EISA_PNP_ID(0x0A08), // CCIX=0D + 1=0D },=0D {=0D END_DEVICE_PATH_TYPE,=0D --=20 2.25.1