From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by mx.groups.io with SMTP id smtpd.web10.126116.1671081508064919692 for ; Wed, 14 Dec 2022 21:18:28 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=kFBRKvxX; spf=pass (domain: intel.com, ip: 192.55.52.93, mailfrom: min.m.xu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1671081508; x=1702617508; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=xVh9ea6hu2w59tIxeo5+kdDi7DxNjcW0ff3NYpTjSRI=; b=kFBRKvxXvDQQ8l9j+p53dT1J4Dsil3iOPoinFmu3T7UJsIZKO4YzCHmK nvsSat20Gl6p+DPsh0eKmb2/DSFd75n23ppsjaJ4+WUY8IRE3+qjUZqfB 5QL47BheWJeMJne0eWU+bbLMonHuYbanjqCoM/aeHHVZBFJjvc7Jg4lRI P+IdkVVktQUv6mcdZAVhPoJGD3vL/4qFDRShHiiAcM7/FIG9mNNH6Irqj n5tItYHqUV7L/h2vUKHH0zzh2n7OPNpSZtcgzYurOVIbAbu2wHVQnwGq0 TnTHxAnWlRpRnuP8Fv14vomYst2DJbikjo5uMruhdLoN3CZkV9+9As8Yl g==; X-IronPort-AV: E=McAfee;i="6500,9779,10561"; a="316224066" X-IronPort-AV: E=Sophos;i="5.96,246,1665471600"; d="scan'208";a="316224066" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Dec 2022 21:18:27 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10561"; a="642777932" X-IronPort-AV: E=Sophos;i="5.96,246,1665471600"; d="scan'208";a="642777932" Received: from mxu9-mobl1.ccr.corp.intel.com ([10.249.170.19]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Dec 2022 21:18:24 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min Xu , Erdem Aktas , James Bottomley , Jiewen Yao , Gerd Hoffmann , Michael D Kinney , Liming Gao , Tom Lendacky Subject: [PATCH V3 0/4] Reserve shared memory for DMA operation Date: Thu, 15 Dec 2022 13:18:06 +0800 Message-Id: <20221215051810.2027-1-min.m.xu@intel.com> X-Mailer: git-send-email 2.29.2.windows.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4171 This patch-set introduces the feature of reserving shared memory for DMA operation. Its intention is to reduce the allocation and conversion of private/shared memory, so that boot performance can be improved significantly. Detailed information is in Patch#1. Patch#2 renames AmdSevIoMmu.* to CcIoMmu.* because these 2 files support both SEV and TDX guest. Patch#3 is provided by Tom Lendacky which add SEV support for reserved shared memory. Patch#4 updates the related section in Maintainers.txt. Code: https://github.com/mxu9/edk2/tree/IoMmu.v3 v3 changes: - Check mReservedSharedMemSupported in IoMmuReleaseReservedSharedMem before release the pre-allocated shared memory. - Delete a line of comment in Patch#3 which is suggested by Tom Lendacky. v2 changes: - Add Patch#3 which is provided by Tom Lendacky. It adds SEV support for reserved shared memory. - Add more description for mReservedMemRanges. It describes: 1) How the pre-allocated memory is managed. 2) What if the pre-allocated memory is used up. Cc: Erdem Aktas Cc: James Bottomley Cc: Jiewen Yao Cc: Gerd Hoffmann Cc: Michael D Kinney Cc: Liming Gao Signed-off-by: Tom Lendacky Signed-off-by: Min Xu Min M Xu (3): OvmfPkg/IoMmuDxe: Reserve shared memory region for DMA operation OvmfPkg/IoMmuDxe: Rename AmdSevIoMmu to CcIoMmu Maintainers: Update OvmfPkg/IoMmuDxe Tom Lendacky (1): OvmfPkg/IoMmuDxe: Add SEV support for reserved shared memory Maintainers.txt | 2 +- OvmfPkg/IoMmuDxe/{AmdSevIoMmu.c => CcIoMmu.c} | 204 ++++---- OvmfPkg/IoMmuDxe/{AmdSevIoMmu.h => CcIoMmu.h} | 0 OvmfPkg/IoMmuDxe/IoMmuBuffer.c | 495 ++++++++++++++++++ OvmfPkg/IoMmuDxe/IoMmuDxe.c | 2 +- OvmfPkg/IoMmuDxe/IoMmuDxe.inf | 6 +- OvmfPkg/IoMmuDxe/IoMmuInternal.h | 179 +++++++ 7 files changed, 781 insertions(+), 107 deletions(-) rename OvmfPkg/IoMmuDxe/{AmdSevIoMmu.c => CcIoMmu.c} (85%) rename OvmfPkg/IoMmuDxe/{AmdSevIoMmu.h => CcIoMmu.h} (100%) create mode 100644 OvmfPkg/IoMmuDxe/IoMmuBuffer.c create mode 100644 OvmfPkg/IoMmuDxe/IoMmuInternal.h -- 2.29.2.windows.2