From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mx.groups.io with SMTP id smtpd.web11.46066.1671525816147549841 for ; Tue, 20 Dec 2022 00:43:36 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=daJAfRA2; spf=pass (domain: intel.com, ip: 134.134.136.100, mailfrom: min.m.xu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1671525816; x=1703061816; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+HioTl3efFoADTQrg/DmZlXeI2oyFF5sTGo///9RQ2Q=; b=daJAfRA27W6brILGXCwSYn6hRPPCgWLKWDktxKNfTCBUL/UKhDGCGf2H dE4vpg8sAo7JN6wUXlyfkhPacSd5IOBBXyaO3/KC8P/a8sexB+0jdGQDB zZviFwgRJYkxJGbCj1fbvNT8zhKJZrACGIC1ViVR4EaVzOmG4nLq5bhQP z2+spq6Gi/mUfNqr5WWrFl+VfGnyXAbBctr9U5kcismTGPXS7Tl902+Wf vvLiQgO6Wq25CMo11BYZ2KyGILLLBIusq+oYm7uv6YP6itdFBE7HIUczJ nf1DA6NkrGgpgjA14VDKCTY5CV9kqaFJc46loX4WQZhXGhErRQMHKuV8H A==; X-IronPort-AV: E=McAfee;i="6500,9779,10566"; a="383908312" X-IronPort-AV: E=Sophos;i="5.96,259,1665471600"; d="scan'208";a="383908312" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Dec 2022 00:43:07 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10566"; a="628644659" X-IronPort-AV: E=Sophos;i="5.96,259,1665471600"; d="scan'208";a="628644659" Received: from mxu9-mobl1.ccr.corp.intel.com ([10.255.29.12]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Dec 2022 00:43:04 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min M Xu , Erdem Aktas , Gerd Hoffmann , James Bottomley , Jiewen Yao , Tom Lendacky Subject: [PATCH V2 5/6] OvmfPkg: Enable APs to accept memory for TDVF Date: Tue, 20 Dec 2022 16:42:39 +0800 Message-Id: <20221220084240.1922-6-min.m.xu@intel.com> X-Mailer: git-send-email 2.29.2.windows.2 In-Reply-To: <20221220084240.1922-1-min.m.xu@intel.com> References: <20221220084240.1922-1-min.m.xu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Min M Xu BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4172 TDVF APs once did nothing but spin around to wait for the Wakeup command. This patch enables APs to handle the AcceptPages command. Once APs find the AcceptPages command, it set its stack and jump to the function of ApAcceptMemoryResourceRange (which will be introduced in the following patch). Cc: Erdem Aktas Cc: Gerd Hoffmann Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Signed-off-by: Min Xu --- OvmfPkg/Include/TdxCommondefs.inc | 4 +- OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm | 61 +++++++++++++++++++++++ 2 files changed, 63 insertions(+), 2 deletions(-) diff --git a/OvmfPkg/Include/TdxCommondefs.inc b/OvmfPkg/Include/TdxCommondefs.inc index 970eac96592a..a29d2fad4233 100644 --- a/OvmfPkg/Include/TdxCommondefs.inc +++ b/OvmfPkg/Include/TdxCommondefs.inc @@ -15,8 +15,8 @@ FirmwareArgsOffset equ 800h WakeupArgsRelocatedMailBox equ 800h AcceptPageArgsPhysicalStart equ 800h AcceptPageArgsPhysicalEnd equ 808h -AcceptPageArgsChunkSize equ 810h -AcceptPageArgsPageSize equ 818h +AcceptPageArgsTopStackAddress equ 810h +AcceptPageArgsApStackSize equ 818h CpuArrivalOffset equ 900h CpusExitingOffset equ 0a00h TalliesOffset equ 0a08h diff --git a/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm b/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm index 034ac0ee9421..4a984ecc1058 100644 --- a/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm +++ b/OvmfPkg/IntelTdx/Sec/X64/IntelTdxAPs.nasm @@ -40,9 +40,70 @@ do_wait_loop: cmp eax, MpProtectedModeWakeupCommandWakeup je .do_wakeup + cmp eax, MpProtectedModeWakeupCommandAcceptPages + je .do_accept_pages + ; Don't support this command, so ignore jmp .check_command +.do_accept_pages: + ; + ; Read the top stack address from arguments + mov rsi, [rsp + AcceptPageArgsTopStackAddress] + + ; + ; Calculate the top stack address of the AP. + ; ApStackAddr = BaseStackAddr + (vCpuIndex) * ApStackSize + xor rdx, rdx + xor rbx, rbx + xor rax, rax + mov eax, [rsp + AcceptPageArgsApStackSize] + mov ebx, r9d ; vCpuIndex + mul ebx + add rsi, rax ; now rsi is ApStackAddr + +.start_accept_pages: + ; + ; Read the function address which will be called + mov rax, [rsp + WakeupVectorOffset] + + ; + ; vCPU index as the first argument + mov ecx, r9d + mov rdx, [rsp + AcceptPageArgsPhysicalStart] + mov r8, [rsp + AcceptPageArgsPhysicalEnd] + + ; save the Mailbox address to rbx + mov rbx, rsp + + ; + ; set AP Stack + mov rsp, rsi + nop + + ; save rax (the Mailbox address) + push rbx + + call rax + + ; recove rsp + pop rbx + mov rsp, rbx + ; + ; recover r8, r9 + mov rax, 1 + tdcall + + mov eax, 0FFFFFFFFh + lock xadd dword [rsp + CpusExitingOffset], eax + dec eax + +.check_exiting_cnt: + cmp eax, 0 + je do_wait_loop + mov eax, dword[rsp + CpusExitingOffset] + jmp .check_exiting_cnt + .do_wakeup: ; ; BSP sets these variables before unblocking APs -- 2.29.2.windows.2