From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web11.129091.1672018441335739938 for ; Sun, 25 Dec 2022 17:34:01 -0800 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=Rjsuad5w; spf=pass (domain: intel.com, ip: 192.55.52.88, mailfrom: min.m.xu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1672018441; x=1703554441; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=rF6BvjREhoxSxDfDyi/BnMHQGJpCFv/lB3xXoLVWfXY=; b=Rjsuad5wRNgCpVcIPRKH3eebtASttCt28Czjgmdsd0bnMcxb08h6rt7g Lum73yvoafEpr+3QgNUX/6+zIN5bgABsg5h1g+1P9TJjKOzxaHhNS7Rk1 DR85DsKwY9edlgJflr2niIh0794yp2EToMR44EK0pEGk0wuMdH25t3eMS ItELzxQcD/QdT19qJ7FJJJNp/LlE8SYFbvc0jhJlGO8WbTuPpfwC9WDsv 1tqxKH9NAUePPT7BJW2UeffBGEPItGodsHd0ZGQ7iI4PxjtOg9l5yHuuF gObtFnpdQWoxpeXPnbxuYzA6uHRKod76gAjvwyWN0qwUiS/SrRjugQS+W w==; X-IronPort-AV: E=McAfee;i="6500,9779,10571"; a="347697084" X-IronPort-AV: E=Sophos;i="5.96,274,1665471600"; d="scan'208";a="347697084" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Dec 2022 17:34:01 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10571"; a="826755456" X-IronPort-AV: E=Sophos;i="5.96,274,1665471600"; d="scan'208";a="826755456" Received: from mxu9-mobl1.ccr.corp.intel.com ([10.249.169.98]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Dec 2022 17:33:50 -0800 From: "Min Xu" To: devel@edk2.groups.io Cc: Min M Xu , Erdem Aktas , Gerd Hoffmann , James Bottomley , Jiewen Yao , Tom Lendacky Subject: [PATCH V1 1/3] OvmfPkg: Customize lazy-accept's end address Date: Mon, 26 Dec 2022 09:33:36 +0800 Message-Id: <20221226013338.1924-2-min.m.xu@intel.com> X-Mailer: git-send-email 2.29.2.windows.2 In-Reply-To: <20221226013338.1924-1-min.m.xu@intel.com> References: <20221226013338.1924-1-min.m.xu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Min M Xu BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4181 Current lazy-accept accepts the memory under address of 4G. To improve boot performance further more, we introduce the feature of customizing the physical end address of lazy-accept. The end address is indicated by PcdAcceptMemoryEndAddress. It means it accepts the memory under PcdAcceptMemoryEndAddress. The default value is 4G. In IntelTdxX64 PcdAcceptMemoryEndAddress can be customized on-demand in build-time by adding -D ACCEPT_MEMORY_END_ADDRESS=512 in build command. Cc: Erdem Aktas Cc: Gerd Hoffmann Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Signed-off-by: Min Xu --- OvmfPkg/IntelTdx/IntelTdxX64.dsc | 8 ++++ OvmfPkg/Library/PlatformInitLib/IntelTdx.c | 37 ++++++++++++++----- .../PlatformInitLib/PlatformInitLib.inf | 1 + OvmfPkg/OvmfPkg.dec | 2 + 4 files changed, 39 insertions(+), 9 deletions(-) diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc b/OvmfPkg/IntelTdx/IntelTdxX64.dsc index 6ec64df91871..46b0b96ad671 100644 --- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc +++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc @@ -62,6 +62,11 @@ # DEFINE UP_CPU_DXE_GUID = 6490f1c5-ebcc-4665-8892-0075b9bb49b7 + # + # Define the end of physical address of memory to be accepted. The unit is M. + # + DEFINE ACCEPT_MEMORY_END_ADDRESS = 512 + [BuildOptions] GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG INTEL:RELEASE_*_*_CC_FLAGS = /D MDEPKG_NDEBUG @@ -457,6 +462,9 @@ # TDX need 1G PageTable support gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable|TRUE + ## End of physical address of memory to be accepted. + gUefiOvmfPkgTokenSpaceGuid.PcdAcceptMemoryEndAddress|($(ACCEPT_MEMORY_END_ADDRESS)*0x100000) + gEfiShellPkgTokenSpaceGuid.PcdShellFileOperationSize|0x20000 # IRQs 5, 9, 10, 11 are level-triggered diff --git a/OvmfPkg/Library/PlatformInitLib/IntelTdx.c b/OvmfPkg/Library/PlatformInitLib/IntelTdx.c index 6cb63139cba0..9514badb8ef6 100644 --- a/OvmfPkg/Library/PlatformInitLib/IntelTdx.c +++ b/OvmfPkg/Library/PlatformInitLib/IntelTdx.c @@ -375,7 +375,8 @@ AcceptMemoryForAPsStack ( } /** - BSP and APs work togeter to accept memory which is under the address of 4G. + BSP and APs work togeter to accept memory which is under the address + indicated by PcdAcceptMemoryEndAddress. @param[in] VmmHobList The Hoblist pass the firmware @param[in] CpusNum Number of vCPUs @@ -400,13 +401,22 @@ AcceptMemory ( EFI_PHYSICAL_ADDRESS PhysicalEnd; EFI_PHYSICAL_ADDRESS AcceptMemoryEndAddress; - Status = EFI_SUCCESS; - AcceptMemoryEndAddress = BASE_4GB; + Status = EFI_SUCCESS; ASSERT (VmmHobList != NULL); Hob.Raw = (UINT8 *)VmmHobList; - DEBUG ((DEBUG_INFO, "AcceptMemory under address of 4G\n")); + AcceptMemoryEndAddress = (PHYSICAL_ADDRESS)FixedPcdGet64 (PcdAcceptMemoryEndAddress); + if (AcceptMemoryEndAddress == 0) { + AcceptMemoryEndAddress = MAX_UINT64; + } + + if (AcceptMemoryEndAddress <= PhysicalAddressStart) { + ASSERT (FALSE); + return EFI_SUCCESS; + } + + DEBUG ((DEBUG_INFO, "AcceptMemory till 0x%llx\n", AcceptMemoryEndAddress)); // // Parse the HOB list until end of list or matching type is found. @@ -816,11 +826,7 @@ BuildResourceDescriptorHobForUnacceptedMemory ( ResourceLength = Hob->ResourceLength; PhysicalEnd = PhysicalStart + ResourceLength; - // - // In the first stage of lazy-accept, all the memory under 4G will be accepted. - // The memory above 4G will not be accepted. - // - MaxAcceptedMemoryAddress = BASE_4GB; + MaxAcceptedMemoryAddress = FixedPcdGet64 (PcdAcceptMemoryEndAddress); if (PhysicalEnd <= MaxAcceptedMemoryAddress) { // @@ -833,6 +839,19 @@ BuildResourceDescriptorHobForUnacceptedMemory ( // This memory region hasn't been accepted. // So keep the ResourceType and ResourceAttribute unchange. // + } else if ((PhysicalStart < MaxAcceptedMemoryAddress) && (PhysicalEnd > MaxAcceptedMemoryAddress)) { + // + // Left part of the memory region is accepted. The right part is unaccepted. + // + BuildResourceDescriptorHob ( + EFI_RESOURCE_SYSTEM_MEMORY, + ResourceAttribute | (EFI_RESOURCE_ATTRIBUTE_PRESENT | EFI_RESOURCE_ATTRIBUTE_INITIALIZED | EFI_RESOURCE_ATTRIBUTE_TESTED), + PhysicalStart, + MaxAcceptedMemoryAddress - PhysicalStart + ); + + PhysicalStart = MaxAcceptedMemoryAddress; + ResourceLength = PhysicalEnd - MaxAcceptedMemoryAddress; } BuildResourceDescriptorHob ( diff --git a/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf b/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf index 140216979a54..2a909ade895b 100644 --- a/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf +++ b/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf @@ -100,6 +100,7 @@ gUefiOvmfPkgTokenSpaceGuid.PcdTdxAcceptPageSize gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase gUefiOvmfPkgTokenSpaceGuid.PcdCfvRawDataSize + gUefiOvmfPkgTokenSpaceGuid.PcdAcceptMemoryEndAddress [FeaturePcd] gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec index 693925a1dc7a..e6cc524e0f7f 100644 --- a/OvmfPkg/OvmfPkg.dec +++ b/OvmfPkg/OvmfPkg.dec @@ -408,6 +408,8 @@ ## The Tdx accept page size. 0x1000(4k),0x200000(2M) gUefiOvmfPkgTokenSpaceGuid.PcdTdxAcceptPageSize|0x200000|UINT32|0x65 + ## End of physical address of memory to be accepted + gUefiOvmfPkgTokenSpaceGuid.PcdAcceptMemoryEndAddress|0x100000000|UINT64|0x69 ## The QEMU fw_cfg variable that UefiDriverEntryPointFwCfgOverrideLib will # check to decide whether to abort dispatch of the driver it is linked into. -- 2.29.2.windows.2