From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web11.17194.1672935934598770659 for ; Thu, 05 Jan 2023 08:25:34 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=GG3exMI8; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D564D61B0F; Thu, 5 Jan 2023 16:25:33 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6E886C433D2; Thu, 5 Jan 2023 16:25:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1672935933; bh=OkNSnJIpqBPnqgB36IXN7nTiBmFXTFg1Dg7i4PN0QNg=; h=From:To:Cc:Subject:Date:From; b=GG3exMI861N0ro9U9KoHIIVjGfmUiUCN31QpGLclAzxIpLHGV/XPuR+3lIcv9JIjp UY0YD9iW17MZhL8b9QTvNBZnHBLww1J/Er2l4R1jNG7P2b4z0fnWqwQUImRZggxXY/ bjhCCl9TobQHzh02rkGgmsaUwzZXhOP4/cgvJdG0LSObWmliY/hlpTKTgNAc3Hz1go 2Wl4R37bllsaob1OeAXWqaXhwdGSMOf1EqPkVy9iLjKFLpPvcpzJUn4RtOJa+FFKWu A7lH+pknQddtwzkpucIHJP1M5qmkorO+e5wGYK9wbC9xFNU5vwxvZPqkoby6DnylFX WRpfho/ZQugYA== From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: dann.frazier@canonical.com, Ard Biesheuvel Subject: [PATCH v2 1/2] ArmVirtPkg/ArmPlatformLibQemu: Ensure that VFP is on before running C code Date: Thu, 5 Jan 2023 17:25:27 +0100 Message-Id: <20230105162528.1430368-1-ardb@kernel.org> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Now that we build the early code without strict alignment and without suppressing the use of SIMD registers, ensure that the VFP unit is on before entering C code. While at it, simplyify the mov_i macro, which is only used for 32-bit quantities. Signed-off-by: Ard Biesheuvel --- ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S | 12 +++= ++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelpe= r.S b/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S index 05ccc7f9f043..1787d52fbf51 100644 --- a/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S +++ b/ArmVirtPkg/Library/ArmPlatformLibQemu/AArch64/ArmPlatformHelper.S @@ -8,9 +8,7 @@ #include =0D =0D .macro mov_i, reg:req, imm:req=0D - movz \reg, :abs_g3:\imm=0D - movk \reg, :abs_g2_nc:\imm=0D - movk \reg, :abs_g1_nc:\imm=0D + movz \reg, :abs_g1:\imm=0D movk \reg, :abs_g0_nc:\imm=0D .endm=0D =0D @@ -45,10 +43,9 @@ =0D ASM_FUNC(ArmPlatformPeiBootAction)=0D mrs x0, CurrentEL // check current exception level=0D - tbz x0, #3, 0f // bail if above EL1=0D - ret=0D + tbnz x0, #3, 0f // omit early ID map if above EL1=0D =0D -0:mov_i x0, mairval=0D + mov_i x0, mairval=0D mov_i x1, tcrval=0D adrp x2, idmap=0D orr x2, x2, #0xff << 48 // set non-zero ASID=0D @@ -87,7 +84,8 @@ ASM_FUNC(ArmPlatformPeiBootAction) =0D msr sctlr_el1, x3 // enable MMU and caches=0D isb=0D - ret=0D +=0D +0:b ArmEnableVFP // enable SIMD before entering C code=0D =0D //UINTN=0D //ArmPlatformGetCorePosition (=0D --=20 2.39.0