From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by mx.groups.io with SMTP id smtpd.web11.11289.1673003697687962545 for ; Fri, 06 Jan 2023 03:14:58 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@redhat.com header.s=mimecast20190719 header.b=R9WTsvI6; spf=pass (domain: redhat.com, ip: 170.10.129.124, mailfrom: kraxel@redhat.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1673003696; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=L6H2ZBseQQH1MFXMKWkrmLDXcWlKoG6l8W9N/GTGcEo=; b=R9WTsvI6q4/4Sm/K13NchTVcl8w8tLlIw06E2czTnDPifAmPszm6F7wfKtNd/rpnqhWhZR AafmiUjZS5mAlb2CL1AfQjqxdd5cbMKk2A7Cwi9GzMfWvBkgXO3JoLc0GrJ7Nr+udBOoFf 3csbP2Hu0MWzxhZcp5szy8MfsfAfdTg= Received: from mimecast-mx02.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-669-XTwLIg4UNDiJOdFibB-Izw-1; Fri, 06 Jan 2023 06:14:53 -0500 X-MC-Unique: XTwLIg4UNDiJOdFibB-Izw-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.rdu2.redhat.com [10.11.54.7]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id A94571C0A58B; Fri, 6 Jan 2023 11:14:52 +0000 (UTC) Received: from sirius.home.kraxel.org (unknown [10.39.192.238]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 371D3140EBF5; Fri, 6 Jan 2023 11:14:52 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 607891800081; Fri, 6 Jan 2023 12:14:49 +0100 (CET) Date: Fri, 6 Jan 2023 12:14:49 +0100 From: "Gerd Hoffmann" To: Laszlo Ersek Cc: devel@edk2.groups.io, ray.ni@intel.com, "ardb@kernel.org" , "Xie, Yuanhao" , "thomas.lendacky@amd.com" Subject: Re: [edk2-devel] [PATCH] UefiCpuPkg:Fixed AsmRelocateApLoopStart and ensure allocated memory <4GB Message-ID: <20230106111449.hirlrxwof2v5dc7i@sirius.home.kraxel.org> References: <20230105062108.1796-1-yuanhao.xie@intel.com> <20230106080300.tsohpx24ddxjo5x4@sirius.home.kraxel.org> <28b1ecd3-631e-8f00-6495-acd9ec76037b@redhat.com> <236acf95-68b9-16c7-f34f-4a57c73a8137@redhat.com> MIME-Version: 1.0 In-Reply-To: <236acf95-68b9-16c7-f34f-4a57c73a8137@redhat.com> X-Scanned-By: MIMEDefang 3.1 on 10.11.54.7 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi, > Now, there *is* one benefit I can imagine. For Intel maintainers, it may > be difficult to maintain and to "route around" the SEV-related stuff in > "X64/MpFuncs.nasm", in the long term. I can wholly accept that. So > splitting and duplicating the assembly code for that purpose is > justified. But then the commit message should state this, and not > present "staying in 64-bit" as a benefit per se. > > Then the purpose is to ease the assembly code maintenance for Intel > developers. Entirely justified goal in my view; nobody likes to work > with complicated code they can't regression-test (and I presume Intel > developers can't easily test the various SEV enablement levels in-house, > on a range of AMD processors). Which is exactly why I suggested to catch the SEV case by checking the PCD we have for that in C code. That'll also remove the confusion we have right now wrt intel + amd processors. The special case we have to worry about is SEV being active, not running on a AMD processor. In case SEV is not active we'll just have the IA32 and X64 cases. take care, Gerd