* [PATCH v3 1/8] OvmfPkg/PlatformInitLib: Add PlatformScanE820 and GetFirstNonAddressCB
2023-01-12 9:34 [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts Gerd Hoffmann
@ 2023-01-12 9:34 ` Gerd Hoffmann
2023-01-12 9:34 ` [PATCH v3 2/8] OvmfPkg/PlatformInitLib: Add PlatformGetLowMemoryCB Gerd Hoffmann
` (7 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Gerd Hoffmann @ 2023-01-12 9:34 UTC (permalink / raw)
To: devel
Cc: Oliver Steffen, László Érsek, Ard Biesheuvel,
Jordan Justen, Pawel Polawski, Jiewen Yao, Gerd Hoffmann
First step replacing the PlatformScanOrAdd64BitE820Ram() function.
Add a PlatformScanE820() function which loops over the e280 entries
from FwCfg and calls a callback for each of them.
Add a GetFirstNonAddressCB() function which will store the first free
address (right after the last RAM block) in
PlatformInfoHob->FirstNonAddress. This replaces calls to
PlatformScanOrAdd64BitE820Ram() with non-NULL MaxAddress.
Write any actions done (setting FirstNonAddress) to the firmware log
with INFO loglevel.
Also drop local FirstNonAddress variables and use
PlatformInfoHob->FirstNonAddress instead everywhere.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
OvmfPkg/Library/PlatformInitLib/MemDetect.c | 115 ++++++++++++++++----
1 file changed, 92 insertions(+), 23 deletions(-)
diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
index 0c4956852689..dd98622de561 100644
--- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
+++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
@@ -251,6 +251,83 @@ PlatformScanOrAdd64BitE820Ram (
return EFI_SUCCESS;
}
+typedef VOID (*E820_SCAN_CALLBACK) (
+ EFI_E820_ENTRY64 *E820Entry,
+ EFI_HOB_PLATFORM_INFO *PlatformInfoHob
+ );
+
+/**
+ Store first address not used by e820 RAM entries in
+ PlatformInfoHob->FirstNonAddress
+**/
+VOID
+PlatformGetFirstNonAddressCB (
+ IN EFI_E820_ENTRY64 *E820Entry,
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
+ )
+{
+ UINT64 Candidate;
+
+ if (E820Entry->Type != EfiAcpiAddressRangeMemory) {
+ return;
+ }
+
+ Candidate = E820Entry->BaseAddr + E820Entry->Length;
+ if (PlatformInfoHob->FirstNonAddress < Candidate) {
+ DEBUG ((DEBUG_INFO, "%a: FirstNonAddress=0x%Lx\n", __FUNCTION__, Candidate));
+ PlatformInfoHob->FirstNonAddress = Candidate;
+ }
+}
+
+/**
+ Iterate over the entries in QEMU's fw_cfg E820 RAM map, call the
+ passed callback for each entry.
+
+ @param[in] Callback The callback function to be called.
+
+ @param[in out] PlatformInfoHob PlatformInfo struct which is passed
+ through to the callback.
+
+ @retval EFI_SUCCESS The fw_cfg E820 RAM map was found and processed.
+
+ @retval EFI_PROTOCOL_ERROR The RAM map was found, but its size wasn't a
+ whole multiple of sizeof(EFI_E820_ENTRY64). No
+ RAM entry was processed.
+
+ @return Error codes from QemuFwCfgFindFile(). No RAM
+ entry was processed.
+**/
+STATIC
+EFI_STATUS
+PlatformScanE820 (
+ IN E820_SCAN_CALLBACK Callback,
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
+ )
+{
+ EFI_STATUS Status;
+ FIRMWARE_CONFIG_ITEM FwCfgItem;
+ UINTN FwCfgSize;
+ EFI_E820_ENTRY64 E820Entry;
+ UINTN Processed;
+
+ Status = QemuFwCfgFindFile ("etc/e820", &FwCfgItem, &FwCfgSize);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ if (FwCfgSize % sizeof E820Entry != 0) {
+ return EFI_PROTOCOL_ERROR;
+ }
+
+ QemuFwCfgSelectItem (FwCfgItem);
+ for (Processed = 0; Processed < FwCfgSize; Processed += sizeof E820Entry) {
+ QemuFwCfgReadBytes (sizeof E820Entry, &E820Entry);
+ Callback (&E820Entry, PlatformInfoHob);
+ }
+
+ return EFI_SUCCESS;
+}
+
/**
Returns PVH memmap
@@ -384,23 +461,17 @@ PlatformGetSystemMemorySizeAbove4gb (
Return the highest address that DXE could possibly use, plus one.
**/
STATIC
-UINT64
+VOID
PlatformGetFirstNonAddress (
IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
- UINT64 FirstNonAddress;
UINT32 FwCfgPciMmio64Mb;
EFI_STATUS Status;
FIRMWARE_CONFIG_ITEM FwCfgItem;
UINTN FwCfgSize;
UINT64 HotPlugMemoryEnd;
- //
- // set FirstNonAddress to suppress incorrect compiler/analyzer warnings
- //
- FirstNonAddress = 0;
-
//
// If QEMU presents an E820 map, then get the highest exclusive >=4GB RAM
// address from it. This can express an address >= 4GB+1TB.
@@ -408,9 +479,10 @@ PlatformGetFirstNonAddress (
// Otherwise, get the flat size of the memory above 4GB from the CMOS (which
// can only express a size smaller than 1TB), and add it to 4GB.
//
- Status = PlatformScanOrAdd64BitE820Ram (FALSE, NULL, &FirstNonAddress);
+ PlatformInfoHob->FirstNonAddress = BASE_4GB;
+ Status = PlatformScanE820 (PlatformGetFirstNonAddressCB, PlatformInfoHob);
if (EFI_ERROR (Status)) {
- FirstNonAddress = BASE_4GB + PlatformGetSystemMemorySizeAbove4gb ();
+ PlatformInfoHob->FirstNonAddress = BASE_4GB + PlatformGetSystemMemorySizeAbove4gb ();
}
//
@@ -420,7 +492,7 @@ PlatformGetFirstNonAddress (
//
#ifdef MDE_CPU_IA32
if (!FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {
- return FirstNonAddress;
+ return;
}
#endif
@@ -473,7 +545,7 @@ PlatformGetFirstNonAddress (
// determines the highest address plus one. The memory hotplug area (see
// below) plays no role for the firmware in this case.
//
- return FirstNonAddress;
+ return;
}
//
@@ -497,15 +569,15 @@ PlatformGetFirstNonAddress (
HotPlugMemoryEnd
));
- ASSERT (HotPlugMemoryEnd >= FirstNonAddress);
- FirstNonAddress = HotPlugMemoryEnd;
+ ASSERT (HotPlugMemoryEnd >= PlatformInfoHob->FirstNonAddress);
+ PlatformInfoHob->FirstNonAddress = HotPlugMemoryEnd;
}
//
// SeaBIOS aligns both boundaries of the 64-bit PCI host aperture to 1GB, so
// that the host can map it with 1GB hugepages. Follow suit.
//
- PlatformInfoHob->PcdPciMmio64Base = ALIGN_VALUE (FirstNonAddress, (UINT64)SIZE_1GB);
+ PlatformInfoHob->PcdPciMmio64Base = ALIGN_VALUE (PlatformInfoHob->FirstNonAddress, (UINT64)SIZE_1GB);
PlatformInfoHob->PcdPciMmio64Size = ALIGN_VALUE (PlatformInfoHob->PcdPciMmio64Size, (UINT64)SIZE_1GB);
//
@@ -519,8 +591,8 @@ PlatformGetFirstNonAddress (
//
// The useful address space ends with the 64-bit PCI host aperture.
//
- FirstNonAddress = PlatformInfoHob->PcdPciMmio64Base + PlatformInfoHob->PcdPciMmio64Size;
- return FirstNonAddress;
+ PlatformInfoHob->FirstNonAddress = PlatformInfoHob->PcdPciMmio64Base + PlatformInfoHob->PcdPciMmio64Size;
+ return;
}
/*
@@ -781,7 +853,6 @@ PlatformAddressWidthInitialization (
IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
- UINT64 FirstNonAddress;
UINT8 PhysMemAddressWidth;
EFI_STATUS Status;
@@ -794,7 +865,7 @@ PlatformAddressWidthInitialization (
// First scan host-provided hardware information to assess if the address
// space is already known. If so, guest must use those values.
//
- Status = PlatformScanHostProvided64BitPciMmioEnd (&FirstNonAddress);
+ Status = PlatformScanHostProvided64BitPciMmioEnd (&PlatformInfoHob->FirstNonAddress);
if (EFI_ERROR (Status)) {
//
@@ -806,13 +877,12 @@ PlatformAddressWidthInitialization (
// The DXL IPL keys off of the physical address bits advertized in the CPU
// HOB. To conserve memory, we calculate the minimum address width here.
//
- FirstNonAddress = PlatformGetFirstNonAddress (PlatformInfoHob);
+ PlatformGetFirstNonAddress (PlatformInfoHob);
}
PlatformAddressWidthFromCpuid (PlatformInfoHob, TRUE);
if (PlatformInfoHob->PhysMemAddressWidth != 0) {
// physical address width is known
- PlatformInfoHob->FirstNonAddress = FirstNonAddress;
PlatformDynamicMmioWindow (PlatformInfoHob);
return;
}
@@ -823,13 +893,13 @@ PlatformAddressWidthInitialization (
// -> try be conservstibe to stay below the guaranteed minimum of
// 36 phys bits (aka 64 GB).
//
- PhysMemAddressWidth = (UINT8)HighBitSet64 (FirstNonAddress);
+ PhysMemAddressWidth = (UINT8)HighBitSet64 (PlatformInfoHob->FirstNonAddress);
//
// If FirstNonAddress is not an integral power of two, then we need an
// additional bit.
//
- if ((FirstNonAddress & (FirstNonAddress - 1)) != 0) {
+ if ((PlatformInfoHob->FirstNonAddress & (PlatformInfoHob->FirstNonAddress - 1)) != 0) {
++PhysMemAddressWidth;
}
@@ -857,7 +927,6 @@ PlatformAddressWidthInitialization (
ASSERT (PhysMemAddressWidth <= 48);
#endif
- PlatformInfoHob->FirstNonAddress = FirstNonAddress;
PlatformInfoHob->PhysMemAddressWidth = PhysMemAddressWidth;
}
--
2.39.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 2/8] OvmfPkg/PlatformInitLib: Add PlatformGetLowMemoryCB
2023-01-12 9:34 [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts Gerd Hoffmann
2023-01-12 9:34 ` [PATCH v3 1/8] OvmfPkg/PlatformInitLib: Add PlatformScanE820 and GetFirstNonAddressCB Gerd Hoffmann
@ 2023-01-12 9:34 ` Gerd Hoffmann
2023-01-12 9:34 ` [PATCH v3 3/8] OvmfPkg/PlatformInitLib: Add PlatformAddHobCB Gerd Hoffmann
` (6 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Gerd Hoffmann @ 2023-01-12 9:34 UTC (permalink / raw)
To: devel
Cc: Oliver Steffen, László Érsek, Ard Biesheuvel,
Jordan Justen, Pawel Polawski, Jiewen Yao, Gerd Hoffmann
Add PlatformGetLowMemoryCB() callback function for use with
PlatformScanE820(). It stores the low memory size in
PlatformInfoHob->LowMemory. This replaces calls to
PlatformScanOrAdd64BitE820Ram() with non-NULL LowMemory.
Write any actions done (setting LowMemory) to the firmware log
with INFO loglevel.
Also change PlatformGetSystemMemorySizeBelow4gb() to likewise set
PlatformInfoHob->LowMemory instead of returning the value. Update
all Callers to the new convention.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
OvmfPkg/Include/Library/PlatformInitLib.h | 3 +-
OvmfPkg/Library/PeilessStartupLib/Hob.c | 3 +-
.../PeilessStartupLib/PeilessStartup.c | 7 +-
OvmfPkg/Library/PlatformInitLib/MemDetect.c | 69 +++++++++++++------
OvmfPkg/Library/PlatformInitLib/Platform.c | 7 +-
OvmfPkg/PlatformPei/MemDetect.c | 3 +-
6 files changed, 59 insertions(+), 33 deletions(-)
diff --git a/OvmfPkg/Include/Library/PlatformInitLib.h b/OvmfPkg/Include/Library/PlatformInitLib.h
index bf6f90a5761c..051b31191194 100644
--- a/OvmfPkg/Include/Library/PlatformInitLib.h
+++ b/OvmfPkg/Include/Library/PlatformInitLib.h
@@ -26,6 +26,7 @@ typedef struct {
BOOLEAN Q35SmramAtDefaultSmbase;
UINT16 Q35TsegMbytes;
+ UINT32 LowMemory;
UINT64 FirstNonAddress;
UINT8 PhysMemAddressWidth;
UINT32 Uc32Base;
@@ -144,7 +145,7 @@ PlatformQemuUc32BaseInitialization (
IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
);
-UINT32
+VOID
EFIAPI
PlatformGetSystemMemorySizeBelow4gb (
IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
diff --git a/OvmfPkg/Library/PeilessStartupLib/Hob.c b/OvmfPkg/Library/PeilessStartupLib/Hob.c
index 630ce445ebec..318b74c95d8e 100644
--- a/OvmfPkg/Library/PeilessStartupLib/Hob.c
+++ b/OvmfPkg/Library/PeilessStartupLib/Hob.c
@@ -42,7 +42,8 @@ ConstructSecHobList (
ZeroMem (&PlatformInfoHob, sizeof (PlatformInfoHob));
PlatformInfoHob.HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
- LowMemorySize = PlatformGetSystemMemorySizeBelow4gb (&PlatformInfoHob);
+ PlatformGetSystemMemorySizeBelow4gb (&PlatformInfoHob);
+ LowMemorySize = PlatformInfoHob.LowMemory;
ASSERT (LowMemorySize != 0);
LowMemoryStart = FixedPcdGet32 (PcdOvmfDxeMemFvBase) + FixedPcdGet32 (PcdOvmfDxeMemFvSize);
LowMemorySize -= LowMemoryStart;
diff --git a/OvmfPkg/Library/PeilessStartupLib/PeilessStartup.c b/OvmfPkg/Library/PeilessStartupLib/PeilessStartup.c
index 380e71597206..928120d183ba 100644
--- a/OvmfPkg/Library/PeilessStartupLib/PeilessStartup.c
+++ b/OvmfPkg/Library/PeilessStartupLib/PeilessStartup.c
@@ -41,8 +41,7 @@ InitializePlatform (
EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
- UINT32 LowerMemorySize;
- VOID *VariableStore;
+ VOID *VariableStore;
DEBUG ((DEBUG_INFO, "InitializePlatform in Pei-less boot\n"));
PlatformDebugDumpCmos ();
@@ -70,14 +69,14 @@ InitializePlatform (
PlatformInfoHob->PcdCpuBootLogicalProcessorNumber
));
- LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
PlatformQemuUc32BaseInitialization (PlatformInfoHob);
DEBUG ((
DEBUG_INFO,
"Uc32Base = 0x%x, Uc32Size = 0x%x, LowerMemorySize = 0x%x\n",
PlatformInfoHob->Uc32Base,
PlatformInfoHob->Uc32Size,
- LowerMemorySize
+ PlatformInfoHob->LowMemory
));
VariableStore = PlatformReserveEmuVariableNvStore ();
diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
index dd98622de561..153f958b76ee 100644
--- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
+++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
@@ -51,18 +51,16 @@ PlatformQemuUc32BaseInitialization (
IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
- UINT32 LowerMemorySize;
-
if (PlatformInfoHob->HostBridgeDevId == 0xffff /* microvm */) {
return;
}
if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
- LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
ASSERT (PcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32);
- ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >= LowerMemorySize);
+ ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >= PlatformInfoHob->LowMemory);
- if (LowerMemorySize <= BASE_2GB) {
+ if (PlatformInfoHob->LowMemory <= BASE_2GB) {
// Newer qemu with gigabyte aligned memory,
// 32-bit pci mmio window is 2G -> 4G then.
PlatformInfoHob->Uc32Base = BASE_2GB;
@@ -92,8 +90,8 @@ PlatformQemuUc32BaseInitialization (
// variable MTRR suffices by truncating the size to a whole power of two,
// while keeping the end affixed to 4GB. This will round the base up.
//
- LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
- PlatformInfoHob->Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - LowerMemorySize));
+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ PlatformInfoHob->Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - PlatformInfoHob->LowMemory));
PlatformInfoHob->Uc32Base = (UINT32)(SIZE_4GB - PlatformInfoHob->Uc32Size);
//
// Assuming that LowerMemorySize is at least 1 byte, Uc32Size is at most 2GB.
@@ -101,13 +99,13 @@ PlatformQemuUc32BaseInitialization (
//
ASSERT (PlatformInfoHob->Uc32Base >= BASE_2GB);
- if (PlatformInfoHob->Uc32Base != LowerMemorySize) {
+ if (PlatformInfoHob->Uc32Base != PlatformInfoHob->LowMemory) {
DEBUG ((
DEBUG_VERBOSE,
"%a: rounded UC32 base from 0x%x up to 0x%x, for "
"an UC32 size of 0x%x\n",
__FUNCTION__,
- LowerMemorySize,
+ PlatformInfoHob->LowMemory,
PlatformInfoHob->Uc32Base,
PlatformInfoHob->Uc32Size
));
@@ -279,6 +277,33 @@ PlatformGetFirstNonAddressCB (
}
}
+/**
+ Store the low (below 4G) memory size in
+ PlatformInfoHob->LowMemory
+**/
+STATIC VOID
+PlatformGetLowMemoryCB (
+ IN EFI_E820_ENTRY64 *E820Entry,
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
+ )
+{
+ UINT64 Candidate;
+
+ if (E820Entry->Type != EfiAcpiAddressRangeMemory) {
+ return;
+ }
+
+ Candidate = E820Entry->BaseAddr + E820Entry->Length;
+ if (Candidate >= BASE_4GB) {
+ return;
+ }
+
+ if (PlatformInfoHob->LowMemory < Candidate) {
+ DEBUG ((DEBUG_INFO, "%a: LowMemory=0x%Lx\n", __FUNCTION__, Candidate));
+ PlatformInfoHob->LowMemory = (UINT32)Candidate;
+ }
+}
+
/**
Iterate over the entries in QEMU's fw_cfg E820 RAM map, call the
passed callback for each entry.
@@ -395,14 +420,13 @@ GetHighestSystemMemoryAddressFromPvhMemmap (
return HighestAddress;
}
-UINT32
+VOID
EFIAPI
PlatformGetSystemMemorySizeBelow4gb (
IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
EFI_STATUS Status;
- UINT64 LowerMemorySize = 0;
UINT8 Cmos0x34;
UINT8 Cmos0x35;
@@ -410,12 +434,13 @@ PlatformGetSystemMemorySizeBelow4gb (
(CcProbe () != CcGuestTypeIntelTdx))
{
// Get the information from PVH memmap
- return (UINT32)GetHighestSystemMemoryAddressFromPvhMemmap (TRUE);
+ PlatformInfoHob->LowMemory = (UINT32)GetHighestSystemMemoryAddressFromPvhMemmap (TRUE);
+ return;
}
- Status = PlatformScanOrAdd64BitE820Ram (FALSE, &LowerMemorySize, NULL);
- if ((Status == EFI_SUCCESS) && (LowerMemorySize > 0)) {
- return (UINT32)LowerMemorySize;
+ Status = PlatformScanE820 (PlatformGetLowMemoryCB, PlatformInfoHob);
+ if (!EFI_ERROR (Status) && (PlatformInfoHob->LowMemory > 0)) {
+ return;
}
//
@@ -430,7 +455,7 @@ PlatformGetSystemMemorySizeBelow4gb (
Cmos0x34 = (UINT8)PlatformCmosRead8 (0x34);
Cmos0x35 = (UINT8)PlatformCmosRead8 (0x35);
- return (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);
+ PlatformInfoHob->LowMemory = (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);
}
STATIC
@@ -966,7 +991,6 @@ PlatformQemuInitializeRam (
IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
)
{
- UINT64 LowerMemorySize;
UINT64 UpperMemorySize;
MTRR_SETTINGS MtrrSettings;
EFI_STATUS Status;
@@ -976,7 +1000,7 @@ PlatformQemuInitializeRam (
//
// Determine total memory size available
//
- LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
if (PlatformInfoHob->BootMode == BOOT_ON_S3_RESUME) {
//
@@ -1010,14 +1034,14 @@ PlatformQemuInitializeRam (
UINT32 TsegSize;
TsegSize = PlatformInfoHob->Q35TsegMbytes * SIZE_1MB;
- PlatformAddMemoryRangeHob (BASE_1MB, LowerMemorySize - TsegSize);
+ PlatformAddMemoryRangeHob (BASE_1MB, PlatformInfoHob->LowMemory - TsegSize);
PlatformAddReservedMemoryBaseSizeHob (
- LowerMemorySize - TsegSize,
+ PlatformInfoHob->LowMemory - TsegSize,
TsegSize,
TRUE
);
} else {
- PlatformAddMemoryRangeHob (BASE_1MB, LowerMemorySize);
+ PlatformAddMemoryRangeHob (BASE_1MB, PlatformInfoHob->LowMemory);
}
//
@@ -1195,9 +1219,10 @@ PlatformQemuInitializeRamForS3 (
// Make sure the TSEG area that we reported as a reserved memory resource
// cannot be used for reserved memory allocations.
//
+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
TsegSize = PlatformInfoHob->Q35TsegMbytes * SIZE_1MB;
BuildMemoryAllocationHob (
- PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob) - TsegSize,
+ PlatformInfoHob->LowMemory - TsegSize,
TsegSize,
EfiReservedMemoryType
);
diff --git a/OvmfPkg/Library/PlatformInitLib/Platform.c b/OvmfPkg/Library/PlatformInitLib/Platform.c
index 3e13c5d4b34f..9ab0342fd8c0 100644
--- a/OvmfPkg/Library/PlatformInitLib/Platform.c
+++ b/OvmfPkg/Library/PlatformInitLib/Platform.c
@@ -128,7 +128,6 @@ PlatformMemMapInitialization (
{
UINT64 PciIoBase;
UINT64 PciIoSize;
- UINT32 TopOfLowRam;
UINT64 PciExBarBase;
UINT32 PciBase;
UINT32 PciSize;
@@ -150,7 +149,7 @@ PlatformMemMapInitialization (
return;
}
- TopOfLowRam = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
PciExBarBase = 0;
if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
//
@@ -158,11 +157,11 @@ PlatformMemMapInitialization (
// the base of the 32-bit PCI host aperture.
//
PciExBarBase = PcdGet64 (PcdPciExpressBaseAddress);
- ASSERT (TopOfLowRam <= PciExBarBase);
+ ASSERT (PlatformInfoHob->LowMemory <= PciExBarBase);
ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
} else {
- ASSERT (TopOfLowRam <= PlatformInfoHob->Uc32Base);
+ ASSERT (PlatformInfoHob->LowMemory <= PlatformInfoHob->Uc32Base);
PciBase = PlatformInfoHob->Uc32Base;
}
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index 3d8375320dcb..41d186986ba8 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -271,7 +271,8 @@ PublishPeiMemory (
UINT32 S3AcpiReservedMemoryBase;
UINT32 S3AcpiReservedMemorySize;
- LowerMemorySize = PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ LowerMemorySize = PlatformInfoHob->LowMemory;
if (PlatformInfoHob->SmmSmramRequire) {
//
// TSEG is chipped from the end of low RAM
--
2.39.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 3/8] OvmfPkg/PlatformInitLib: Add PlatformAddHobCB
2023-01-12 9:34 [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts Gerd Hoffmann
2023-01-12 9:34 ` [PATCH v3 1/8] OvmfPkg/PlatformInitLib: Add PlatformScanE820 and GetFirstNonAddressCB Gerd Hoffmann
2023-01-12 9:34 ` [PATCH v3 2/8] OvmfPkg/PlatformInitLib: Add PlatformGetLowMemoryCB Gerd Hoffmann
@ 2023-01-12 9:34 ` Gerd Hoffmann
2023-01-12 9:34 ` [PATCH v3 4/8] OvmfPkg/PlatformInitLib: Add PlatformReservationConflictCB Gerd Hoffmann
` (5 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Gerd Hoffmann @ 2023-01-12 9:34 UTC (permalink / raw)
To: devel
Cc: Oliver Steffen, László Érsek, Ard Biesheuvel,
Jordan Justen, Pawel Polawski, Jiewen Yao, Gerd Hoffmann
Add PlatformAddHobCB() callback function for use with
PlatformScanE820(). It adds HOBs for high memory and reservations (low
memory is handled elsewhere because there are some special cases to
consider). This replaces calls to PlatformScanOrAdd64BitE820Ram() with
AddHighHobs = TRUE.
Write any actions done (adding HOBs, skip unknown types) to the firmware
log with INFO loglevel.
Also remove PlatformScanOrAdd64BitE820Ram() which is not used any more.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
OvmfPkg/Library/PlatformInitLib/MemDetect.c | 185 +++++---------------
1 file changed, 47 insertions(+), 138 deletions(-)
diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
index 153f958b76ee..8a3a197b5fa7 100644
--- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
+++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
@@ -112,143 +112,6 @@ PlatformQemuUc32BaseInitialization (
}
}
-/**
- Iterate over the RAM entries in QEMU's fw_cfg E820 RAM map that start outside
- of the 32-bit address range.
-
- Find the highest exclusive >=4GB RAM address, or produce memory resource
- descriptor HOBs for RAM entries that start at or above 4GB.
-
- @param[out] MaxAddress If MaxAddress is NULL, then PlatformScanOrAdd64BitE820Ram()
- produces memory resource descriptor HOBs for RAM
- entries that start at or above 4GB.
-
- Otherwise, MaxAddress holds the highest exclusive
- >=4GB RAM address on output. If QEMU's fw_cfg E820
- RAM map contains no RAM entry that starts outside of
- the 32-bit address range, then MaxAddress is exactly
- 4GB on output.
-
- @retval EFI_SUCCESS The fw_cfg E820 RAM map was found and processed.
-
- @retval EFI_PROTOCOL_ERROR The RAM map was found, but its size wasn't a
- whole multiple of sizeof(EFI_E820_ENTRY64). No
- RAM entry was processed.
-
- @return Error codes from QemuFwCfgFindFile(). No RAM
- entry was processed.
-**/
-STATIC
-EFI_STATUS
-PlatformScanOrAdd64BitE820Ram (
- IN BOOLEAN AddHighHob,
- OUT UINT64 *LowMemory OPTIONAL,
- OUT UINT64 *MaxAddress OPTIONAL
- )
-{
- EFI_STATUS Status;
- FIRMWARE_CONFIG_ITEM FwCfgItem;
- UINTN FwCfgSize;
- EFI_E820_ENTRY64 E820Entry;
- UINTN Processed;
-
- Status = QemuFwCfgFindFile ("etc/e820", &FwCfgItem, &FwCfgSize);
- if (EFI_ERROR (Status)) {
- return Status;
- }
-
- if (FwCfgSize % sizeof E820Entry != 0) {
- return EFI_PROTOCOL_ERROR;
- }
-
- if (LowMemory != NULL) {
- *LowMemory = 0;
- }
-
- if (MaxAddress != NULL) {
- *MaxAddress = BASE_4GB;
- }
-
- QemuFwCfgSelectItem (FwCfgItem);
- for (Processed = 0; Processed < FwCfgSize; Processed += sizeof E820Entry) {
- QemuFwCfgReadBytes (sizeof E820Entry, &E820Entry);
- DEBUG ((
- DEBUG_VERBOSE,
- "%a: Base=0x%Lx Length=0x%Lx Type=%u\n",
- __FUNCTION__,
- E820Entry.BaseAddr,
- E820Entry.Length,
- E820Entry.Type
- ));
- if (E820Entry.Type == EfiAcpiAddressRangeMemory) {
- if (AddHighHob && (E820Entry.BaseAddr >= BASE_4GB)) {
- UINT64 Base;
- UINT64 End;
-
- //
- // Round up the start address, and round down the end address.
- //
- Base = ALIGN_VALUE (E820Entry.BaseAddr, (UINT64)EFI_PAGE_SIZE);
- End = (E820Entry.BaseAddr + E820Entry.Length) &
- ~(UINT64)EFI_PAGE_MASK;
- if (Base < End) {
- PlatformAddMemoryRangeHob (Base, End);
- DEBUG ((
- DEBUG_VERBOSE,
- "%a: PlatformAddMemoryRangeHob [0x%Lx, 0x%Lx)\n",
- __FUNCTION__,
- Base,
- End
- ));
- }
- }
-
- if (MaxAddress || LowMemory) {
- UINT64 Candidate;
-
- Candidate = E820Entry.BaseAddr + E820Entry.Length;
- if (MaxAddress && (Candidate > *MaxAddress)) {
- *MaxAddress = Candidate;
- DEBUG ((
- DEBUG_VERBOSE,
- "%a: MaxAddress=0x%Lx\n",
- __FUNCTION__,
- *MaxAddress
- ));
- }
-
- if (LowMemory && (Candidate > *LowMemory) && (Candidate < BASE_4GB)) {
- *LowMemory = Candidate;
- DEBUG ((
- DEBUG_VERBOSE,
- "%a: LowMemory=0x%Lx\n",
- __FUNCTION__,
- *LowMemory
- ));
- }
- }
- } else if (E820Entry.Type == EfiAcpiAddressRangeReserved) {
- if (AddHighHob) {
- DEBUG ((
- DEBUG_INFO,
- "%a: Reserved: Base=0x%Lx Length=0x%Lx\n",
- __FUNCTION__,
- E820Entry.BaseAddr,
- E820Entry.Length
- ));
- BuildResourceDescriptorHob (
- EFI_RESOURCE_MEMORY_RESERVED,
- 0,
- E820Entry.BaseAddr,
- E820Entry.Length
- );
- }
- }
- }
-
- return EFI_SUCCESS;
-}
-
typedef VOID (*E820_SCAN_CALLBACK) (
EFI_E820_ENTRY64 *E820Entry,
EFI_HOB_PLATFORM_INFO *PlatformInfoHob
@@ -304,6 +167,52 @@ PlatformGetLowMemoryCB (
}
}
+/**
+ Create HOBs for reservations and RAM (except low memory).
+**/
+STATIC VOID
+PlatformAddHobCB (
+ IN EFI_E820_ENTRY64 *E820Entry,
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
+ )
+{
+ UINT64 Base, End;
+
+ Base = E820Entry->BaseAddr;
+ End = E820Entry->BaseAddr + E820Entry->Length;
+
+ switch (E820Entry->Type) {
+ case EfiAcpiAddressRangeMemory:
+ if (Base >= BASE_4GB) {
+ //
+ // Round up the start address, and round down the end address.
+ //
+ Base = ALIGN_VALUE (Base, (UINT64)EFI_PAGE_SIZE);
+ End = End & ~(UINT64)EFI_PAGE_MASK;
+ if (Base < End) {
+ DEBUG ((DEBUG_INFO, "%a: HighMemory [0x%Lx, 0x%Lx)\n", __FUNCTION__, Base, End-1));
+ PlatformAddMemoryRangeHob (Base, End);
+ }
+ }
+
+ break;
+ case EfiAcpiAddressRangeReserved:
+ BuildResourceDescriptorHob (EFI_RESOURCE_MEMORY_RESERVED, 0, Base, End);
+ DEBUG ((DEBUG_INFO, "%a: Reserved [0x%Lx, 0x%Lx)\n", __FUNCTION__, Base, End-1));
+ break;
+ default:
+ DEBUG ((
+ DEBUG_WARN,
+ "%a: Type %u [0x%Lx, 0x%Lx) (NOT HANDLED)\n",
+ __FUNCTION__,
+ E820Entry->Type,
+ Base,
+ End-1
+ ));
+ break;
+ }
+}
+
/**
Iterate over the entries in QEMU's fw_cfg E820 RAM map, call the
passed callback for each entry.
@@ -1049,7 +958,7 @@ PlatformQemuInitializeRam (
// entries. Otherwise, create a single memory HOB with the flat >=4GB
// memory size read from the CMOS.
//
- Status = PlatformScanOrAdd64BitE820Ram (TRUE, NULL, NULL);
+ Status = PlatformScanE820 (PlatformAddHobCB, PlatformInfoHob);
if (EFI_ERROR (Status)) {
UpperMemorySize = PlatformGetSystemMemorySizeAbove4gb ();
if (UpperMemorySize != 0) {
--
2.39.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 4/8] OvmfPkg/PlatformInitLib: Add PlatformReservationConflictCB
2023-01-12 9:34 [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts Gerd Hoffmann
` (2 preceding siblings ...)
2023-01-12 9:34 ` [PATCH v3 3/8] OvmfPkg/PlatformInitLib: Add PlatformAddHobCB Gerd Hoffmann
@ 2023-01-12 9:34 ` Gerd Hoffmann
2023-01-12 9:34 ` [PATCH v3 5/8] OvmfPkg/PlatformInitLib: reorder PlatformQemuUc32BaseInitialization Gerd Hoffmann
` (4 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Gerd Hoffmann @ 2023-01-12 9:34 UTC (permalink / raw)
To: devel
Cc: Oliver Steffen, László Érsek, Ard Biesheuvel,
Jordan Justen, Pawel Polawski, Jiewen Yao, Gerd Hoffmann
Add PlatformReservationConflictCB() callback function for use with
PlatformScanE820(). It checks whenever the 64bit PCI MMIO window
overlaps with a reservation from qemu. If so move down the MMIO window
to resolve the conflict.
Write any actions done (moving mmio window) to the firmware log with
INFO loglevel.
This happens on (virtual) AMD machines with 1TB address space,
because the AMD IOMMU uses an address window just below 1TB.
Bugzilla: https://bugzilla.tianocore.org/show_bug.cgi?id=4251
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
OvmfPkg/Library/PlatformInitLib/MemDetect.c | 41 +++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
index 8a3a197b5fa7..9b273755aaeb 100644
--- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
+++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
@@ -213,6 +213,46 @@ PlatformAddHobCB (
}
}
+/**
+ Check whenever the 64bit PCI MMIO window overlaps with a reservation
+ from qemu. If so move down the MMIO window to resolve the conflict.
+
+ This happens on (virtual) AMD machines with 1TB address space,
+ because the AMD IOMMU uses an address window just below 1TB.
+**/
+STATIC VOID
+PlatformReservationConflictCB (
+ IN EFI_E820_ENTRY64 *E820Entry,
+ IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob
+ )
+{
+ UINT64 IntersectionBase = MAX (
+ E820Entry->BaseAddr,
+ PlatformInfoHob->PcdPciMmio64Base
+ );
+ UINT64 IntersectionEnd = MIN (
+ E820Entry->BaseAddr + E820Entry->Length,
+ PlatformInfoHob->PcdPciMmio64Base +
+ PlatformInfoHob->PcdPciMmio64Size
+ );
+ UINT64 NewBase;
+
+ if (IntersectionBase >= IntersectionEnd) {
+ return; // no overlap
+ }
+
+ NewBase = (PlatformInfoHob->PcdPciMmio64Base -
+ PlatformInfoHob->PcdPciMmio64Size);
+ DEBUG ((
+ DEBUG_INFO,
+ "%a: move mmio: 0x%Lx => %Lx\n",
+ __FUNCTION__,
+ PlatformInfoHob->PcdPciMmio64Base,
+ NewBase
+ ));
+ PlatformInfoHob->PcdPciMmio64Base = NewBase;
+}
+
/**
Iterate over the entries in QEMU's fw_cfg E820 RAM map, call the
passed callback for each entry.
@@ -650,6 +690,7 @@ PlatformDynamicMmioWindow (
DEBUG ((DEBUG_INFO, "%a: MMIO Space 0x%Lx (%Ld GB)\n", __func__, MmioSpace, RShiftU64 (MmioSpace, 30)));
PlatformInfoHob->PcdPciMmio64Size = MmioSpace;
PlatformInfoHob->PcdPciMmio64Base = AddrSpace - MmioSpace;
+ PlatformScanE820 (PlatformReservationConflictCB, PlatformInfoHob);
} else {
DEBUG ((DEBUG_INFO, "%a: using classic mmio window\n", __func__));
}
--
2.39.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 5/8] OvmfPkg/PlatformInitLib: reorder PlatformQemuUc32BaseInitialization
2023-01-12 9:34 [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts Gerd Hoffmann
` (3 preceding siblings ...)
2023-01-12 9:34 ` [PATCH v3 4/8] OvmfPkg/PlatformInitLib: Add PlatformReservationConflictCB Gerd Hoffmann
@ 2023-01-12 9:34 ` Gerd Hoffmann
2023-01-12 9:34 ` [PATCH v3 6/8] OvmfPkg/PlatformInitLib: update address space layout comment Gerd Hoffmann
` (3 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Gerd Hoffmann @ 2023-01-12 9:34 UTC (permalink / raw)
To: devel
Cc: Oliver Steffen, László Érsek, Ard Biesheuvel,
Jordan Justen, Pawel Polawski, Jiewen Yao, Gerd Hoffmann
First handle the cases which do not need know the value of
PlatformInfoHob->LowMemory (microvm and cloudhv). Then call
PlatformGetSystemMemorySizeBelow4gb() to get LowMemory. Finally handle
the cases (q35 and pc) which need to look at LowMemory,
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
OvmfPkg/Library/PlatformInitLib/MemDetect.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
index 9b273755aaeb..c51c0f9af15d 100644
--- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
+++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
@@ -55,8 +55,15 @@ PlatformQemuUc32BaseInitialization (
return;
}
+ if (PlatformInfoHob->HostBridgeDevId == CLOUDHV_DEVICE_ID) {
+ PlatformInfoHob->Uc32Size = CLOUDHV_MMIO_HOLE_SIZE;
+ PlatformInfoHob->Uc32Base = CLOUDHV_MMIO_HOLE_ADDRESS;
+ return;
+ }
+
+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
+
if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
- PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
ASSERT (PcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32);
ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >= PlatformInfoHob->LowMemory);
@@ -78,19 +85,12 @@ PlatformQemuUc32BaseInitialization (
return;
}
- if (PlatformInfoHob->HostBridgeDevId == CLOUDHV_DEVICE_ID) {
- PlatformInfoHob->Uc32Size = CLOUDHV_MMIO_HOLE_SIZE;
- PlatformInfoHob->Uc32Base = CLOUDHV_MMIO_HOLE_ADDRESS;
- return;
- }
-
ASSERT (PlatformInfoHob->HostBridgeDevId == INTEL_82441_DEVICE_ID);
//
// On i440fx, start with the [LowerMemorySize, 4GB) range. Make sure one
// variable MTRR suffices by truncating the size to a whole power of two,
// while keeping the end affixed to 4GB. This will round the base up.
//
- PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
PlatformInfoHob->Uc32Size = GetPowerOfTwo32 ((UINT32)(SIZE_4GB - PlatformInfoHob->LowMemory));
PlatformInfoHob->Uc32Base = (UINT32)(SIZE_4GB - PlatformInfoHob->Uc32Size);
//
--
2.39.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 6/8] OvmfPkg/PlatformInitLib: update address space layout comment
2023-01-12 9:34 [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts Gerd Hoffmann
` (4 preceding siblings ...)
2023-01-12 9:34 ` [PATCH v3 5/8] OvmfPkg/PlatformInitLib: reorder PlatformQemuUc32BaseInitialization Gerd Hoffmann
@ 2023-01-12 9:34 ` Gerd Hoffmann
2023-01-12 9:34 ` [PATCH v3 7/8] OvmfPkg/PlatformInitLib: move mmconfig to 0xe0000000 Gerd Hoffmann
` (2 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Gerd Hoffmann @ 2023-01-12 9:34 UTC (permalink / raw)
To: devel
Cc: Oliver Steffen, László Érsek, Ard Biesheuvel,
Jordan Justen, Pawel Polawski, Jiewen Yao, Gerd Hoffmann
Move the commment up so it is placed just before the address space
calculations start. Also add q35 memory layout.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
OvmfPkg/Library/PlatformInitLib/Platform.c | 36 ++++++++++++----------
1 file changed, 19 insertions(+), 17 deletions(-)
diff --git a/OvmfPkg/Library/PlatformInitLib/Platform.c b/OvmfPkg/Library/PlatformInitLib/Platform.c
index 9ab0342fd8c0..ea3e969ca061 100644
--- a/OvmfPkg/Library/PlatformInitLib/Platform.c
+++ b/OvmfPkg/Library/PlatformInitLib/Platform.c
@@ -149,26 +149,12 @@ PlatformMemMapInitialization (
return;
}
- PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
- PciExBarBase = 0;
- if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
- //
- // The MMCONFIG area is expected to fall between the top of low RAM and
- // the base of the 32-bit PCI host aperture.
- //
- PciExBarBase = PcdGet64 (PcdPciExpressBaseAddress);
- ASSERT (PlatformInfoHob->LowMemory <= PciExBarBase);
- ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
- PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
- } else {
- ASSERT (PlatformInfoHob->LowMemory <= PlatformInfoHob->Uc32Base);
- PciBase = PlatformInfoHob->Uc32Base;
- }
-
//
// address purpose size
// ------------ -------- -------------------------
- // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g)
+ // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g) (pc)
+ // 0xB0000000 MMCONFIG 256 MB (q35)
+ // 0xC0000000 PCI MMIO 960 MB (q35)
// 0xFC000000 gap 44 MB
// 0xFEC00000 IO-APIC 4 KB
// 0xFEC01000 gap 1020 KB
@@ -178,6 +164,22 @@ PlatformMemMapInitialization (
// 0xFED20000 gap 896 KB
// 0xFEE00000 LAPIC 1 MB
//
+ PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ PciExBarBase = 0;
+ if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
+ //
+ // The MMCONFIG area is expected to fall between the top of low RAM and
+ // the base of the 32-bit PCI host aperture.
+ //
+ PciExBarBase = PcdGet64 (PcdPciExpressBaseAddress);
+ ASSERT (PlatformInfoHob->LowMemory <= PciExBarBase);
+ ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
+ PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
+ } else {
+ ASSERT (PlatformInfoHob->LowMemory <= PlatformInfoHob->Uc32Base);
+ PciBase = PlatformInfoHob->Uc32Base;
+ }
+
PciSize = 0xFC000000 - PciBase;
PlatformAddIoMemoryBaseSizeHob (PciBase, PciSize);
--
2.39.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 7/8] OvmfPkg/PlatformInitLib: move mmconfig to 0xe0000000
2023-01-12 9:34 [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts Gerd Hoffmann
` (5 preceding siblings ...)
2023-01-12 9:34 ` [PATCH v3 6/8] OvmfPkg/PlatformInitLib: update address space layout comment Gerd Hoffmann
@ 2023-01-12 9:34 ` Gerd Hoffmann
2023-01-12 9:34 ` [PATCH v3 8/8] OvmfPkg/PlatformInitLib: simplify mtrr setup Gerd Hoffmann
2023-01-12 18:34 ` [edk2-devel] [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts Laszlo Ersek
8 siblings, 0 replies; 11+ messages in thread
From: Gerd Hoffmann @ 2023-01-12 9:34 UTC (permalink / raw)
To: devel
Cc: Oliver Steffen, László Érsek, Ard Biesheuvel,
Jordan Justen, Pawel Polawski, Jiewen Yao, Gerd Hoffmann
Also swap the ordering of 32bit PCI MMIO window on q35, i.e. use the
room between end of low memory and the start of the mmconfig bar.
With a typical configuration on modern qemu with gigabyte-aligned memory
the MMIO window start at 0x8000000, sized 1532 MB. In case there is
memory present above 0x80000000 the window will start at 0xc0000000
instead, with 512 MB size.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
OvmfPkg/AmdSev/AmdSevX64.dsc | 2 +-
OvmfPkg/IntelTdx/IntelTdxX64.dsc | 2 +-
OvmfPkg/OvmfPkgIa32.dsc | 2 +-
OvmfPkg/OvmfPkgIa32X64.dsc | 2 +-
OvmfPkg/OvmfPkgX64.dsc | 2 +-
OvmfPkg/OvmfXen.dsc | 2 +-
OvmfPkg/Library/PlatformInitLib/Platform.c | 10 +++++-----
7 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc
index 36100f5fdc11..0e1574959cd1 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.dsc
+++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
@@ -443,7 +443,7 @@ [PcdsFixedAtBuild]
#
# On Q35 machine types that QEMU intends to support in the long term, QEMU
# never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
!if $(SOURCE_DEBUG_ENABLE) == TRUE
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/IntelTdx/IntelTdxX64.dsc b/OvmfPkg/IntelTdx/IntelTdxX64.dsc
index 81511e3556a6..0ecf10ccb1f9 100644
--- a/OvmfPkg/IntelTdx/IntelTdxX64.dsc
+++ b/OvmfPkg/IntelTdx/IntelTdxX64.dsc
@@ -438,7 +438,7 @@ [PcdsFixedAtBuild]
#
# On Q35 machine types that QEMU intends to support in the long term, QEMU
# never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
#
# The NumberOfPages values below are ad-hoc. They are updated sporadically at
diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index f232de13a7b6..d2a66e4f6717 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -557,7 +557,7 @@ [PcdsFixedAtBuild]
#
# On Q35 machine types that QEMU intends to support in the long term, QEMU
# never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
!if $(SOURCE_DEBUG_ENABLE) == TRUE
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index a9d422bd9169..4a76cd7a5d44 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -562,7 +562,7 @@ [PcdsFixedAtBuild]
#
# On Q35 machine types that QEMU intends to support in the long term, QEMU
# never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
!if $(SOURCE_DEBUG_ENABLE) == TRUE
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 8401d7390005..3c1843069099 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -582,7 +582,7 @@ [PcdsFixedAtBuild]
#
# On Q35 machine types that QEMU intends to support in the long term, QEMU
# never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
!if $(SOURCE_DEBUG_ENABLE) == TRUE
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc
index c328987e8432..18144d9a6d94 100644
--- a/OvmfPkg/OvmfXen.dsc
+++ b/OvmfPkg/OvmfXen.dsc
@@ -434,7 +434,7 @@ [PcdsFixedAtBuild]
#
# On Q35 machine types that QEMU intends to support in the long term, QEMU
# never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE0000000
!if $(SOURCE_DEBUG_ENABLE) == TRUE
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
diff --git a/OvmfPkg/Library/PlatformInitLib/Platform.c b/OvmfPkg/Library/PlatformInitLib/Platform.c
index ea3e969ca061..c756f9af30fe 100644
--- a/OvmfPkg/Library/PlatformInitLib/Platform.c
+++ b/OvmfPkg/Library/PlatformInitLib/Platform.c
@@ -153,8 +153,8 @@ PlatformMemMapInitialization (
// address purpose size
// ------------ -------- -------------------------
// max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g) (pc)
- // 0xB0000000 MMCONFIG 256 MB (q35)
- // 0xC0000000 PCI MMIO 960 MB (q35)
+ // max(top, 2g) PCI MMIO 0xE0000000 - max(top, 2g) (q35)
+ // 0xE0000000 MMCONFIG 256 MB (q35)
// 0xFC000000 gap 44 MB
// 0xFEC00000 IO-APIC 4 KB
// 0xFEC01000 gap 1020 KB
@@ -165,6 +165,7 @@ PlatformMemMapInitialization (
// 0xFEE00000 LAPIC 1 MB
//
PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
+ PciBase = PlatformInfoHob->Uc32Base;
PciExBarBase = 0;
if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
//
@@ -174,13 +175,12 @@ PlatformMemMapInitialization (
PciExBarBase = PcdGet64 (PcdPciExpressBaseAddress);
ASSERT (PlatformInfoHob->LowMemory <= PciExBarBase);
ASSERT (PciExBarBase <= MAX_UINT32 - SIZE_256MB);
- PciBase = (UINT32)(PciExBarBase + SIZE_256MB);
+ PciSize = (UINT32)(PciExBarBase - PciBase);
} else {
ASSERT (PlatformInfoHob->LowMemory <= PlatformInfoHob->Uc32Base);
- PciBase = PlatformInfoHob->Uc32Base;
+ PciSize = 0xFC000000 - PciBase;
}
- PciSize = 0xFC000000 - PciBase;
PlatformAddIoMemoryBaseSizeHob (PciBase, PciSize);
PlatformInfoHob->PcdPciMmio32Base = PciBase;
--
2.39.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 8/8] OvmfPkg/PlatformInitLib: simplify mtrr setup
2023-01-12 9:34 [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts Gerd Hoffmann
` (6 preceding siblings ...)
2023-01-12 9:34 ` [PATCH v3 7/8] OvmfPkg/PlatformInitLib: move mmconfig to 0xe0000000 Gerd Hoffmann
@ 2023-01-12 9:34 ` Gerd Hoffmann
2023-01-12 18:34 ` [edk2-devel] [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts Laszlo Ersek
8 siblings, 0 replies; 11+ messages in thread
From: Gerd Hoffmann @ 2023-01-12 9:34 UTC (permalink / raw)
To: devel
Cc: Oliver Steffen, László Érsek, Ard Biesheuvel,
Jordan Justen, Pawel Polawski, Jiewen Yao, Gerd Hoffmann
With the new mmconfig location at 0xe0000000 above the 32-bit PCI MMIO
window we don't have to special-case the mmconfig xbar any more. We'll
just add a mtrr uncachable entry starting at MMIO window base and ending
at 4GB.
Update comments to match reality.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
OvmfPkg/Library/PlatformInitLib/MemDetect.c | 38 +++++++++------------
1 file changed, 16 insertions(+), 22 deletions(-)
diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
index c51c0f9af15d..3eaa8104cf55 100644
--- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
+++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
@@ -61,33 +61,20 @@ PlatformQemuUc32BaseInitialization (
return;
}
+ ASSERT (
+ PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID ||
+ PlatformInfoHob->HostBridgeDevId == INTEL_82441_DEVICE_ID
+ );
+
PlatformGetSystemMemorySizeBelow4gb (PlatformInfoHob);
if (PlatformInfoHob->HostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID) {
ASSERT (PcdGet64 (PcdPciExpressBaseAddress) <= MAX_UINT32);
ASSERT (PcdGet64 (PcdPciExpressBaseAddress) >= PlatformInfoHob->LowMemory);
-
- if (PlatformInfoHob->LowMemory <= BASE_2GB) {
- // Newer qemu with gigabyte aligned memory,
- // 32-bit pci mmio window is 2G -> 4G then.
- PlatformInfoHob->Uc32Base = BASE_2GB;
- } else {
- //
- // On q35, the 32-bit area that we'll mark as UC, through variable MTRRs,
- // starts at PcdPciExpressBaseAddress. The platform DSC is responsible for
- // setting PcdPciExpressBaseAddress such that describing the
- // [PcdPciExpressBaseAddress, 4GB) range require a very small number of
- // variable MTRRs (preferably 1 or 2).
- //
- PlatformInfoHob->Uc32Base = (UINT32)PcdGet64 (PcdPciExpressBaseAddress);
- }
-
- return;
}
- ASSERT (PlatformInfoHob->HostBridgeDevId == INTEL_82441_DEVICE_ID);
//
- // On i440fx, start with the [LowerMemorySize, 4GB) range. Make sure one
+ // Start with the [LowerMemorySize, 4GB) range. Make sure one
// variable MTRR suffices by truncating the size to a whole power of two,
// while keeping the end affixed to 4GB. This will round the base up.
//
@@ -1011,7 +998,7 @@ PlatformQemuInitializeRam (
//
// We'd like to keep the following ranges uncached:
// - [640 KB, 1 MB)
- // - [LowerMemorySize, 4 GB)
+ // - [PlatformInfoHob->LowMemory, 4 GB)
//
// Everything else should be WB. Unfortunately, programming the inverse (ie.
// keeping the default UC, and configuring the complement set of the above as
@@ -1019,6 +1006,13 @@ PlatformQemuInitializeRam (
// practically any alignment, and we may not have enough variable MTRRs to
// cover it exactly.
//
+ // Because of that PlatformQemuUc32BaseInitialization() will round
+ // up PlatformInfoHob->LowMemory to make sure a single mtrr register
+ // is enough. The the result will be stored in
+ // PlatformInfoHob->Uc32Base. On a typical qemu configuration with
+ // gigabyte-alignment being used LowMemory will be 2 or 3 GB and no
+ // rounding is needed, so LowMemory and Uc32Base will be identical.
+ //
if (IsMtrrSupported () && (PlatformInfoHob->HostBridgeDevId != CLOUDHV_DEVICE_ID)) {
MtrrGetAllMtrrs (&MtrrSettings);
@@ -1048,8 +1042,8 @@ PlatformQemuInitializeRam (
ASSERT_EFI_ERROR (Status);
//
- // Set the memory range from the start of the 32-bit MMIO area (32-bit PCI
- // MMIO aperture on i440fx, PCIEXBAR on q35) to 4GB as uncacheable.
+ // Set the memory range from the start of the 32-bit PCI MMIO
+ // aperture to 4GB as uncacheable.
//
Status = MtrrSetMemoryAttribute (
PlatformInfoHob->Uc32Base,
--
2.39.0
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [edk2-devel] [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts
2023-01-12 9:34 [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts Gerd Hoffmann
` (7 preceding siblings ...)
2023-01-12 9:34 ` [PATCH v3 8/8] OvmfPkg/PlatformInitLib: simplify mtrr setup Gerd Hoffmann
@ 2023-01-12 18:34 ` Laszlo Ersek
2023-01-13 9:07 ` Ard Biesheuvel
8 siblings, 1 reply; 11+ messages in thread
From: Laszlo Ersek @ 2023-01-12 18:34 UTC (permalink / raw)
To: devel, kraxel
Cc: Oliver Steffen, Ard Biesheuvel, Jordan Justen, Pawel Polawski,
Jiewen Yao
Hi,
On 1/12/23 10:34, Gerd Hoffmann wrote:
> v3:
> - Add / fix comments, add notes to commit messages.
> - Make functions static.
> - Logging tweaks.
> - Fix windows compiler warnings.
> - Add patches (5,6,7) moving MMCONFIG to 0xe0000000, simplifying code
> and reducing differences between 'pc' and 'q35' along the way.
> Eventually we want split them into a separate series, but some of
> this was discussed in v2 review, so I just appended them here for
> now.
> v2:
> - split up PlatformScanOrAdd64BitE820Ram() into scan function with
> callbacks, store results in PlatformInfoHob struct.
>
> Gerd Hoffmann (8):
> OvmfPkg/PlatformInitLib: Add PlatformScanE820 and GetFirstNonAddressCB
> OvmfPkg/PlatformInitLib: Add PlatformGetLowMemoryCB
> OvmfPkg/PlatformInitLib: Add PlatformAddHobCB
> OvmfPkg/PlatformInitLib: Add PlatformReservationConflictCB
> OvmfPkg/PlatformInitLib: reorder PlatformQemuUc32BaseInitialization
> OvmfPkg/PlatformInitLib: update address space layout comment
> OvmfPkg/PlatformInitLib: move mmconfig to 0xe0000000
> OvmfPkg/PlatformInitLib: simplify mtrr setup
>
> OvmfPkg/AmdSev/AmdSevX64.dsc | 2 +-
> OvmfPkg/IntelTdx/IntelTdxX64.dsc | 2 +-
> OvmfPkg/OvmfPkgIa32.dsc | 2 +-
> OvmfPkg/OvmfPkgIa32X64.dsc | 2 +-
> OvmfPkg/OvmfPkgX64.dsc | 2 +-
> OvmfPkg/OvmfXen.dsc | 2 +-
> OvmfPkg/Include/Library/PlatformInitLib.h | 3 +-
> OvmfPkg/Library/PeilessStartupLib/Hob.c | 3 +-
> .../PeilessStartupLib/PeilessStartup.c | 7 +-
> OvmfPkg/Library/PlatformInitLib/MemDetect.c | 384 ++++++++++--------
> OvmfPkg/Library/PlatformInitLib/Platform.c | 39 +-
> OvmfPkg/PlatformPei/MemDetect.c | 3 +-
> 12 files changed, 246 insertions(+), 205 deletions(-)
>
please proceed with this without me. Since I've been back to edk2, just
"temporarily" (until the BZs I've reported in 2023 would be fixed), my
stress levels have been through the roof, I'm again working 10-12 hour
days, things are falling apart around me. I'm simply unable to ignore
things on the list that I have some knowledge for commenting upon, and
that traffic happens to be sizeable, and my comments happen to be
detailed, and while that may be good for edk2, it's *destroying* me. I'm
an edk2 addict / workaholic that has relapsed.
I'm out. Thanks for the collaboration. I must save myself.
Laszlo
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [edk2-devel] [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts
2023-01-12 18:34 ` [edk2-devel] [PATCH v3 0/8] OvmfPkg: check 64bit mmio window for resource conflicts Laszlo Ersek
@ 2023-01-13 9:07 ` Ard Biesheuvel
0 siblings, 0 replies; 11+ messages in thread
From: Ard Biesheuvel @ 2023-01-13 9:07 UTC (permalink / raw)
To: devel, lersek
Cc: kraxel, Oliver Steffen, Ard Biesheuvel, Jordan Justen,
Pawel Polawski, Jiewen Yao
On Thu, 12 Jan 2023 at 19:34, Laszlo Ersek <lersek@redhat.com> wrote:
>
> Hi,
>
> On 1/12/23 10:34, Gerd Hoffmann wrote:
> > v3:
> > - Add / fix comments, add notes to commit messages.
> > - Make functions static.
> > - Logging tweaks.
> > - Fix windows compiler warnings.
> > - Add patches (5,6,7) moving MMCONFIG to 0xe0000000, simplifying code
> > and reducing differences between 'pc' and 'q35' along the way.
> > Eventually we want split them into a separate series, but some of
> > this was discussed in v2 review, so I just appended them here for
> > now.
> > v2:
> > - split up PlatformScanOrAdd64BitE820Ram() into scan function with
> > callbacks, store results in PlatformInfoHob struct.
> >
> > Gerd Hoffmann (8):
> > OvmfPkg/PlatformInitLib: Add PlatformScanE820 and GetFirstNonAddressCB
> > OvmfPkg/PlatformInitLib: Add PlatformGetLowMemoryCB
> > OvmfPkg/PlatformInitLib: Add PlatformAddHobCB
> > OvmfPkg/PlatformInitLib: Add PlatformReservationConflictCB
> > OvmfPkg/PlatformInitLib: reorder PlatformQemuUc32BaseInitialization
> > OvmfPkg/PlatformInitLib: update address space layout comment
> > OvmfPkg/PlatformInitLib: move mmconfig to 0xe0000000
> > OvmfPkg/PlatformInitLib: simplify mtrr setup
> >
> > OvmfPkg/AmdSev/AmdSevX64.dsc | 2 +-
> > OvmfPkg/IntelTdx/IntelTdxX64.dsc | 2 +-
> > OvmfPkg/OvmfPkgIa32.dsc | 2 +-
> > OvmfPkg/OvmfPkgIa32X64.dsc | 2 +-
> > OvmfPkg/OvmfPkgX64.dsc | 2 +-
> > OvmfPkg/OvmfXen.dsc | 2 +-
> > OvmfPkg/Include/Library/PlatformInitLib.h | 3 +-
> > OvmfPkg/Library/PeilessStartupLib/Hob.c | 3 +-
> > .../PeilessStartupLib/PeilessStartup.c | 7 +-
> > OvmfPkg/Library/PlatformInitLib/MemDetect.c | 384 ++++++++++--------
> > OvmfPkg/Library/PlatformInitLib/Platform.c | 39 +-
> > OvmfPkg/PlatformPei/MemDetect.c | 3 +-
> > 12 files changed, 246 insertions(+), 205 deletions(-)
> >
>
> please proceed with this without me. Since I've been back to edk2, just
> "temporarily" (until the BZs I've reported in 2023 would be fixed), my
> stress levels have been through the roof, I'm again working 10-12 hour
> days, things are falling apart around me. I'm simply unable to ignore
> things on the list that I have some knowledge for commenting upon, and
> that traffic happens to be sizeable, and my comments happen to be
> detailed, and while that may be good for edk2, it's *destroying* me. I'm
> an edk2 addict / workaholic that has relapsed.
>
> I'm out. Thanks for the collaboration. I must save myself.
>
Laszlo,
I'm really sorry to hear this. Thanks a lot for your input, it has
been valuable as always.
^ permalink raw reply [flat|nested] 11+ messages in thread