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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?fTFzv95K93Jvl8hGPjmAy6yjvFqpK9mmSb4eFxEotbWFhZp4Ce1flpBt2aFL?= =?us-ascii?Q?euo7wCn2gssB3hribWsy4B+6YrlnJqRUJ0khUuSeinqzEqwbi9CyjF5q+d3W?= =?us-ascii?Q?UwHjP3srGjbYSJAOvtrAu6RJZHB77521kb0AnXh0ljb1/5J1FBubVVrqi5R+?= =?us-ascii?Q?3o5RyUOHz+4DiO0/u5eoGqDIUrBYUa0G8aEx6Pc1d9BchuDghS1fPpAvtIn/?= =?us-ascii?Q?dc3qxiKpg4BfX9fycV4IVsCyBPyj/6ZBk3tCGwEfmHE25feO3sTkr/1UApn1?= =?us-ascii?Q?Erxi5uXCgYiIYpFsSENXn5sqVwln7t1qAtYaigO2O2kJ/jqFTs1eMzsFyTGi?= =?us-ascii?Q?vHWsoFhyOJ/6y/RQjGYeScGy5yOlqxnBVDNsHEZ7pqcN00vWGhLzCikGKhjh?= =?us-ascii?Q?+wsrOEA5MUwZV6UFHIr2WJzOFddLkiAwyXF9JS2uuQulNo0Rt+HZJK4aejPz?= =?us-ascii?Q?Tx9q5PTigpZli/+Fc0YtKgm1/ooQqM1CAvXdfqoY/mHxWNUgE+07RLzLSpUN?= =?us-ascii?Q?PjY6gCjy2kbvt+Z6ODfOO2+ZaYv6qCkDPmFpoTu/M3olM++v9cnCJosCfzmB?= =?us-ascii?Q?fdsupN6nyKlhHexapr1ZWY3p/VtBemixp5KrV7nFuH6RoqIkJOVMxah4KM/K?= =?us-ascii?Q?cL2Ene9YYHu2UrTI2OLrewreJPPlJJGop1w8hntSJQt4zCQCdyiXuqFmQtsI?= =?us-ascii?Q?Akuk/XPj28I6JCnh6jPdfCkiBUIamNrPscqH/WxUN1rSRqTXk59G+VLMaK9s?= =?us-ascii?Q?RI/HmCobW4DG8ywNGVwc2ZdUof8jR815U8snZtczHxUJ5KexuBlY4dYjerPP?= =?us-ascii?Q?RsPV929ZRqt61B/ul9sOqc69fyIErSOmEtCs3ghm0Z3baUCN5q5eyDIFiMat?= =?us-ascii?Q?d1i5mMXixsiJvu0+dHF426VKIH56QuoOF4GTjy+irGHZ+3V1DjuW1b/OQmVl?= =?us-ascii?Q?Z5OXhjh2iIM/zsC9dEoo7Q1yARH3ovnry67pYdVHqLBYOCFdd0QXR/nGGh5f?= =?us-ascii?Q?APOHY/TwQkLqJwUNr3shOGB8tZUwZgAziiq8YinU4hZyIMK3W4eLgwujMRTo?= =?us-ascii?Q?44gtQNKf25POYPop7ebaw4y2uFokN5FmsIoLPCXSku98x43JIUVvZmJbtQFI?= =?us-ascii?Q?ktn5wD7pNzAKzNiQpY2U7eoK554lZgPLI5+r6A8JiyFy7WNeanBPNmVHMmS+?= =?us-ascii?Q?q0urv6Ahen01hAGqTo9JDpuV5p3/j0J47ge38wzlmC0EkSgc97rwfqSh4g9N?= =?us-ascii?Q?23+jbi5/eeF5OK2s/JOyc8l8X3XhAoJWTOO8obED6+cpqBhLamwRNWnZknb+?= =?us-ascii?Q?PrcaejAGjLVK9KVBjz+Qjpr9k2I7frQ9oRqEiMDJUOwkFptdQwTOU+zcDdxB?= =?us-ascii?Q?mUe85Wb3DR55vqOMjTioST2FWmidfoSGdhMRxzdK0WmhHxhKSos5BMJZnuJU?= =?us-ascii?Q?ALF+IBRh8GZD5CnSUoLmI5h1aFtLGG2SPSRvx1U8a4xr/aUNwsD90umFHIKU?= =?us-ascii?Q?uYTg7nuUSnq7keZC4TfI2jHf+2TB4taDF+/5Wj4x3o8165ladPe/tFa/8Wqv?= =?us-ascii?Q?85yzLEER+NIh5fBNzI5bwsRWP9bXD9/EV8ZSFRW15qbis3+aHBYlTDMnXwgZ?= =?us-ascii?Q?nBPMwjUid3zP3AsUL6W0BXM=3D?= X-OriginatorOrg: os.amperecomputing.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9fee4170-9c8b-47a3-e711-08daf51dbb0e X-MS-Exchange-CrossTenant-AuthSource: PH0PR01MB7287.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Jan 2023 04:22:07.1268 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3bc2b170-fd94-476d-b0ce-4229bdc904a7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 11jYJCyDtYFyrH51JH5dlP0dfB6rnmIUncwPsZSg60AmOwRARjMFzNlVsotdWWECNDZekfe4UbBbHmnBjC7Nv0dPaSRDokEZJeYsUpiNY9E= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL0PR01MB4738 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain From: Tinh Nguyen Since the commit 103fa647d159e3d76be2634d2653c2d215dd0d46 instead ("ArmPkg: Replace CoreId and ClusterId with Mpidr in ARM_CORE_INFO struct") has updated the ARM_CORE_INFO structure so the MPIDR is now a single field instead of separate cluster/core fields. This patch updates the ArmPlatformLib to work with the changed ARM_CORE_INFO. Signed-off-by: Nhi Pham --- .../Ampere/AmpereAltraPkg/Include/Platform/Ac01.h | 11 ++++++++++- .../JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c | 5 ++--- .../JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c | 14 ++++++++------ .../Library/ArmPlatformLib/ArmPlatformLib.c | 8 +++++--- 4 files changed, 25 insertions(+), 13 deletions(-) diff --git a/Silicon/Ampere/AmpereAltraPkg/Include/Platform/Ac01.h b/Silico= n/Ampere/AmpereAltraPkg/Include/Platform/Ac01.h index d45688f88401..563dd5ef242d 100644 --- a/Silicon/Ampere/AmpereAltraPkg/Include/Platform/Ac01.h +++ b/Silicon/Ampere/AmpereAltraPkg/Include/Platform/Ac01.h @@ -1,6 +1,6 @@ /** @file =20 - Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved. + Copyright (c) 2020 - 2023, Ampere Computing LLC. All rights reserved. =20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -229,6 +229,15 @@ // #define PLATFORM_CPM_UID_BIT_OFFSET 8 =20 +// +// MPIDR manipulation +// +#define AC01_GET_MPIDR(SocketId, ClusterId, CoreId) \ + (((SocketId) << 32) | ((ClusterId) << 16) | ((CoreId) << 8)) +#define AC01_GET_SOCKET_ID(Mpidr) (((Mpidr) & ARM_CORE_AFF3) >> 32) +#define AC01_GET_CLUSTER_ID(Mpidr) (((Mpidr) & ARM_CORE_AFF2) >> 16) +#define AC01_GET_CORE_ID(Mpidr) (((Mpidr) & ARM_CORE_AFF1) >> 8) + // // Max number for AC01 PCIE Root Complexes // diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c b/P= latform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c index 419ce578e452..4db1f9a383a9 100644 --- a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c +++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiMadt.c @@ -1,6 +1,6 @@ /** @file =20 - Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved. + Copyright (c) 2020 - 2023, Ampere Computing LLC. All rights reserved. =20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -160,8 +160,7 @@ AcpiInstallMadtProcessorNode ( (ClusterId << 8) + (CpuId % PLATFORM_CPU_NUM_CORES_PER_CPM); MadtProcessorEntryPointer->Flags =3D 1; MadtProcessorEntryPointer->MPIDR =3D - (((ClusterId << 8) + (CpuId % PLATFORM_CPU_NUM_CORES_PER_CPM)) << 8); - MadtProcessorEntryPointer->MPIDR +=3D (((UINT64)SocketId) << 32); + AC01_GET_MPIDR ((UINT64)SocketId, ClusterId, CpuId % PLATFORM_CPU_NUM= _CORES_PER_CPM); =20 return Size; } diff --git a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c b/P= latform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c index f4df60bc2593..3a89014f41f1 100644 --- a/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c +++ b/Platform/Ampere/JadePkg/Drivers/AcpiPlatformDxe/AcpiSrat.c @@ -1,6 +1,6 @@ /** @file =20 - Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved. + Copyright (c) 2020 - 2023, Ampere Computing LLC. All rights reserved. Copyright (c) 2022, ARM Ltd. All rights reserved.
=20 SPDX-License-Identifier: BSD-2-Clause-Patent @@ -122,7 +122,6 @@ SratAddGiccAffinity ( UINTN Count, NumNode, Idx; UINT32 AcpiProcessorUid; UINT8 Socket; - UINT8 Core; UINT8 Cpm; =20 Hob =3D GetFirstGuidHob (&gArmMpCoreInfoGuid); @@ -141,14 +140,17 @@ SratAddGiccAffinity ( NumNode =3D 0; while (Count !=3D NumberOfEntries) { for (Idx =3D 0; Idx < NumberOfEntries; Idx++ ) { - Socket =3D GET_MPIDR_AFF1 (ArmCoreInfoTable[Idx].Mpidr); - Core =3D GET_MPIDR_AFF0 (ArmCoreInfoTable[Idx].Mpidr); - Cpm =3D Core >> PLATFORM_CPM_UID_BIT_OFFSET; + Socket =3D AC01_GET_SOCKET_ID (ArmCoreInfoTable[Idx].Mpidr); + Cpm =3D AC01_GET_CLUSTER_ID (ArmCoreInfoTable[Idx].Mpidr); if (CpuGetSubNumNode (Socket, Cpm) !=3D NumNode) { /* We add nodes based on ProximityDomain order */ continue; } - AcpiProcessorUid =3D (Socket << PLATFORM_SOCKET_UID_BIT_OFFSET) + Co= re; + + AcpiProcessorUid =3D + (AC01_GET_SOCKET_ID (ArmCoreInfoTable[Idx].Mpidr) << PLATFORM_SOCK= ET_UID_BIT_OFFSET) + + (AC01_GET_CLUSTER_ID (ArmCoreInfoTable[Idx].Mpidr) << PLATFORM_C= PM_UID_BIT_OFFSET) + + AC01_GET_CORE_ID (ArmCoreInfoTable[Idx].Mpidr); ZeroMem ((VOID *)&SratGiccAffinity[Count], sizeof (SratGiccAffinity[= Count])); SratGiccAffinity[Count].AcpiProcessorUid =3D AcpiProcessorUid; SratGiccAffinity[Count].Flags =3D 1; diff --git a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatfo= rmLib.c b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformL= ib.c index f2ec923d6f8d..18023df92880 100644 --- a/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c +++ b/Silicon/Ampere/AmpereAltraPkg/Library/ArmPlatformLib/ArmPlatformLib.c @@ -1,6 +1,6 @@ /** @file =20 - Copyright (c) 2020 - 2021, Ampere Computing LLC. All rights reserved. + Copyright (c) 2020 - 2023, Ampere Computing LLC. All rights reserved. =20 SPDX-License-Identifier: BSD-2-Clause-Patent =20 @@ -108,8 +108,10 @@ PrePeiCoreGetMpCoreInfo ( } SocketId =3D SOCKET_ID (Index); ClusterId =3D CLUSTER_ID (Index); - mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].Mpidr =3D GET_MPID = ( - SocketId, (ClusterId << 8) | (Index % PLATFORM_CPU_NUM_CORES_PER_CPM= )); + + mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].Mpidr =3D + AC01_GET_MPIDR ((UINT64)SocketId, ClusterId, (Index % PLATFORM_CPU_N= UM_CORES_PER_CPM)); + mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].MailboxClearAddress= =3D 0; mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].MailboxClearValue = =3D 0; mArmPlatformMpCoreInfoTable[mArmPlatformCoreCount].MailboxGetAddress = =3D 0; --=20 2.25.1